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target/arm: Handle FPCR.NEP for NEP for FMUL, FMULX scalar by element

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do_fp3_scalar_idx() is used only for the FMUL and FMULX scalar by
element instructions; these both need to merge the result with the Rn
register when FPCR.NEP is set.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Peter Maydell 2025-02-01 16:39:26 +00:00
parent 555639065d
commit 7bcde0c6dd
1 changed files with 3 additions and 3 deletions
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6
target/arm/tcg/translate-a64.c
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@ -6296,7 +6296,7 @@ static bool do_fp3_scalar_idx(DisasContext *s, arg_rrx_e *a, const FPScalar *f)
read_vec_element(s, t1, a->rm, a->idx, MO_64);
f->gen_d(t0, t0, t1, fpstatus_ptr(FPST_A64));
write_fp_dreg(s, a->rd, t0);
write_fp_dreg_merging(s, a->rd, a->rn, t0);
}
break;
case MO_32:
@ -6306,7 +6306,7 @@ static bool do_fp3_scalar_idx(DisasContext *s, arg_rrx_e *a, const FPScalar *f)
read_vec_element_i32(s, t1, a->rm, a->idx, MO_32);
f->gen_s(t0, t0, t1, fpstatus_ptr(FPST_A64));
write_fp_sreg(s, a->rd, t0);
write_fp_sreg_merging(s, a->rd, a->rn, t0);
}
break;
case MO_16:
@ -6319,7 +6319,7 @@ static bool do_fp3_scalar_idx(DisasContext *s, arg_rrx_e *a, const FPScalar *f)
read_vec_element_i32(s, t1, a->rm, a->idx, MO_16);
f->gen_h(t0, t0, t1, fpstatus_ptr(FPST_A64_F16));
write_fp_sreg(s, a->rd, t0);
write_fp_hreg_merging(s, a->rd, a->rn, t0);
}
break;
default: