hpet: enable to entitle more irq pins for hpet
Owning to some different hardware design, piix and q35 need different compat. So making them diverge. On q35, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23 can be assigned to hpet as guest chooses. So we introduce intcap property to do that. Consider the compat and piix/q35, we finally have the following value for intcap: For piix, hpet's intcap is hard coded as IRQ2. For pc-q35-1.7 and earlier, we use IRQ2 for compat reason. Otherwise IRQ2, IRQ8, and IRQ16~23 are allowed. Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
parent
0d63b2dd31
commit
7a10ef51c2
19
hw/i386/pc.c
19
hw/i386/pc.c
@ -1253,7 +1253,8 @@ static const MemoryRegionOps ioportF0_io_ops = {
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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ISADevice **rtc_state,
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ISADevice **rtc_state,
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ISADevice **floppy,
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ISADevice **floppy,
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bool no_vmport)
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bool no_vmport,
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uint32 hpet_irqs)
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{
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{
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int i;
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int i;
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DriveInfo *fd[MAX_FD];
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DriveInfo *fd[MAX_FD];
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@ -1280,9 +1281,21 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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* when the HPET wants to take over. Thus we have to disable the latter.
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* when the HPET wants to take over. Thus we have to disable the latter.
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*/
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*/
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if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
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if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
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hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL);
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/* In order to set property, here not using sysbus_try_create_simple */
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hpet = qdev_try_create(NULL, "hpet");
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if (hpet) {
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if (hpet) {
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/* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7
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* and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23,
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* IRQ8 and IRQ2.
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*/
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uint8_t compat = object_property_get_int(OBJECT(hpet),
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HPET_INTCAP, NULL);
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if (!compat) {
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qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs);
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}
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qdev_init_nofail(hpet);
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sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE);
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for (i = 0; i < GSI_NUM_PINS; i++) {
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for (i = 0; i < GSI_NUM_PINS; i++) {
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sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
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}
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}
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@ -189,7 +189,8 @@ static void pc_init1(QEMUMachineInitArgs *args,
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pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL);
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pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL);
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/* init basic PC hardware */
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/* init basic PC hardware */
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pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, xen_enabled());
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pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, xen_enabled(),
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0x4);
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pc_nic_init(isa_bus, pci_bus);
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pc_nic_init(isa_bus, pci_bus);
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@ -190,7 +190,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
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pc_register_ferr_irq(gsi[13]);
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pc_register_ferr_irq(gsi[13]);
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/* init basic PC hardware */
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/* init basic PC hardware */
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pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false);
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pc_basic_device_init(isa_bus, gsi, &rtc_state, &floppy, false, 0xff0104);
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/* connect pm stuff to lpc */
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/* connect pm stuff to lpc */
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ich9_lpc_pm_init(lpc);
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ich9_lpc_pm_init(lpc);
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@ -295,7 +295,11 @@ static QEMUMachine pc_q35_machine_v2_0 = {
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static QEMUMachine pc_q35_machine_v1_7 = {
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static QEMUMachine pc_q35_machine_v1_7 = {
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PC_Q35_1_7_MACHINE_OPTIONS,
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PC_Q35_1_7_MACHINE_OPTIONS,
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.name = "pc-q35-1.7",
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.name = "pc-q35-1.7",
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.init = pc_q35_init,
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.init = pc_q35_init_1_7,
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.compat_props = (GlobalProperty[]) {
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PC_Q35_COMPAT_1_7,
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{ /* end of list */ }
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},
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};
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};
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#define PC_Q35_1_6_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
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#define PC_Q35_1_6_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
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@ -305,7 +309,7 @@ static QEMUMachine pc_q35_machine_v1_6 = {
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.name = "pc-q35-1.6",
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.name = "pc-q35-1.6",
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.init = pc_q35_init_1_6,
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.init = pc_q35_init_1_6,
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.compat_props = (GlobalProperty[]) {
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.compat_props = (GlobalProperty[]) {
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PC_COMPAT_1_6,
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PC_Q35_COMPAT_1_6,
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{ /* end of list */ }
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{ /* end of list */ }
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},
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},
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};
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};
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@ -315,7 +319,7 @@ static QEMUMachine pc_q35_machine_v1_5 = {
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.name = "pc-q35-1.5",
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.name = "pc-q35-1.5",
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.init = pc_q35_init_1_5,
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.init = pc_q35_init_1_5,
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.compat_props = (GlobalProperty[]) {
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.compat_props = (GlobalProperty[]) {
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PC_COMPAT_1_5,
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PC_Q35_COMPAT_1_5,
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{ /* end of list */ }
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{ /* end of list */ }
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},
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},
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};
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};
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@ -73,6 +73,7 @@ typedef struct HPETState {
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uint8_t rtc_irq_level;
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uint8_t rtc_irq_level;
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qemu_irq pit_enabled;
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qemu_irq pit_enabled;
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uint8_t num_timers;
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uint8_t num_timers;
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uint32_t intcap;
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HPETTimer timer[HPET_MAX_TIMERS];
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HPETTimer timer[HPET_MAX_TIMERS];
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/* Memory-mapped, software visible registers */
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/* Memory-mapped, software visible registers */
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@ -663,8 +664,8 @@ static void hpet_reset(DeviceState *d)
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if (s->flags & (1 << HPET_MSI_SUPPORT)) {
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if (s->flags & (1 << HPET_MSI_SUPPORT)) {
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timer->config |= HPET_TN_FSB_CAP;
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timer->config |= HPET_TN_FSB_CAP;
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}
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}
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/* advertise availability of ioapic inti2 */
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/* advertise availability of ioapic int */
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timer->config |= 0x00000004ULL << 32;
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timer->config |= (uint64_t)s->intcap << 32;
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timer->period = 0ULL;
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timer->period = 0ULL;
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timer->wrap_flag = 0;
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timer->wrap_flag = 0;
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}
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}
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@ -713,6 +714,9 @@ static void hpet_realize(DeviceState *dev, Error **errp)
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int i;
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int i;
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HPETTimer *timer;
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HPETTimer *timer;
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if (!s->intcap) {
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error_printf("Hpet's intcap not initialized.\n");
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}
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if (hpet_cfg.count == UINT8_MAX) {
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if (hpet_cfg.count == UINT8_MAX) {
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/* first instance */
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/* first instance */
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hpet_cfg.count = 0;
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hpet_cfg.count = 0;
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@ -753,6 +757,7 @@ static void hpet_realize(DeviceState *dev, Error **errp)
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static Property hpet_device_properties[] = {
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static Property hpet_device_properties[] = {
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DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS),
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DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS),
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DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false),
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DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false),
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DEFINE_PROP_UINT32(HPET_INTCAP, HPETState, intcap, 0),
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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};
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};
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@ -13,6 +13,8 @@
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#include "sysemu/sysemu.h"
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#include "sysemu/sysemu.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/pci.h"
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#define HPET_INTCAP "hpet-intcap"
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/* PC-style peripherals (also used by other machines). */
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/* PC-style peripherals (also used by other machines). */
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typedef struct PcPciInfo {
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typedef struct PcPciInfo {
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@ -146,7 +148,8 @@ DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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ISADevice **rtc_state,
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ISADevice **rtc_state,
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ISADevice **floppy,
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ISADevice **floppy,
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bool no_vmport);
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bool no_vmport,
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uint32 hpet_irqs);
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void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
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void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
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void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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const char *boot_device,
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const char *boot_device,
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@ -236,6 +239,25 @@ uint16_t pvpanic_port(void);
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int e820_add_entry(uint64_t, uint64_t, uint32_t);
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int e820_add_entry(uint64_t, uint64_t, uint32_t);
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#define PC_Q35_COMPAT_1_7 \
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{\
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.driver = "hpet",\
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.property = HPET_INTCAP,\
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.value = stringify(4),\
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}
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#define PC_Q35_COMPAT_1_6 \
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PC_COMPAT_1_6, \
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PC_Q35_COMPAT_1_7
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#define PC_Q35_COMPAT_1_5 \
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PC_COMPAT_1_5, \
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PC_Q35_COMPAT_1_6
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#define PC_Q35_COMPAT_1_4 \
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PC_COMPAT_1_4, \
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PC_Q35_COMPAT_1_5
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#define PC_COMPAT_1_6 \
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#define PC_COMPAT_1_6 \
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{\
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{\
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.driver = "e1000",\
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.driver = "e1000",\
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