Various fixes

- Null pointer dereference in IPI IOCSR (Jiaxun)
 - Correct '-smbios type=4' in man page (Heinrich)
 - Use correct MMU index in MIPS get_pte (Phil)
 - Reset MPQEMU remote message using device_cold_reset (Peter)
 - Update linux-user MIPS CPU list (Phil)
 - Do not let exec_command read console if no pattern to wait for (Nick)
 - Remove shadowed declaration warning (Pierrick)
 - Restrict STQF opcode to SPARC V9 (Richard)
 - Add missing Kconfig dependency for POWERNV ISA serial port (Bernhard)
 - Do not allow vmport device without i8042 PS/2 controller (Kamil)
 - Fix QCryptoTLSCredsPSK leak (Peter)
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmbDzAsACgkQ4+MsLN6t
 wN7SvBAAwM0Frtg4ZKDZQu8XgMjLq1xVoSWjC3YJZKTpyGap5gO+7StvHg0sf9iB
 YyGqocCO+qdj9a7pTSasfGDyufpwoIZkOqkwGUWKBos76cOcHWt4e/gkl9O65Lf1
 VVKX4/xdY+a5w2eVAAdWWrYdaPWkKLm0ZZXKoeSIvN4R9A41j7J4kANhE2SweczF
 NnTt2gBnSlpRzghlVWPJKhnq+aYbvLeR7ApdNGUJDpSI1ZTh9gH1GtZFwBN7aeDo
 PvDucoui0EmuyHTVdOYOH3zihTfzKlNZECcT3Y6/6i8y5p7jLHyINHHexsKw6T56
 i5RidJMPTfM0EO6LU1GvUN5FzZy24zXOf298Fe/GMYczQsOznQd4+aFHYPb3d4hZ
 8Vc1wB1s8XF5WGj+7bchBAUdynUnbwUqfMOb2pMXLIm21pSDnOTVgmYMnp1Kt4AA
 9WbHiS6tUJf/HjQsep8BBNGUiVSsUPDNNhL8QN43u2C0NgNRPgtRuIV+ytgVXS1G
 2t1QiRX0lX4ACHmw88agUCU3OhorumuDOpoitQK5jn2VutT7TqbGgibkQMFSgn9E
 Xwrmtlf7nYU9MVgXYJjH2bBh7wbOmQCqbHniEj0targkxccAMJoswG4vtKsP9zkd
 tBs6qMiZ8qSj5eoq8JBRF8bF4tONmboPZjRlboACJ0kTD5wCElA=
 =lPMG
 -----END PGP SIGNATURE-----

Merge tag 'hw-misc-20240820' of https://github.com/philmd/qemu into staging

Various fixes

- Null pointer dereference in IPI IOCSR (Jiaxun)
- Correct '-smbios type=4' in man page (Heinrich)
- Use correct MMU index in MIPS get_pte (Phil)
- Reset MPQEMU remote message using device_cold_reset (Peter)
- Update linux-user MIPS CPU list (Phil)
- Do not let exec_command read console if no pattern to wait for (Nick)
- Remove shadowed declaration warning (Pierrick)
- Restrict STQF opcode to SPARC V9 (Richard)
- Add missing Kconfig dependency for POWERNV ISA serial port (Bernhard)
- Do not allow vmport device without i8042 PS/2 controller (Kamil)
- Fix QCryptoTLSCredsPSK leak (Peter)

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmbDzAsACgkQ4+MsLN6t
# wN7SvBAAwM0Frtg4ZKDZQu8XgMjLq1xVoSWjC3YJZKTpyGap5gO+7StvHg0sf9iB
# YyGqocCO+qdj9a7pTSasfGDyufpwoIZkOqkwGUWKBos76cOcHWt4e/gkl9O65Lf1
# VVKX4/xdY+a5w2eVAAdWWrYdaPWkKLm0ZZXKoeSIvN4R9A41j7J4kANhE2SweczF
# NnTt2gBnSlpRzghlVWPJKhnq+aYbvLeR7ApdNGUJDpSI1ZTh9gH1GtZFwBN7aeDo
# PvDucoui0EmuyHTVdOYOH3zihTfzKlNZECcT3Y6/6i8y5p7jLHyINHHexsKw6T56
# i5RidJMPTfM0EO6LU1GvUN5FzZy24zXOf298Fe/GMYczQsOznQd4+aFHYPb3d4hZ
# 8Vc1wB1s8XF5WGj+7bchBAUdynUnbwUqfMOb2pMXLIm21pSDnOTVgmYMnp1Kt4AA
# 9WbHiS6tUJf/HjQsep8BBNGUiVSsUPDNNhL8QN43u2C0NgNRPgtRuIV+ytgVXS1G
# 2t1QiRX0lX4ACHmw88agUCU3OhorumuDOpoitQK5jn2VutT7TqbGgibkQMFSgn9E
# Xwrmtlf7nYU9MVgXYJjH2bBh7wbOmQCqbHniEj0targkxccAMJoswG4vtKsP9zkd
# tBs6qMiZ8qSj5eoq8JBRF8bF4tONmboPZjRlboACJ0kTD5wCElA=
# =lPMG
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 20 Aug 2024 08:49:47 AM AEST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]

* tag 'hw-misc-20240820' of https://github.com/philmd/qemu:
  crypto/tlscredspsk: Free username on finalize
  hw/i386/pc: Ensure vmport prerequisites are fulfilled
  hw/i386/pc: Unify vmport=auto handling
  hw/ppc/Kconfig: Add missing SERIAL_ISA dependency to POWERNV machine
  target/sparc: Restrict STQF to sparcv9
  contrib/plugins/execlog: Fix shadowed declaration warning
  tests/avocado: Mark ppc_hv_tests.py as non-flaky after fixed console interaction
  tests/avocado: exec_command should not consume console output
  linux-user/mips: Select Loongson CPU for Loongson binaries
  linux-user/mips: Select MIPS64R2-generic for Rel2 binaries
  linux-user/mips: Select Octeon68XX CPU for Octeon binaries
  linux-user/mips: Do not try to use removed R5900 CPU
  hw/remote/message.c: Don't directly invoke DeviceClass:reset
  hw/dma/xilinx_axidma: Use semicolon at end of statement, not comma
  target/mips: Load PTE as DATA
  target/mips: Use correct MMU index in get_pte()
  target/mips: Pass page table entry size as MemOp to get_pte()
  qemu-options.hx: correct formatting -smbios type=4
  hw/mips/loongson3_virt: Fix condition of IPI IOCSR connection
  hw/mips/loongson3_virt: Store core_iocsr into LoongsonMachineState

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-08-20 09:17:41 +10:00
commit 76277cf82f
17 changed files with 89 additions and 67 deletions

View File

@ -181,8 +181,8 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb)
bool check_regs_this = rmatches; bool check_regs_this = rmatches;
bool check_regs_next = false; bool check_regs_next = false;
size_t n = qemu_plugin_tb_n_insns(tb); size_t n_insns = qemu_plugin_tb_n_insns(tb);
for (size_t i = 0; i < n; i++) { for (size_t i = 0; i < n_insns; i++) {
char *insn_disas; char *insn_disas;
uint64_t insn_vaddr; uint64_t insn_vaddr;

View File

@ -243,6 +243,7 @@ qcrypto_tls_creds_psk_finalize(Object *obj)
QCryptoTLSCredsPSK *creds = QCRYPTO_TLS_CREDS_PSK(obj); QCryptoTLSCredsPSK *creds = QCRYPTO_TLS_CREDS_PSK(obj);
qcrypto_tls_creds_psk_unload(creds); qcrypto_tls_creds_psk_unload(creds);
g_free(creds->username);
} }
static void static void

View File

@ -626,7 +626,7 @@ static void axidma_class_init(ObjectClass *klass, void *data)
{ {
DeviceClass *dc = DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = xilinx_axidma_realize, dc->realize = xilinx_axidma_realize;
dc->reset = xilinx_axidma_reset; dc->reset = xilinx_axidma_reset;
device_class_set_props(dc, axidma_properties); device_class_set_props(dc, axidma_properties);
} }

View File

@ -1075,7 +1075,7 @@ static const MemoryRegionOps ioportF0_io_ops = {
}; };
static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl,
bool create_i8042, bool no_vmport) bool create_i8042, bool no_vmport, Error **errp)
{ {
int i; int i;
DriveInfo *fd[MAX_FD]; DriveInfo *fd[MAX_FD];
@ -1100,6 +1100,10 @@ static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl,
} }
if (!create_i8042) { if (!create_i8042) {
if (!no_vmport) {
error_setg(errp,
"vmport requires the i8042 controller to be enabled");
}
return; return;
} }
@ -1217,9 +1221,15 @@ void pc_basic_device_init(struct PCMachineState *pcms,
isa_realize_and_unref(pcms->pcspk, isa_bus, &error_fatal); isa_realize_and_unref(pcms->pcspk, isa_bus, &error_fatal);
} }
assert(pcms->vmport >= 0 && pcms->vmport < ON_OFF_AUTO__MAX);
if (pcms->vmport == ON_OFF_AUTO_AUTO) {
pcms->vmport = (xen_enabled() || !pcms->i8042_enabled)
? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
}
/* Super I/O */ /* Super I/O */
pc_superio_init(isa_bus, create_fdctrl, pcms->i8042_enabled, pc_superio_init(isa_bus, create_fdctrl, pcms->i8042_enabled,
pcms->vmport != ON_OFF_AUTO_ON); pcms->vmport != ON_OFF_AUTO_ON, &error_fatal);
} }
void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus) void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus)

View File

@ -310,11 +310,6 @@ static void pc_init1(MachineState *machine, const char *pci_type)
pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL); pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL);
assert(pcms->vmport != ON_OFF_AUTO__MAX);
if (pcms->vmport == ON_OFF_AUTO_AUTO) {
pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
}
/* init basic PC hardware */ /* init basic PC hardware */
pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc, pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc,
!MACHINE_CLASS(pcmc)->no_floppy, 0x4); !MACHINE_CLASS(pcmc)->no_floppy, 0x4);

View File

@ -276,11 +276,6 @@ static void pc_q35_init(MachineState *machine)
x86_register_ferr_irq(x86ms->gsi[13]); x86_register_ferr_irq(x86ms->gsi[13]);
} }
assert(pcms->vmport != ON_OFF_AUTO__MAX);
if (pcms->vmport == ON_OFF_AUTO_AUTO) {
pcms->vmport = ON_OFF_AUTO_ON;
}
/* init basic PC hardware */ /* init basic PC hardware */
pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc, !mc->no_floppy, pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc, !mc->no_floppy,
0xff0104); 0xff0104);

View File

@ -97,6 +97,7 @@ struct LoongsonMachineState {
MemoryRegion *pio_alias; MemoryRegion *pio_alias;
MemoryRegion *mmio_alias; MemoryRegion *mmio_alias;
MemoryRegion *ecam_alias; MemoryRegion *ecam_alias;
MemoryRegion *core_iocsr[LOONGSON_MAX_VCPUS];
}; };
typedef struct LoongsonMachineState LoongsonMachineState; typedef struct LoongsonMachineState LoongsonMachineState;
@ -493,6 +494,7 @@ static void mips_loongson3_virt_init(MachineState *machine)
const char *kernel_filename = machine->kernel_filename; const char *kernel_filename = machine->kernel_filename;
const char *initrd_filename = machine->initrd_filename; const char *initrd_filename = machine->initrd_filename;
ram_addr_t ram_size = machine->ram_size; ram_addr_t ram_size = machine->ram_size;
LoongsonMachineState *s = LOONGSON_MACHINE(machine);
MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios = g_new(MemoryRegion, 1); MemoryRegion *bios = g_new(MemoryRegion, 1);
@ -572,7 +574,7 @@ static void mips_loongson3_virt_init(MachineState *machine)
cpu_mips_clock_init(cpu); cpu_mips_clock_init(cpu);
qemu_register_reset(main_cpu_reset, cpu); qemu_register_reset(main_cpu_reset, cpu);
if (ipi) { if (!kvm_enabled()) {
hwaddr base = ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].base; hwaddr base = ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].base;
base += core * 0x100; base += core * 0x100;
qdev_connect_gpio_out(ipi, i, cpu->env.irq[6]); qdev_connect_gpio_out(ipi, i, cpu->env.irq[6]);
@ -586,6 +588,7 @@ static void mips_loongson3_virt_init(MachineState *machine)
iocsr, 0, UINT32_MAX); iocsr, 0, UINT32_MAX);
memory_region_add_subregion(&MIPS_CPU(cpu)->env.iocsr.mr, memory_region_add_subregion(&MIPS_CPU(cpu)->env.iocsr.mr,
0, core_iocsr); 0, core_iocsr);
s->core_iocsr[i] = core_iocsr;
} }
if (node > 0) { if (node > 0) {

View File

@ -39,6 +39,7 @@ config POWERNV
select PCI_POWERNV select PCI_POWERNV
select PCA9552 select PCA9552
select PCA9554 select PCA9554
select SERIAL_ISA
select SSI select SSI
select SSI_M25P80 select SSI_M25P80
select PNV_SPI select PNV_SPI

View File

@ -215,13 +215,10 @@ fail:
static void process_device_reset_msg(QIOChannel *ioc, PCIDevice *dev, static void process_device_reset_msg(QIOChannel *ioc, PCIDevice *dev,
Error **errp) Error **errp)
{ {
DeviceClass *dc = DEVICE_GET_CLASS(dev);
DeviceState *s = DEVICE(dev); DeviceState *s = DEVICE(dev);
MPQemuMsg ret = { 0 }; MPQemuMsg ret = { 0 };
if (dc->reset) { device_cold_reset(s);
dc->reset(s);
}
ret.cmd = MPQEMU_CMD_RET; ret.cmd = MPQEMU_CMD_RET;

View File

@ -12,9 +12,6 @@ static inline const char *cpu_get_model(uint32_t eflags)
if ((eflags & EF_MIPS_ARCH) == EF_MIPS_ARCH_32R6) { if ((eflags & EF_MIPS_ARCH) == EF_MIPS_ARCH_32R6) {
return "mips32r6-generic"; return "mips32r6-generic";
} }
if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) {
return "R5900";
}
if (eflags & EF_MIPS_NAN2008) { if (eflags & EF_MIPS_NAN2008) {
return "P5600"; return "P5600";
} }

View File

@ -9,11 +9,27 @@
#define MIPS64_TARGET_ELF_H #define MIPS64_TARGET_ELF_H
static inline const char *cpu_get_model(uint32_t eflags) static inline const char *cpu_get_model(uint32_t eflags)
{ {
if ((eflags & EF_MIPS_ARCH) == EF_MIPS_ARCH_64R6) { switch (eflags & EF_MIPS_MACH) {
return "I6400"; case EF_MIPS_MACH_OCTEON:
case EF_MIPS_MACH_OCTEON2:
case EF_MIPS_MACH_OCTEON3:
return "Octeon68XX";
case EF_MIPS_MACH_LS2E:
return "Loongson-2E";
case EF_MIPS_MACH_LS2F:
return "Loongson-2F";
case EF_MIPS_MACH_LS3A:
return "Loongson-3A1000";
default:
break;
} }
if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) { switch (eflags & EF_MIPS_ARCH) {
return "R5900"; case EF_MIPS_ARCH_64R6:
return "I6400";
case EF_MIPS_ARCH_64R2:
return "MIPS64R2-generic";
default:
break;
} }
return "5KEf"; return "5KEf";
} }

View File

@ -68,8 +68,8 @@ SRST
``vmport=on|off|auto`` ``vmport=on|off|auto``
Enables emulation of VMWare IO port, for vmmouse etc. auto says Enables emulation of VMWare IO port, for vmmouse etc. auto says
to select the value based on accel. For accel=xen the default is to select the value based on accel and i8042. For accel=xen or
off otherwise the default is on. i8042=off the default is off otherwise the default is on.
``dump-guest-core=on|off`` ``dump-guest-core=on|off``
Include guest memory in a core dump. The default is on. Include guest memory in a core dump. The default is on.
@ -2704,7 +2704,7 @@ DEF("smbios", HAS_ARG, QEMU_OPTION_smbios,
" specify SMBIOS type 3 fields\n" " specify SMBIOS type 3 fields\n"
"-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str]\n" "-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str]\n"
" [,asset=str][,part=str][,max-speed=%d][,current-speed=%d]\n" " [,asset=str][,part=str][,max-speed=%d][,current-speed=%d]\n"
" [,processor-family=%d,processor-id=%d]\n" " [,processor-family=%d][,processor-id=%d]\n"
" specify SMBIOS type 4 fields\n" " specify SMBIOS type 4 fields\n"
"-smbios type=8[,external_reference=str][,internal_reference=str][,connector_type=%d][,port_type=%d]\n" "-smbios type=8[,external_reference=str][,internal_reference=str][,connector_type=%d][,port_type=%d]\n"
" specify SMBIOS type 8 fields\n" " specify SMBIOS type 8 fields\n"

View File

@ -592,23 +592,29 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
* resulting in a TLB or XTLB Refill exception. * resulting in a TLB or XTLB Refill exception.
*/ */
static bool get_pte(CPUMIPSState *env, uint64_t vaddr, int entry_size, static bool get_pte(CPUMIPSState *env, uint64_t vaddr, MemOp op,
uint64_t *pte) uint64_t *pte, unsigned ptw_mmu_idx)
{ {
if ((vaddr & ((entry_size >> 3) - 1)) != 0) { MemOpIdx oi;
if ((vaddr & (memop_size(op) - 1)) != 0) {
return false; return false;
} }
if (entry_size == 64) {
*pte = cpu_ldq_code(env, vaddr); oi = make_memop_idx(op | MO_TE, ptw_mmu_idx);
if (op == MO_64) {
*pte = cpu_ldq_mmu(env, vaddr, oi, 0);
} else { } else {
*pte = cpu_ldl_code(env, vaddr); *pte = cpu_ldl_mmu(env, vaddr, oi, 0);
} }
return true; return true;
} }
static uint64_t get_tlb_entry_layout(CPUMIPSState *env, uint64_t entry, static uint64_t get_tlb_entry_layout(CPUMIPSState *env, uint64_t entry,
int entry_size, int ptei) MemOp op, int ptei)
{ {
unsigned entry_size = memop_size(op) << 3;
uint64_t result = entry; uint64_t result = entry;
uint64_t rixi; uint64_t rixi;
if (ptei > entry_size) { if (ptei > entry_size) {
@ -624,14 +630,12 @@ static uint64_t get_tlb_entry_layout(CPUMIPSState *env, uint64_t entry,
static int walk_directory(CPUMIPSState *env, uint64_t *vaddr, static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
int directory_index, bool *huge_page, bool *hgpg_directory_hit, int directory_index, bool *huge_page, bool *hgpg_directory_hit,
uint64_t *pw_entrylo0, uint64_t *pw_entrylo1, uint64_t *pw_entrylo0, uint64_t *pw_entrylo1,
unsigned directory_shift, unsigned leaf_shift, int ptw_mmu_idx) MemOp directory_mop, MemOp leaf_mop, int ptw_mmu_idx)
{ {
int dph = (env->CP0_PWCtl >> CP0PC_DPH) & 0x1; int dph = (env->CP0_PWCtl >> CP0PC_DPH) & 0x1;
int psn = (env->CP0_PWCtl >> CP0PC_PSN) & 0x3F; int psn = (env->CP0_PWCtl >> CP0PC_PSN) & 0x3F;
int hugepg = (env->CP0_PWCtl >> CP0PC_HUGEPG) & 0x1; int hugepg = (env->CP0_PWCtl >> CP0PC_HUGEPG) & 0x1;
int pf_ptew = (env->CP0_PWField >> CP0PF_PTEW) & 0x3F; int pf_ptew = (env->CP0_PWField >> CP0PF_PTEW) & 0x3F;
uint32_t direntry_size = 1 << (directory_shift + 3);
uint32_t leafentry_size = 1 << (leaf_shift + 3);
uint64_t entry; uint64_t entry;
uint64_t paddr; uint64_t paddr;
int prot; int prot;
@ -643,14 +647,14 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
/* wrong base address */ /* wrong base address */
return 0; return 0;
} }
if (!get_pte(env, *vaddr, direntry_size, &entry)) { if (!get_pte(env, *vaddr, directory_mop, &entry, ptw_mmu_idx)) {
return 0; return 0;
} }
if ((entry & (1 << psn)) && hugepg) { if ((entry & (1 << psn)) && hugepg) {
*huge_page = true; *huge_page = true;
*hgpg_directory_hit = true; *hgpg_directory_hit = true;
entry = get_tlb_entry_layout(env, entry, leafentry_size, pf_ptew); entry = get_tlb_entry_layout(env, entry, leaf_mop, pf_ptew);
w = directory_index - 1; w = directory_index - 1;
if (directory_index & 0x1) { if (directory_index & 0x1) {
/* Generate adjacent page from same PTE for odd TLB page */ /* Generate adjacent page from same PTE for odd TLB page */
@ -658,7 +662,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
*pw_entrylo0 = entry & ~lsb; /* even page */ *pw_entrylo0 = entry & ~lsb; /* even page */
*pw_entrylo1 = entry | lsb; /* odd page */ *pw_entrylo1 = entry | lsb; /* odd page */
} else if (dph) { } else if (dph) {
int oddpagebit = 1 << leaf_shift; int oddpagebit = 1 << leaf_mop;
uint64_t vaddr2 = *vaddr ^ oddpagebit; uint64_t vaddr2 = *vaddr ^ oddpagebit;
if (*vaddr & oddpagebit) { if (*vaddr & oddpagebit) {
*pw_entrylo1 = entry; *pw_entrylo1 = entry;
@ -669,10 +673,10 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
ptw_mmu_idx) != TLBRET_MATCH) { ptw_mmu_idx) != TLBRET_MATCH) {
return 0; return 0;
} }
if (!get_pte(env, vaddr2, leafentry_size, &entry)) { if (!get_pte(env, vaddr2, leaf_mop, &entry, ptw_mmu_idx)) {
return 0; return 0;
} }
entry = get_tlb_entry_layout(env, entry, leafentry_size, pf_ptew); entry = get_tlb_entry_layout(env, entry, leaf_mop, pf_ptew);
if (*vaddr & oddpagebit) { if (*vaddr & oddpagebit) {
*pw_entrylo0 = entry; *pw_entrylo0 = entry;
} else { } else {
@ -711,7 +715,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
/* Native pointer size */ /* Native pointer size */
/*For the 32-bit architectures, this bit is fixed to 0.*/ /*For the 32-bit architectures, this bit is fixed to 0.*/
int native_shift = (((env->CP0_PWSize >> CP0PS_PS) & 1) == 0) ? 2 : 3; MemOp native_op = (((env->CP0_PWSize >> CP0PS_PS) & 1) == 0) ? MO_32 : MO_64;
/* Indices from PWField */ /* Indices from PWField */
int pf_gdw = (env->CP0_PWField >> CP0PF_GDW) & 0x3F; int pf_gdw = (env->CP0_PWField >> CP0PF_GDW) & 0x3F;
@ -728,11 +732,10 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
/* Other HTW configs */ /* Other HTW configs */
int hugepg = (env->CP0_PWCtl >> CP0PC_HUGEPG) & 0x1; int hugepg = (env->CP0_PWCtl >> CP0PC_HUGEPG) & 0x1;
unsigned directory_shift, leaf_shift; MemOp directory_mop, leaf_mop;
/* Offsets into tables */ /* Offsets into tables */
unsigned goffset, uoffset, moffset, ptoffset0, ptoffset1; unsigned goffset, uoffset, moffset, ptoffset0, ptoffset1;
uint32_t leafentry_size;
/* Starting address - Page Table Base */ /* Starting address - Page Table Base */
uint64_t vaddr = env->CP0_PWBase; uint64_t vaddr = env->CP0_PWBase;
@ -759,23 +762,21 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
} }
/* HTW Shift values (depend on entry size) */ /* HTW Shift values (depend on entry size) */
directory_shift = (hugepg && (ptew == 1)) ? native_shift + 1 : native_shift; directory_mop = (hugepg && (ptew == 1)) ? native_op + 1 : native_op;
leaf_shift = (ptew == 1) ? native_shift + 1 : native_shift; leaf_mop = (ptew == 1) ? native_op + 1 : native_op;
goffset = gindex << directory_shift; goffset = gindex << directory_mop;
uoffset = uindex << directory_shift; uoffset = uindex << directory_mop;
moffset = mindex << directory_shift; moffset = mindex << directory_mop;
ptoffset0 = (ptindex >> 1) << (leaf_shift + 1); ptoffset0 = (ptindex >> 1) << (leaf_mop + 1);
ptoffset1 = ptoffset0 | (1 << (leaf_shift)); ptoffset1 = ptoffset0 | (1 << (leaf_mop));
leafentry_size = 1 << (leaf_shift + 3);
/* Global Directory */ /* Global Directory */
if (gdw > 0) { if (gdw > 0) {
vaddr |= goffset; vaddr |= goffset;
switch (walk_directory(env, &vaddr, pf_gdw, &huge_page, &hgpg_gdhit, switch (walk_directory(env, &vaddr, pf_gdw, &huge_page, &hgpg_gdhit,
&pw_entrylo0, &pw_entrylo1, &pw_entrylo0, &pw_entrylo1,
directory_shift, leaf_shift, ptw_mmu_idx)) directory_mop, leaf_mop, ptw_mmu_idx))
{ {
case 0: case 0:
return false; return false;
@ -792,7 +793,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
vaddr |= uoffset; vaddr |= uoffset;
switch (walk_directory(env, &vaddr, pf_udw, &huge_page, &hgpg_udhit, switch (walk_directory(env, &vaddr, pf_udw, &huge_page, &hgpg_udhit,
&pw_entrylo0, &pw_entrylo1, &pw_entrylo0, &pw_entrylo1,
directory_shift, leaf_shift, ptw_mmu_idx)) directory_mop, leaf_mop, ptw_mmu_idx))
{ {
case 0: case 0:
return false; return false;
@ -809,7 +810,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
vaddr |= moffset; vaddr |= moffset;
switch (walk_directory(env, &vaddr, pf_mdw, &huge_page, &hgpg_mdhit, switch (walk_directory(env, &vaddr, pf_mdw, &huge_page, &hgpg_mdhit,
&pw_entrylo0, &pw_entrylo1, &pw_entrylo0, &pw_entrylo1,
directory_shift, leaf_shift, ptw_mmu_idx)) directory_mop, leaf_mop, ptw_mmu_idx))
{ {
case 0: case 0:
return false; return false;
@ -827,10 +828,10 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
ptw_mmu_idx) != TLBRET_MATCH) { ptw_mmu_idx) != TLBRET_MATCH) {
return false; return false;
} }
if (!get_pte(env, vaddr, leafentry_size, &dir_entry)) { if (!get_pte(env, vaddr, leaf_mop, &dir_entry, ptw_mmu_idx)) {
return false; return false;
} }
dir_entry = get_tlb_entry_layout(env, dir_entry, leafentry_size, pf_ptew); dir_entry = get_tlb_entry_layout(env, dir_entry, leaf_mop, pf_ptew);
pw_entrylo0 = dir_entry; pw_entrylo0 = dir_entry;
/* Leaf Level Page Table - Second half of PTE pair */ /* Leaf Level Page Table - Second half of PTE pair */
@ -839,10 +840,10 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr address,
ptw_mmu_idx) != TLBRET_MATCH) { ptw_mmu_idx) != TLBRET_MATCH) {
return false; return false;
} }
if (!get_pte(env, vaddr, leafentry_size, &dir_entry)) { if (!get_pte(env, vaddr, leaf_mop, &dir_entry, ptw_mmu_idx)) {
return false; return false;
} }
dir_entry = get_tlb_entry_layout(env, dir_entry, leafentry_size, pf_ptew); dir_entry = get_tlb_entry_layout(env, dir_entry, leaf_mop, pf_ptew);
pw_entrylo1 = dir_entry; pw_entrylo1 = dir_entry;
refill: refill:

View File

@ -644,7 +644,7 @@ STF 11 ..... 100100 ..... . ............. @r_r_ri_na
STFSR 11 00000 100101 ..... . ............. @n_r_ri STFSR 11 00000 100101 ..... . ............. @n_r_ri
STXFSR 11 00001 100101 ..... . ............. @n_r_ri STXFSR 11 00001 100101 ..... . ............. @n_r_ri
{ {
STQF 11 ..... 100110 ..... . ............. @q_r_ri_na STQF 11 ..... 100110 ..... . ............. @q_r_ri_na # v9
STDFQ 11 ----- 100110 ----- - ------------- STDFQ 11 ----- 100110 ----- - -------------
} }
STDF 11 ..... 100111 ..... . ............. @d_r_ri_na STDF 11 ..... 100111 ..... . ............. @d_r_ri_na

View File

@ -4521,7 +4521,7 @@ static bool do_st_fpr(DisasContext *dc, arg_r_r_ri_asi *a, MemOp sz)
TRANS(STF, ALL, do_st_fpr, a, MO_32) TRANS(STF, ALL, do_st_fpr, a, MO_32)
TRANS(STDF, ALL, do_st_fpr, a, MO_64) TRANS(STDF, ALL, do_st_fpr, a, MO_64)
TRANS(STQF, ALL, do_st_fpr, a, MO_128) TRANS(STQF, 64, do_st_fpr, a, MO_128)
TRANS(STFA, 64, do_st_fpr, a, MO_32) TRANS(STFA, 64, do_st_fpr, a, MO_32)
TRANS(STDFA, 64, do_st_fpr, a, MO_64) TRANS(STDFA, 64, do_st_fpr, a, MO_64)

View File

@ -135,6 +135,13 @@ def _console_interaction(test, success_message, failure_message,
vm.console_socket.sendall(send_string.encode()) vm.console_socket.sendall(send_string.encode())
if not keep_sending: if not keep_sending:
send_string = None # send only once send_string = None # send only once
# Only consume console output if waiting for something
if success_message is None and failure_message is None:
if send_string is None:
break
continue
try: try:
msg = console.readline().decode().strip() msg = console.readline().decode().strip()
except UnicodeDecodeError: except UnicodeDecodeError:

View File

@ -45,7 +45,6 @@ def missing_deps():
# QEMU already installed and use that. # QEMU already installed and use that.
# XXX: The order of these tests seems to matter, see git blame. # XXX: The order of these tests seems to matter, see git blame.
@skipIf(missing_deps(), 'dependencies (%s) not installed' % ','.join(deps)) @skipIf(missing_deps(), 'dependencies (%s) not installed' % ','.join(deps))
@skipUnless(os.getenv('QEMU_TEST_FLAKY_TESTS'), 'Test sometimes gets stuck due to console handling problem')
@skipUnless(os.getenv('AVOCADO_ALLOW_LARGE_STORAGE'), 'storage limited') @skipUnless(os.getenv('AVOCADO_ALLOW_LARGE_STORAGE'), 'storage limited')
@skipUnless(os.getenv('SPEED') == 'slow', 'runtime limited') @skipUnless(os.getenv('SPEED') == 'slow', 'runtime limited')
class HypervisorTest(QemuSystemTest): class HypervisorTest(QemuSystemTest):