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target/i386: Add support for Zhaoxin CPU vendor identification

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Zhaoxin currently uses two vendors: "Shanghai" and "Centaurhauls".
It is important to note that the latter now belongs to Zhaoxin. Therefore,
this patch replaces CPUID_VENDOR_VIA with CPUID_VENDOR_ZHAOXIN1.

The previous CPUID_VENDOR_VIA macro was only defined but never used in
QEMU, making this change straightforward.

Additionally, the IS_ZHAOXIN_CPU macro has been added to simplify the
checks for Zhaoxin CPUs.

Signed-off-by: EwanHai <ewanhai-oc@zhaoxin.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250113074413.297793-2-ewanhai-oc@zhaoxin.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
EwanHai 2025-01-13 02:44:10 -05:00 committed by Paolo Bonzini
parent aeb7969cba
commit 5d20aa540b
1 changed files with 19 additions and 1 deletions
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20
target/i386/cpu.h
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@ -1122,7 +1122,16 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w);
#define CPUID_VENDOR_AMD_3 0x444d4163 /* "cAMD" */
#define CPUID_VENDOR_AMD "AuthenticAMD"
#define CPUID_VENDOR_VIA "CentaurHauls"
#define CPUID_VENDOR_ZHAOXIN1_1 0x746E6543 /* "Cent" */
#define CPUID_VENDOR_ZHAOXIN1_2 0x48727561 /* "aurH" */
#define CPUID_VENDOR_ZHAOXIN1_3 0x736C7561 /* "auls" */
#define CPUID_VENDOR_ZHAOXIN2_1 0x68532020 /* " Sh" */
#define CPUID_VENDOR_ZHAOXIN2_2 0x68676E61 /* "angh" */
#define CPUID_VENDOR_ZHAOXIN2_3 0x20206961 /* "ai " */
#define CPUID_VENDOR_ZHAOXIN1 "CentaurHauls"
#define CPUID_VENDOR_ZHAOXIN2 " Shanghai "
#define CPUID_VENDOR_HYGON "HygonGenuine"
@ -1132,6 +1141,15 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w);
#define IS_AMD_CPU(env) ((env)->cpuid_vendor1 == CPUID_VENDOR_AMD_1 && \
(env)->cpuid_vendor2 == CPUID_VENDOR_AMD_2 && \
(env)->cpuid_vendor3 == CPUID_VENDOR_AMD_3)
#define IS_ZHAOXIN1_CPU(env) \
((env)->cpuid_vendor1 == CPUID_VENDOR_ZHAOXIN1_1 && \
(env)->cpuid_vendor2 == CPUID_VENDOR_ZHAOXIN1_2 && \
(env)->cpuid_vendor3 == CPUID_VENDOR_ZHAOXIN1_3)
#define IS_ZHAOXIN2_CPU(env) \
((env)->cpuid_vendor1 == CPUID_VENDOR_ZHAOXIN2_1 && \
(env)->cpuid_vendor2 == CPUID_VENDOR_ZHAOXIN2_2 && \
(env)->cpuid_vendor3 == CPUID_VENDOR_ZHAOXIN2_3)
#define IS_ZHAOXIN_CPU(env) (IS_ZHAOXIN1_CPU(env) || IS_ZHAOXIN2_CPU(env))
#define CPUID_MWAIT_IBE (1U << 1) /* Interrupts can exit capability */
#define CPUID_MWAIT_EMX (1U << 0) /* enumeration supported */