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target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav8

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Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220822152741.1617527-9-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-08-22 08:26:43 -07:00 committed by Peter Maydell
parent e59367e2ef
commit 5272b23e2e
1 changed files with 14 additions and 14 deletions
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28
target/arm/ptw.c
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@ -1967,8 +1967,7 @@ void v8m_security_lookup(CPUARMState *env, uint32_t address,
static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx, MMUAccessType access_type, ARMMMUIdx mmu_idx,
hwaddr *phys_ptr, MemTxAttrs *txattrs, GetPhysAddrResult *result,
int *prot, target_ulong *page_size,
ARMMMUFaultInfo *fi) ARMMMUFaultInfo *fi)
{ {
uint32_t secure = regime_is_secure(env, mmu_idx); uint32_t secure = regime_is_secure(env, mmu_idx);
@ -2003,9 +2002,9 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
} else { } else {
fi->type = ARMFault_QEMU_SFault; fi->type = ARMFault_QEMU_SFault;
} }
*page_size = sattrs.subpage ? 1 : TARGET_PAGE_SIZE; result->page_size = sattrs.subpage ? 1 : TARGET_PAGE_SIZE;
*phys_ptr = address; result->phys = address;
*prot = 0; result->prot = 0;
return true; return true;
} }
} else { } else {
@ -2015,7 +2014,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
* might downgrade a secure access to nonsecure. * might downgrade a secure access to nonsecure.
*/ */
if (sattrs.ns) { if (sattrs.ns) {
txattrs->secure = false; result->attrs.secure = false;
} else if (!secure) { } else if (!secure) {
/* /*
* NS access to S memory must fault. * NS access to S memory must fault.
@ -2028,17 +2027,19 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
* for M_FAKE_FSR_SFAULT in arm_v7m_cpu_do_interrupt(). * for M_FAKE_FSR_SFAULT in arm_v7m_cpu_do_interrupt().
*/ */
fi->type = ARMFault_QEMU_SFault; fi->type = ARMFault_QEMU_SFault;
*page_size = sattrs.subpage ? 1 : TARGET_PAGE_SIZE; result->page_size = sattrs.subpage ? 1 : TARGET_PAGE_SIZE;
*phys_ptr = address; result->phys = address;
*prot = 0; result->prot = 0;
return true; return true;
} }
} }
} }
ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx, phys_ptr, ret = pmsav8_mpu_lookup(env, address, access_type, mmu_idx,
txattrs, prot, &mpu_is_subpage, fi, NULL); &result->phys, &result->attrs, &result->prot,
*page_size = sattrs.subpage || mpu_is_subpage ? 1 : TARGET_PAGE_SIZE; &mpu_is_subpage, fi, NULL);
result->page_size =
sattrs.subpage || mpu_is_subpage ? 1 : TARGET_PAGE_SIZE;
return ret; return ret;
} }
@ -2416,8 +2417,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
if (arm_feature(env, ARM_FEATURE_V8)) { if (arm_feature(env, ARM_FEATURE_V8)) {
/* PMSAv8 */ /* PMSAv8 */
ret = get_phys_addr_pmsav8(env, address, access_type, mmu_idx, ret = get_phys_addr_pmsav8(env, address, access_type, mmu_idx,
&result->phys, &result->attrs, result, fi);
&result->prot, &result->page_size, fi);
} else if (arm_feature(env, ARM_FEATURE_V7)) { } else if (arm_feature(env, ARM_FEATURE_V7)) {
/* PMSAv7 */ /* PMSAv7 */
ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx, ret = get_phys_addr_pmsav7(env, address, access_type, mmu_idx,