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hw/pci-host/designware: Add 'host_mem' variable for clarity

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designware_pcie_root_realize() uses get_system_memory()
as the "host side memory region", as opposed to the "PCI
side" one. Introduce the 'host_mem' variable for clarity.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-Id: <20231012121857.31873-4-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-10-12 13:09:45 +02:00
parent 13a07eb146
commit 50e4291d62
1 changed files with 3 additions and 2 deletions
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5
hw/pci-host/designware.c
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@ -395,6 +395,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp)
{ {
DesignwarePCIERoot *root = DESIGNWARE_PCIE_ROOT(dev); DesignwarePCIERoot *root = DESIGNWARE_PCIE_ROOT(dev);
DesignwarePCIEHost *host = designware_pcie_root_to_host(root); DesignwarePCIEHost *host = designware_pcie_root_to_host(root);
MemoryRegion *host_mem = get_system_memory();
MemoryRegion *address_space = &host->pci.memory; MemoryRegion *address_space = &host->pci.memory;
PCIBridge *br = PCI_BRIDGE(dev); PCIBridge *br = PCI_BRIDGE(dev);
DesignwarePCIEViewport *viewport; DesignwarePCIEViewport *viewport;
@ -435,7 +436,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp)
viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM; viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM;
source = &host->pci.address_space_root; source = &host->pci.address_space_root;
destination = get_system_memory(); destination = host_mem;
direction = "Inbound"; direction = "Inbound";
/* /*
@ -460,7 +461,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp)
destination = &host->pci.memory; destination = &host->pci.memory;
direction = "Outbound"; direction = "Outbound";
source = get_system_memory(); source = host_mem;
/* /*
* Configure MemoryRegion implementing CPU -> PCI memory * Configure MemoryRegion implementing CPU -> PCI memory