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target/arm: Move m_is_{ppb,system}_region to ptw.c

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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220604040607.269301-13-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-06-08 19:38:50 +01:00 committed by Peter Maydell
parent 2c1f429df3
commit 47ff5ba9d0
3 changed files with 16 additions and 18 deletions
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15
target/arm/helper.c
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@ -11677,21 +11677,6 @@ do_fault:
return true; return true;
} }
bool m_is_ppb_region(CPUARMState *env, uint32_t address)
{
/* True if address is in the M profile PPB region 0xe0000000 - 0xe00fffff */
return arm_feature(env, ARM_FEATURE_M) &&
extract32(address, 20, 12) == 0xe00;
}
bool m_is_system_region(CPUARMState *env, uint32_t address)
{
/* True if address is in the M profile system region
* 0xe0000000 - 0xffffffff
*/
return arm_feature(env, ARM_FEATURE_M) && extract32(address, 29, 3) == 0x7;
}
/* Combine either inner or outer cacheability attributes for normal /* Combine either inner or outer cacheability attributes for normal
* memory, according to table D4-42 and pseudocode procedure * memory, according to table D4-42 and pseudocode procedure
* CombineS1S2AttrHints() of ARM DDI 0487B.b (the ARMv8 ARM). * CombineS1S2AttrHints() of ARM DDI 0487B.b (the ARMv8 ARM).

16
target/arm/ptw.c
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@ -416,6 +416,22 @@ static void get_phys_addr_pmsav7_default(CPUARMState *env, ARMMMUIdx mmu_idx,
} }
} }
static bool m_is_ppb_region(CPUARMState *env, uint32_t address)
{
/* True if address is in the M profile PPB region 0xe0000000 - 0xe00fffff */
return arm_feature(env, ARM_FEATURE_M) &&
extract32(address, 20, 12) == 0xe00;
}
static bool m_is_system_region(CPUARMState *env, uint32_t address)
{
/*
* True if address is in the M profile system region
* 0xe0000000 - 0xffffffff
*/
return arm_feature(env, ARM_FEATURE_M) && extract32(address, 29, 3) == 0x7;
}
static bool pmsav7_use_background_region(ARMCPU *cpu, ARMMMUIdx mmu_idx, static bool pmsav7_use_background_region(ARMCPU *cpu, ARMMMUIdx mmu_idx,
bool is_user) bool is_user)
{ {

3
target/arm/ptw.h
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@ -33,9 +33,6 @@ simple_ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, int ap)
return simple_ap_to_rw_prot_is_user(ap, regime_is_user(env, mmu_idx)); return simple_ap_to_rw_prot_is_user(ap, regime_is_user(env, mmu_idx));
} }
bool m_is_ppb_region(CPUARMState *env, uint32_t address);
bool m_is_system_region(CPUARMState *env, uint32_t address);
bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx, MMUAccessType access_type, ARMMMUIdx mmu_idx,
bool s1_is_el0, bool s1_is_el0,