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arm_gic: Introduce define for GIC_NR_SGIS

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Instead of hardcoding 16 various places in the code, use a define to
make it more clear what is going on.

Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Christoffer Dall 2014-01-31 14:47:38 +00:00 committed by Peter Maydell
parent 4d1cef840d
commit 41ab7b5510
2 changed files with 12 additions and 6 deletions
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17
hw/intc/arm_gic.c
View File

@ -380,8 +380,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
irq = (offset - 0x100) * 8 + GIC_BASE_IRQ; irq = (offset - 0x100) * 8 + GIC_BASE_IRQ;
if (irq >= s->num_irq) if (irq >= s->num_irq)
goto bad_reg; goto bad_reg;
if (irq < 16) if (irq < GIC_NR_SGIS) {
value = 0xff; value = 0xff;
}
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (value & (1 << i)) { if (value & (1 << i)) {
int mask = int mask =
@ -406,8 +408,10 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
irq = (offset - 0x180) * 8 + GIC_BASE_IRQ; irq = (offset - 0x180) * 8 + GIC_BASE_IRQ;
if (irq >= s->num_irq) if (irq >= s->num_irq)
goto bad_reg; goto bad_reg;
if (irq < 16) if (irq < GIC_NR_SGIS) {
value = 0; value = 0;
}
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (value & (1 << i)) { if (value & (1 << i)) {
int cm = (irq < GIC_INTERNAL) ? (1 << cpu) : ALL_CPU_MASK; int cm = (irq < GIC_INTERNAL) ? (1 << cpu) : ALL_CPU_MASK;
@ -423,8 +427,9 @@ static void gic_dist_writeb(void *opaque, hwaddr offset,
irq = (offset - 0x200) * 8 + GIC_BASE_IRQ; irq = (offset - 0x200) * 8 + GIC_BASE_IRQ;
if (irq >= s->num_irq) if (irq >= s->num_irq)
goto bad_reg; goto bad_reg;
if (irq < 16) if (irq < GIC_NR_SGIS) {
irq = 0; irq = 0;
}
for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) {
if (value & (1 << i)) { if (value & (1 << i)) {

1
include/hw/intc/arm_gic_common.h
View File

@ -27,6 +27,7 @@
#define GIC_MAXIRQ 1020 #define GIC_MAXIRQ 1020
/* First 32 are private to each CPU (SGIs and PPIs). */ /* First 32 are private to each CPU (SGIs and PPIs). */
#define GIC_INTERNAL 32 #define GIC_INTERNAL 32
#define GIC_NR_SGIS 16
/* Maximum number of possible CPU interfaces, determined by GIC architecture */ /* Maximum number of possible CPU interfaces, determined by GIC architecture */
#define GIC_NCPU 8 #define GIC_NCPU 8