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target/microblaze: Consider endianness while translating code

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Consider the CPU ENDI bit, swap instructions when the CPU
endianness doesn't match the binary one.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20241105130431.22564-17-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-09-24 23:45:54 +02:00
parent 2c9e8ddd76
commit 415aae543e
2 changed files with 10 additions and 2 deletions
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7
target/microblaze/cpu.h
View File

@ -414,6 +414,13 @@ void mb_translate_code(CPUState *cs, TranslationBlock *tb,
/* Ensure there is no overlap between the two masks. */
QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK);
static inline bool mb_cpu_is_big_endian(CPUState *cs)
{
MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
return !cpu->cfg.endi;
}
static inline void cpu_get_tb_cpu_state(CPUMBState *env, vaddr *pc,
uint64_t *cs_base, uint32_t *flags)
{

5
target/microblaze/translate.c
View File

@ -710,7 +710,7 @@ static void record_unaligned_ess(DisasContext *dc, int rd,
static inline MemOp mo_endian(DisasContext *dc)
{
return MO_TE;
return dc->cfg->endi ? MO_LE : MO_BE;
}
static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
@ -1647,7 +1647,8 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs)
dc->tb_flags_to_set = 0;
ir = translator_ldl(cpu_env(cs), &dc->base, dc->base.pc_next);
ir = translator_ldl_swap(cpu_env(cs), &dc->base, dc->base.pc_next,
mb_cpu_is_big_endian(cs) != TARGET_BIG_ENDIAN);
if (!decode(dc, ir)) {
trap_illegal(dc, true);
}