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target/microblaze: Set MO_TE once in do_load() / do_store()

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All callers of do_load() / do_store() set MO_TE flag.
Set it once in the callees.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20241105130431.22564-15-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-09-24 23:42:38 +02:00
parent 607854ae7c
commit 401bd7d340
1 changed files with 20 additions and 16 deletions
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36
target/microblaze/translate.c
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@ -713,6 +713,8 @@ static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
{ {
MemOp size = mop & MO_SIZE; MemOp size = mop & MO_SIZE;
mop |= MO_TE;
/* /*
* When doing reverse accesses we need to do two things. * When doing reverse accesses we need to do two things.
* *
@ -780,13 +782,13 @@ static bool trans_lbui(DisasContext *dc, arg_typeb *arg)
static bool trans_lhu(DisasContext *dc, arg_typea *arg) static bool trans_lhu(DisasContext *dc, arg_typea *arg)
{ {
TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb);
return do_load(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, false); return do_load(dc, arg->rd, addr, MO_UW, dc->mem_index, false);
} }
static bool trans_lhur(DisasContext *dc, arg_typea *arg) static bool trans_lhur(DisasContext *dc, arg_typea *arg)
{ {
TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb);
return do_load(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, true); return do_load(dc, arg->rd, addr, MO_UW, dc->mem_index, true);
} }
static bool trans_lhuea(DisasContext *dc, arg_typea *arg) static bool trans_lhuea(DisasContext *dc, arg_typea *arg)
@ -798,26 +800,26 @@ static bool trans_lhuea(DisasContext *dc, arg_typea *arg)
return true; return true;
#else #else
TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
return do_load(dc, arg->rd, addr, MO_TE | MO_UW, MMU_NOMMU_IDX, false); return do_load(dc, arg->rd, addr, MO_UW, MMU_NOMMU_IDX, false);
#endif #endif
} }
static bool trans_lhui(DisasContext *dc, arg_typeb *arg) static bool trans_lhui(DisasContext *dc, arg_typeb *arg)
{ {
TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm); TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm);
return do_load(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, false); return do_load(dc, arg->rd, addr, MO_UW, dc->mem_index, false);
} }
static bool trans_lw(DisasContext *dc, arg_typea *arg) static bool trans_lw(DisasContext *dc, arg_typea *arg)
{ {
TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb);
return do_load(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, false); return do_load(dc, arg->rd, addr, MO_UL, dc->mem_index, false);
} }
static bool trans_lwr(DisasContext *dc, arg_typea *arg) static bool trans_lwr(DisasContext *dc, arg_typea *arg)
{ {
TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb);
return do_load(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, true); return do_load(dc, arg->rd, addr, MO_UL, dc->mem_index, true);
} }
static bool trans_lwea(DisasContext *dc, arg_typea *arg) static bool trans_lwea(DisasContext *dc, arg_typea *arg)
@ -829,14 +831,14 @@ static bool trans_lwea(DisasContext *dc, arg_typea *arg)
return true; return true;
#else #else
TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
return do_load(dc, arg->rd, addr, MO_TE | MO_UL, MMU_NOMMU_IDX, false); return do_load(dc, arg->rd, addr, MO_UL, MMU_NOMMU_IDX, false);
#endif #endif
} }
static bool trans_lwi(DisasContext *dc, arg_typeb *arg) static bool trans_lwi(DisasContext *dc, arg_typeb *arg)
{ {
TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm); TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm);
return do_load(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, false); return do_load(dc, arg->rd, addr, MO_UL, dc->mem_index, false);
} }
static bool trans_lwx(DisasContext *dc, arg_typea *arg) static bool trans_lwx(DisasContext *dc, arg_typea *arg)
@ -863,6 +865,8 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
{ {
MemOp size = mop & MO_SIZE; MemOp size = mop & MO_SIZE;
mop |= MO_TE;
/* /*
* When doing reverse accesses we need to do two things. * When doing reverse accesses we need to do two things.
* *
@ -930,13 +934,13 @@ static bool trans_sbi(DisasContext *dc, arg_typeb *arg)
static bool trans_sh(DisasContext *dc, arg_typea *arg) static bool trans_sh(DisasContext *dc, arg_typea *arg)
{ {
TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb);
return do_store(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, false); return do_store(dc, arg->rd, addr, MO_UW, dc->mem_index, false);
} }
static bool trans_shr(DisasContext *dc, arg_typea *arg) static bool trans_shr(DisasContext *dc, arg_typea *arg)
{ {
TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb);
return do_store(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, true); return do_store(dc, arg->rd, addr, MO_UW, dc->mem_index, true);
} }
static bool trans_shea(DisasContext *dc, arg_typea *arg) static bool trans_shea(DisasContext *dc, arg_typea *arg)
@ -948,26 +952,26 @@ static bool trans_shea(DisasContext *dc, arg_typea *arg)
return true; return true;
#else #else
TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
return do_store(dc, arg->rd, addr, MO_TE | MO_UW, MMU_NOMMU_IDX, false); return do_store(dc, arg->rd, addr, MO_UW, MMU_NOMMU_IDX, false);
#endif #endif
} }
static bool trans_shi(DisasContext *dc, arg_typeb *arg) static bool trans_shi(DisasContext *dc, arg_typeb *arg)
{ {
TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm); TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm);
return do_store(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, false); return do_store(dc, arg->rd, addr, MO_UW, dc->mem_index, false);
} }
static bool trans_sw(DisasContext *dc, arg_typea *arg) static bool trans_sw(DisasContext *dc, arg_typea *arg)
{ {
TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb);
return do_store(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, false); return do_store(dc, arg->rd, addr, MO_UL, dc->mem_index, false);
} }
static bool trans_swr(DisasContext *dc, arg_typea *arg) static bool trans_swr(DisasContext *dc, arg_typea *arg)
{ {
TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb);
return do_store(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, true); return do_store(dc, arg->rd, addr, MO_UL, dc->mem_index, true);
} }
static bool trans_swea(DisasContext *dc, arg_typea *arg) static bool trans_swea(DisasContext *dc, arg_typea *arg)
@ -979,14 +983,14 @@ static bool trans_swea(DisasContext *dc, arg_typea *arg)
return true; return true;
#else #else
TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb); TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb);
return do_store(dc, arg->rd, addr, MO_TE | MO_UL, MMU_NOMMU_IDX, false); return do_store(dc, arg->rd, addr, MO_UL, MMU_NOMMU_IDX, false);
#endif #endif
} }
static bool trans_swi(DisasContext *dc, arg_typeb *arg) static bool trans_swi(DisasContext *dc, arg_typeb *arg)
{ {
TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm); TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm);
return do_store(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, false); return do_store(dc, arg->rd, addr, MO_UL, dc->mem_index, false);
} }
static bool trans_swx(DisasContext *dc, arg_typea *arg) static bool trans_swx(DisasContext *dc, arg_typea *arg)