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Coding style fixes in PowerPC related code (no functional change):

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- avoid useless blanks at EOL.
- avoid tabs.
- fix wrapping lines on 80 chars terminals.
- add missing ';' at macros EOL to avoid confusing auto-identers.
- fix identation.
- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3178 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-09-17 08:21:54 +00:00
parent 3b46e62427
commit 3608160206
13 changed files with 274 additions and 267 deletions
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11
hw/ppc405_uc.c
View File

@ -924,7 +924,8 @@ enum {
SDRAM0_CFGDATA = 0x011, SDRAM0_CFGDATA = 0x011,
}; };
static uint32_t sdram_bcr (target_phys_addr_t ram_base, target_phys_addr_t ram_size) static uint32_t sdram_bcr (target_phys_addr_t ram_base,
target_phys_addr_t ram_size)
{ {
uint32_t bcr; uint32_t bcr;
@ -1217,9 +1218,11 @@ void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
sdram->irq = irq; sdram->irq = irq;
sdram->nbanks = nbanks; sdram->nbanks = nbanks;
memset(sdram->ram_bases, 0, 4 * sizeof(target_phys_addr_t)); memset(sdram->ram_bases, 0, 4 * sizeof(target_phys_addr_t));
memcpy(sdram->ram_bases, ram_bases, nbanks * sizeof(target_phys_addr_t)); memcpy(sdram->ram_bases, ram_bases,
nbanks * sizeof(target_phys_addr_t));
memset(sdram->ram_sizes, 0, 4 * sizeof(target_phys_addr_t)); memset(sdram->ram_sizes, 0, 4 * sizeof(target_phys_addr_t));
memcpy(sdram->ram_sizes, ram_sizes, nbanks * sizeof(target_phys_addr_t)); memcpy(sdram->ram_sizes, ram_sizes,
nbanks * sizeof(target_phys_addr_t));
sdram_reset(sdram); sdram_reset(sdram);
qemu_register_reset(&sdram_reset, sdram); qemu_register_reset(&sdram_reset, sdram);
ppc_dcr_register(env, SDRAM0_CFGADDR, ppc_dcr_register(env, SDRAM0_CFGADDR,
@ -2212,7 +2215,6 @@ static void ppc4xx_gpt_set_outputs (ppc4xx_gpt_t *gpt)
} }
mask = mask >> 1; mask = mask >> 1;
} }
} }
static void ppc4xx_gpt_set_irqs (ppc4xx_gpt_t *gpt) static void ppc4xx_gpt_set_irqs (ppc4xx_gpt_t *gpt)
@ -2228,7 +2230,6 @@ static void ppc4xx_gpt_set_irqs (ppc4xx_gpt_t *gpt)
qemu_irq_lower(gpt->irqs[i]); qemu_irq_lower(gpt->irqs[i]);
mask = mask >> 1; mask = mask >> 1;
} }
} }
static void ppc4xx_gpt_compute_timer (ppc4xx_gpt_t *gpt) static void ppc4xx_gpt_compute_timer (ppc4xx_gpt_t *gpt)

23
hw/ppc_chrp.c
View File

@ -46,22 +46,26 @@ static int macio_nvram_mem_index = -1;
/* DBDMA: currently no op - should suffice right now */ /* DBDMA: currently no op - should suffice right now */
static void dbdma_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) static void dbdma_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{ {
printf("%s: 0x" PADDRX " <= 0x%08x\n", __func__, addr, value); printf("%s: 0x" PADDRX " <= 0x%08x\n", __func__, addr, value);
} }
static void dbdma_writew (void *opaque, target_phys_addr_t addr, uint32_t value) static void dbdma_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{ {
} }
static void dbdma_writel (void *opaque, target_phys_addr_t addr, uint32_t value) static void dbdma_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{ {
} }
static uint32_t dbdma_readb (void *opaque, target_phys_addr_t addr) static uint32_t dbdma_readb (void *opaque, target_phys_addr_t addr)
{ {
printf("%s: 0x" PADDRX " => 0x00000000\n", __func__, addr); printf("%s: 0x" PADDRX " => 0x00000000\n", __func__, addr);
return 0; return 0;
} }
@ -92,7 +96,8 @@ typedef struct MacIONVRAMState {
uint8_t data[0x2000]; uint8_t data[0x2000];
} MacIONVRAMState; } MacIONVRAMState;
static void macio_nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) static void macio_nvram_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{ {
MacIONVRAMState *s = opaque; MacIONVRAMState *s = opaque;
addr = (addr >> 4) & 0x1fff; addr = (addr >> 4) & 0x1fff;
@ -108,6 +113,7 @@ static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
addr = (addr >> 4) & 0x1fff; addr = (addr >> 4) & 0x1fff;
value = s->data[addr]; value = s->data[addr];
// printf("macio_nvram_readb %04x = %02x\n", addr, value); // printf("macio_nvram_readb %04x = %02x\n", addr, value);
return value; return value;
} }
@ -131,6 +137,7 @@ static MacIONVRAMState *macio_nvram_init(void)
return NULL; return NULL;
macio_nvram_mem_index = cpu_register_io_memory(0, macio_nvram_read, macio_nvram_mem_index = cpu_register_io_memory(0, macio_nvram_read,
macio_nvram_write, s); macio_nvram_write, s);
return s; return s;
} }
@ -152,7 +159,8 @@ static void macio_map(PCIDevice *pci_dev, int region_num,
openpic_mem_index); openpic_mem_index);
} }
if (macio_nvram_mem_index >= 0) if (macio_nvram_mem_index >= 0)
cpu_register_physical_memory(addr + 0x60000, 0x20000, macio_nvram_mem_index); cpu_register_physical_memory(addr + 0x60000, 0x20000,
macio_nvram_mem_index);
} }
static void macio_init (PCIBus *bus, int device_id) static void macio_init (PCIBus *bus, int device_id)
@ -204,6 +212,7 @@ static CPUReadMemoryFunc *unin_read[] = {
/* temporary frame buffer OSI calls for the video.x driver. The right /* temporary frame buffer OSI calls for the video.x driver. The right
solution is to modify the driver to use VGA PCI I/Os */ solution is to modify the driver to use VGA PCI I/Os */
/* XXX: to be removed. This is no way related to emulation */
static int vga_osi_call (CPUState *env) static int vga_osi_call (CPUState *env)
{ {
static int vga_vbl_enabled; static int vga_vbl_enabled;
@ -264,6 +273,7 @@ static int vga_osi_call(CPUState *env)
fprintf(stderr, "unsupported OSI call R5=" REGX "\n", env->gpr[5]); fprintf(stderr, "unsupported OSI call R5=" REGX "\n", env->gpr[5]);
break; break;
} }
return 1; /* osi_call handled */ return 1; /* osi_call handled */
} }
@ -503,8 +513,7 @@ static void ppc_chrp_init (int ram_size, int vga_ram_size, int boot_device,
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
break; break;
default: default:
cpu_abort(env, cpu_abort(env, "Bus model not supported on mac99 machine\n");
"Only bus model not supported on mac99 machine\n");
exit(1); exit(1);
} }
} }

12
hw/ppc_prep.c
View File

@ -177,12 +177,14 @@ static struct {
/* Error diagnostic */ /* Error diagnostic */
} XCSR; } XCSR;
static void PPC_XCSR_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) static void PPC_XCSR_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{ {
printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value); printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value);
} }
static void PPC_XCSR_writew (void *opaque, target_phys_addr_t addr, uint32_t value) static void PPC_XCSR_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{ {
#ifdef TARGET_WORDS_BIGENDIAN #ifdef TARGET_WORDS_BIGENDIAN
value = bswap16(value); value = bswap16(value);
@ -190,7 +192,8 @@ static void PPC_XCSR_writew (void *opaque, target_phys_addr_t addr, uint32_t val
printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value); printf("%s: 0x%08lx => 0x%08x\n", __func__, (long)addr, value);
} }
static void PPC_XCSR_writel (void *opaque, target_phys_addr_t addr, uint32_t value) static void PPC_XCSR_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{ {
#ifdef TARGET_WORDS_BIGENDIAN #ifdef TARGET_WORDS_BIGENDIAN
value = bswap32(value); value = bswap32(value);
@ -664,7 +667,8 @@ static void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory); cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory);
/* PowerPC control and status register group */ /* PowerPC control and status register group */
#if 0 #if 0
PPC_io_memory = cpu_register_io_memory(0, PPC_XCSR_read, PPC_XCSR_write, NULL); PPC_io_memory = cpu_register_io_memory(0, PPC_XCSR_read, PPC_XCSR_write,
NULL);
cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory); cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory);
#endif #endif

2
target-ppc/cpu.h
View File

@ -891,7 +891,7 @@ void store_40x_sler (CPUPPCState *env, uint32_t val);
void store_booke_tcr (CPUPPCState *env, target_ulong val); void store_booke_tcr (CPUPPCState *env, target_ulong val);
void store_booke_tsr (CPUPPCState *env, target_ulong val); void store_booke_tsr (CPUPPCState *env, target_ulong val);
void ppc_tlb_invalidate_all (CPUPPCState *env); void ppc_tlb_invalidate_all (CPUPPCState *env);
int ppcemb_tlb_search (CPUPPCState *env, target_ulong address); int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid);
#endif #endif
#endif #endif

7
target-ppc/exec.h
View File

@ -58,10 +58,6 @@ register unsigned long T2 asm(AREG3);
#define T1_avr (env->t1_avr) #define T1_avr (env->t1_avr)
#define T2_avr (env->t2_avr) #define T2_avr (env->t2_avr)
/* XXX: to clean: remove this mess */
#define PARAM(n) ((uint32_t)PARAM##n)
#define SPARAM(n) ((int32_t)PARAM##n)
#define FT0 (env->ft0) #define FT0 (env->ft0)
#define FT1 (env->ft1) #define FT1 (env->ft1)
#define FT2 (env->ft2) #define FT2 (env->ft2)
@ -122,7 +118,8 @@ static inline void regs_to_env(void)
int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int is_user, int is_softmmu); int is_user, int is_softmmu);
static inline int cpu_halted(CPUState *env) { static inline int cpu_halted (CPUState *env)
{
if (!env->halted) if (!env->halted)
return 0; return 0;
if (env->msr[MSR_EE] && (env->interrupt_request & CPU_INTERRUPT_HARD)) { if (env->msr[MSR_EE] && (env->interrupt_request & CPU_INTERRUPT_HARD)) {

24
target-ppc/helper.c
View File

@ -64,6 +64,7 @@ target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr)
{ {
return addr; return addr;
} }
#else #else
/* Common routines used by software and hardware TLBs emulation */ /* Common routines used by software and hardware TLBs emulation */
static inline int pte_is_valid (target_ulong pte0) static inline int pte_is_valid (target_ulong pte0)
@ -635,7 +636,8 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx,
/* Generic TLB check function for embedded PowerPC implementations */ /* Generic TLB check function for embedded PowerPC implementations */
static int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb, static int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
target_phys_addr_t *raddrp, target_phys_addr_t *raddrp,
target_ulong address, int i) target_ulong address,
uint32_t pid, int ext, int i)
{ {
target_ulong mask; target_ulong mask;
@ -649,22 +651,25 @@ static int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb,
if (loglevel != 0) { if (loglevel != 0) {
fprintf(logfile, "%s: TLB %d address " ADDRX " PID %d <=> " fprintf(logfile, "%s: TLB %d address " ADDRX " PID %d <=> "
ADDRX " " ADDRX " %d\n", ADDRX " " ADDRX " %d\n",
__func__, i, address, (int)env->spr[SPR_40x_PID], __func__, i, address, pid, tlb->EPN, mask, (int)tlb->PID);
tlb->EPN, mask, (int)tlb->PID);
} }
/* Check PID */ /* Check PID */
if (tlb->PID != 0 && tlb->PID != env->spr[SPR_40x_PID]) if (tlb->PID != 0 && tlb->PID != pid)
return -1; return -1;
/* Check effective address */ /* Check effective address */
if ((address & mask) != tlb->EPN) if ((address & mask) != tlb->EPN)
return -1; return -1;
*raddrp = (tlb->RPN & mask) | (address & ~mask); *raddrp = (tlb->RPN & mask) | (address & ~mask);
if (ext) {
/* Extend the physical address to 36 bits */
*raddrp |= (target_phys_addr_t)(tlb->RPN & 0xF) << 32;
}
return 0; return 0;
} }
/* Generic TLB search function for PowerPC embedded implementations */ /* Generic TLB search function for PowerPC embedded implementations */
int ppcemb_tlb_search (CPUState *env, target_ulong address) int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid)
{ {
ppcemb_tlb_t *tlb; ppcemb_tlb_t *tlb;
target_phys_addr_t raddr; target_phys_addr_t raddr;
@ -674,7 +679,7 @@ int ppcemb_tlb_search (CPUState *env, target_ulong address)
ret = -1; ret = -1;
for (i = 0; i < 64; i++) { for (i = 0; i < 64; i++) {
tlb = &env->tlb[i].tlbe; tlb = &env->tlb[i].tlbe;
if (ppcemb_tlb_check(env, tlb, &raddr, address, i) == 0) { if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, 0, i) == 0) {
ret = i; ret = i;
break; break;
} }
@ -703,7 +708,7 @@ void ppc4xx_tlb_invalidate_all (CPUState *env)
tlb_flush(env, 1); tlb_flush(env, 1);
} }
int mmu4xx_get_physical_address (CPUState *env, mmu_ctx_t *ctx, int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
target_ulong address, int rw, int access_type) target_ulong address, int rw, int access_type)
{ {
ppcemb_tlb_t *tlb; ppcemb_tlb_t *tlb;
@ -714,7 +719,8 @@ int mmu4xx_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
raddr = -1; raddr = -1;
for (i = 0; i < env->nb_tlb; i++) { for (i = 0; i < env->nb_tlb; i++) {
tlb = &env->tlb[i].tlbe; tlb = &env->tlb[i].tlbe;
if (ppcemb_tlb_check(env, tlb, &raddr, address, i) < 0) if (ppcemb_tlb_check(env, tlb, &raddr, address,
env->spr[SPR_40x_PID], 0, i) < 0)
continue; continue;
zsel = (tlb->attr >> 4) & 0xF; zsel = (tlb->attr >> 4) & 0xF;
zpr = (env->spr[SPR_40x_ZPR] >> (28 - (2 * zsel))) & 0x3; zpr = (env->spr[SPR_40x_ZPR] >> (28 - (2 * zsel))) & 0x3;
@ -890,7 +896,7 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
break; break;
case PPC_FLAGS_MMU_SOFT_4xx: case PPC_FLAGS_MMU_SOFT_4xx:
case PPC_FLAGS_MMU_403: case PPC_FLAGS_MMU_403:
ret = mmu4xx_get_physical_address(env, ctx, eaddr, ret = mmu40x_get_physical_address(env, ctx, eaddr,
rw, access_type); rw, access_type);
break; break;
case PPC_FLAGS_MMU_601: case PPC_FLAGS_MMU_601:

292
target-ppc/op.c
View File

@ -24,16 +24,6 @@
#include "exec.h" #include "exec.h"
#include "op_helper.h" #include "op_helper.h"
/* XXX: this is to be suppressed */
#define regs (env)
#define FT0 (env->ft0)
#define FT1 (env->ft1)
#define FT2 (env->ft2)
/* XXX: this is to be suppressed... */
#define PPC_OP(name) void OPPROTO glue(op_, name)(void)
#define REG 0 #define REG 0
#include "op_template.h" #include "op_template.h"
@ -139,16 +129,16 @@ void OPPROTO op_print_mem_EA (void)
/* PowerPC state maintenance operations */ /* PowerPC state maintenance operations */
/* set_Rc0 */ /* set_Rc0 */
PPC_OP(set_Rc0) void OPPROTO op_set_Rc0 (void)
{ {
env->crf[0] = T0 | xer_ov; env->crf[0] = T0 | xer_ov;
RETURN(); RETURN();
} }
/* Set Rc1 (for floating point arithmetic) */ /* Set Rc1 (for floating point arithmetic) */
PPC_OP(set_Rc1) void OPPROTO op_set_Rc1 (void)
{ {
env->crf[1] = regs->fpscr[7]; env->crf[1] = env->fpscr[7];
RETURN(); RETURN();
} }
@ -159,7 +149,7 @@ void OPPROTO op_reset_T0 (void)
RETURN(); RETURN();
} }
PPC_OP(set_T0) void OPPROTO op_set_T0 (void)
{ {
T0 = (uint32_t)PARAM1; T0 = (uint32_t)PARAM1;
RETURN(); RETURN();
@ -173,7 +163,7 @@ void OPPROTO op_set_T0_64 (void)
} }
#endif #endif
PPC_OP(set_T1) void OPPROTO op_set_T1 (void)
{ {
T1 = (uint32_t)PARAM1; T1 = (uint32_t)PARAM1;
RETURN(); RETURN();
@ -188,9 +178,9 @@ void OPPROTO op_set_T1_64 (void)
#endif #endif
#if 0 // unused #if 0 // unused
PPC_OP(set_T2) void OPPROTO op_set_T2 (void)
{ {
T2 = PARAM(1); T2 = PARAM1;
RETURN(); RETURN();
} }
#endif #endif
@ -208,12 +198,12 @@ void OPPROTO op_move_T2_T0 (void)
} }
/* Generate exceptions */ /* Generate exceptions */
PPC_OP(raise_exception_err) void OPPROTO op_raise_exception_err (void)
{ {
do_raise_exception_err(PARAM(1), PARAM(2)); do_raise_exception_err(PARAM1, PARAM2);
} }
PPC_OP(update_nip) void OPPROTO op_update_nip (void)
{ {
env->nip = (uint32_t)PARAM1; env->nip = (uint32_t)PARAM1;
RETURN(); RETURN();
@ -227,26 +217,26 @@ void OPPROTO op_update_nip_64 (void)
} }
#endif #endif
PPC_OP(debug) void OPPROTO op_debug (void)
{ {
do_raise_exception(EXCP_DEBUG); do_raise_exception(EXCP_DEBUG);
} }
PPC_OP(exit_tb) void OPPROTO op_exit_tb (void)
{ {
EXIT_TB(); EXIT_TB();
} }
/* Load/store special registers */ /* Load/store special registers */
PPC_OP(load_cr) void OPPROTO op_load_cr (void)
{ {
do_load_cr(); do_load_cr();
RETURN(); RETURN();
} }
PPC_OP(store_cr) void OPPROTO op_store_cr (void)
{ {
do_store_cr(PARAM(1)); do_store_cr(PARAM1);
RETURN(); RETURN();
} }
@ -262,26 +252,26 @@ void OPPROTO op_store_cro (void)
RETURN(); RETURN();
} }
PPC_OP(load_xer_cr) void OPPROTO op_load_xer_cr (void)
{ {
T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1); T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1);
RETURN(); RETURN();
} }
PPC_OP(clear_xer_ov) void OPPROTO op_clear_xer_ov (void)
{ {
xer_so = 0; xer_so = 0;
xer_ov = 0; xer_ov = 0;
RETURN(); RETURN();
} }
PPC_OP(clear_xer_ca) void OPPROTO op_clear_xer_ca (void)
{ {
xer_ca = 0; xer_ca = 0;
RETURN(); RETURN();
} }
PPC_OP(load_xer_bc) void OPPROTO op_load_xer_bc (void)
{ {
T1 = xer_bc; T1 = xer_bc;
RETURN(); RETURN();
@ -293,13 +283,13 @@ void OPPROTO op_store_xer_bc (void)
RETURN(); RETURN();
} }
PPC_OP(load_xer) void OPPROTO op_load_xer (void)
{ {
do_load_xer(); do_load_xer();
RETURN(); RETURN();
} }
PPC_OP(store_xer) void OPPROTO op_store_xer (void)
{ {
do_store_xer(); do_store_xer();
RETURN(); RETURN();
@ -307,25 +297,25 @@ PPC_OP(store_xer)
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
/* Segment registers load and store */ /* Segment registers load and store */
PPC_OP(load_sr) void OPPROTO op_load_sr (void)
{ {
T0 = regs->sr[T1]; T0 = env->sr[T1];
RETURN(); RETURN();
} }
PPC_OP(store_sr) void OPPROTO op_store_sr (void)
{ {
do_store_sr(env, T1, T0); do_store_sr(env, T1, T0);
RETURN(); RETURN();
} }
PPC_OP(load_sdr1) void OPPROTO op_load_sdr1 (void)
{ {
T0 = regs->sdr1; T0 = env->sdr1;
RETURN(); RETURN();
} }
PPC_OP(store_sdr1) void OPPROTO op_store_sdr1 (void)
{ {
do_store_sdr1(env, T0); do_store_sdr1(env, T0);
RETURN(); RETURN();
@ -345,13 +335,13 @@ void OPPROTO op_store_asr (void)
} }
#endif #endif
PPC_OP(load_msr) void OPPROTO op_load_msr (void)
{ {
T0 = do_load_msr(env); T0 = do_load_msr(env);
RETURN(); RETURN();
} }
PPC_OP(store_msr) void OPPROTO op_store_msr (void)
{ {
do_store_msr(env, T0); do_store_msr(env, T0);
RETURN(); RETURN();
@ -397,70 +387,70 @@ void OPPROTO op_mask_spr (void)
RETURN(); RETURN();
} }
PPC_OP(load_lr) void OPPROTO op_load_lr (void)
{ {
T0 = regs->lr; T0 = env->lr;
RETURN(); RETURN();
} }
PPC_OP(store_lr) void OPPROTO op_store_lr (void)
{ {
regs->lr = T0; env->lr = T0;
RETURN(); RETURN();
} }
PPC_OP(load_ctr) void OPPROTO op_load_ctr (void)
{ {
T0 = regs->ctr; T0 = env->ctr;
RETURN(); RETURN();
} }
PPC_OP(store_ctr) void OPPROTO op_store_ctr (void)
{ {
regs->ctr = T0; env->ctr = T0;
RETURN(); RETURN();
} }
PPC_OP(load_tbl) void OPPROTO op_load_tbl (void)
{ {
T0 = cpu_ppc_load_tbl(regs); T0 = cpu_ppc_load_tbl(env);
RETURN(); RETURN();
} }
PPC_OP(load_tbu) void OPPROTO op_load_tbu (void)
{ {
T0 = cpu_ppc_load_tbu(regs); T0 = cpu_ppc_load_tbu(env);
RETURN(); RETURN();
} }
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
PPC_OP(store_tbl) void OPPROTO op_store_tbl (void)
{ {
cpu_ppc_store_tbl(regs, T0); cpu_ppc_store_tbl(env, T0);
RETURN(); RETURN();
} }
PPC_OP(store_tbu) void OPPROTO op_store_tbu (void)
{ {
cpu_ppc_store_tbu(regs, T0); cpu_ppc_store_tbu(env, T0);
RETURN(); RETURN();
} }
PPC_OP(load_decr) void OPPROTO op_load_decr (void)
{ {
T0 = cpu_ppc_load_decr(regs); T0 = cpu_ppc_load_decr(env);
RETURN(); RETURN();
} }
PPC_OP(store_decr) void OPPROTO op_store_decr (void)
{ {
cpu_ppc_store_decr(regs, T0); cpu_ppc_store_decr(env, T0);
RETURN(); RETURN();
} }
PPC_OP(load_ibat) void OPPROTO op_load_ibat (void)
{ {
T0 = regs->IBAT[PARAM(1)][PARAM(2)]; T0 = env->IBAT[PARAM1][PARAM2];
RETURN(); RETURN();
} }
@ -480,9 +470,9 @@ void OPPROTO op_store_ibatl (void)
RETURN(); RETURN();
} }
PPC_OP(load_dbat) void OPPROTO op_load_dbat (void)
{ {
T0 = regs->DBAT[PARAM(1)][PARAM(2)]; T0 = env->DBAT[PARAM1][PARAM2];
RETURN(); RETURN();
} }
@ -504,85 +494,85 @@ void OPPROTO op_store_dbatl (void)
#endif /* !defined(CONFIG_USER_ONLY) */ #endif /* !defined(CONFIG_USER_ONLY) */
/* FPSCR */ /* FPSCR */
PPC_OP(load_fpscr) void OPPROTO op_load_fpscr (void)
{ {
do_load_fpscr(); do_load_fpscr();
RETURN(); RETURN();
} }
PPC_OP(store_fpscr) void OPPROTO op_store_fpscr (void)
{ {
do_store_fpscr(PARAM1); do_store_fpscr(PARAM1);
RETURN(); RETURN();
} }
PPC_OP(reset_scrfx) void OPPROTO op_reset_scrfx (void)
{ {
regs->fpscr[7] &= ~0x8; env->fpscr[7] &= ~0x8;
RETURN(); RETURN();
} }
/* crf operations */ /* crf operations */
PPC_OP(getbit_T0) void OPPROTO op_getbit_T0 (void)
{ {
T0 = (T0 >> PARAM(1)) & 1; T0 = (T0 >> PARAM1) & 1;
RETURN(); RETURN();
} }
PPC_OP(getbit_T1) void OPPROTO op_getbit_T1 (void)
{ {
T1 = (T1 >> PARAM(1)) & 1; T1 = (T1 >> PARAM1) & 1;
RETURN(); RETURN();
} }
PPC_OP(setcrfbit) void OPPROTO op_setcrfbit (void)
{ {
T1 = (T1 & PARAM(1)) | (T0 << PARAM(2)); T1 = (T1 & PARAM1) | (T0 << PARAM2);
RETURN(); RETURN();
} }
/* Branch */ /* Branch */
#define EIP regs->nip #define EIP env->nip
PPC_OP(setlr) void OPPROTO op_setlr (void)
{ {
regs->lr = (uint32_t)PARAM1; env->lr = (uint32_t)PARAM1;
RETURN(); RETURN();
} }
#if defined (TARGET_PPC64) #if defined (TARGET_PPC64)
void OPPROTO op_setlr_64 (void) void OPPROTO op_setlr_64 (void)
{ {
regs->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; env->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
RETURN(); RETURN();
} }
#endif #endif
PPC_OP(goto_tb0) void OPPROTO op_goto_tb0 (void)
{ {
GOTO_TB(op_goto_tb0, PARAM1, 0); GOTO_TB(op_goto_tb0, PARAM1, 0);
} }
PPC_OP(goto_tb1) void OPPROTO op_goto_tb1 (void)
{ {
GOTO_TB(op_goto_tb1, PARAM1, 1); GOTO_TB(op_goto_tb1, PARAM1, 1);
} }
void OPPROTO op_b_T1 (void) void OPPROTO op_b_T1 (void)
{ {
regs->nip = (uint32_t)(T1 & ~3); env->nip = (uint32_t)(T1 & ~3);
RETURN(); RETURN();
} }
#if defined (TARGET_PPC64) #if defined (TARGET_PPC64)
void OPPROTO op_b_T1_64 (void) void OPPROTO op_b_T1_64 (void)
{ {
regs->nip = (uint64_t)(T1 & ~3); env->nip = (uint64_t)(T1 & ~3);
RETURN(); RETURN();
} }
#endif #endif
PPC_OP(jz_T0) void OPPROTO op_jz_T0 (void)
{ {
if (!T0) if (!T0)
GOTO_LABEL_PARAM(1); GOTO_LABEL_PARAM(1);
@ -592,9 +582,9 @@ PPC_OP(jz_T0)
void OPPROTO op_btest_T1 (void) void OPPROTO op_btest_T1 (void)
{ {
if (T0) { if (T0) {
regs->nip = (uint32_t)(T1 & ~3); env->nip = (uint32_t)(T1 & ~3);
} else { } else {
regs->nip = (uint32_t)PARAM1; env->nip = (uint32_t)PARAM1;
} }
RETURN(); RETURN();
} }
@ -603,133 +593,133 @@ void OPPROTO op_btest_T1 (void)
void OPPROTO op_btest_T1_64 (void) void OPPROTO op_btest_T1_64 (void)
{ {
if (T0) { if (T0) {
regs->nip = (uint64_t)(T1 & ~3); env->nip = (uint64_t)(T1 & ~3);
} else { } else {
regs->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
} }
RETURN(); RETURN();
} }
#endif #endif
PPC_OP(movl_T1_ctr) void OPPROTO op_movl_T1_ctr (void)
{ {
T1 = regs->ctr; T1 = env->ctr;
RETURN(); RETURN();
} }
PPC_OP(movl_T1_lr) void OPPROTO op_movl_T1_lr (void)
{ {
T1 = regs->lr; T1 = env->lr;
RETURN(); RETURN();
} }
/* tests with result in T0 */ /* tests with result in T0 */
void OPPROTO op_test_ctr (void) void OPPROTO op_test_ctr (void)
{ {
T0 = (uint32_t)regs->ctr; T0 = (uint32_t)env->ctr;
RETURN(); RETURN();
} }
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
void OPPROTO op_test_ctr_64 (void) void OPPROTO op_test_ctr_64 (void)
{ {
T0 = (uint64_t)regs->ctr; T0 = (uint64_t)env->ctr;
RETURN(); RETURN();
} }
#endif #endif
void OPPROTO op_test_ctr_true (void) void OPPROTO op_test_ctr_true (void)
{ {
T0 = ((uint32_t)regs->ctr != 0 && (T0 & PARAM1) != 0); T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) != 0);
RETURN(); RETURN();
} }
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
void OPPROTO op_test_ctr_true_64 (void) void OPPROTO op_test_ctr_true_64 (void)
{ {
T0 = ((uint64_t)regs->ctr != 0 && (T0 & PARAM1) != 0); T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) != 0);
RETURN(); RETURN();
} }
#endif #endif
void OPPROTO op_test_ctr_false (void) void OPPROTO op_test_ctr_false (void)
{ {
T0 = ((uint32_t)regs->ctr != 0 && (T0 & PARAM1) == 0); T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) == 0);
RETURN(); RETURN();
} }
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
void OPPROTO op_test_ctr_false_64 (void) void OPPROTO op_test_ctr_false_64 (void)
{ {
T0 = ((uint64_t)regs->ctr != 0 && (T0 & PARAM1) == 0); T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) == 0);
RETURN(); RETURN();
} }
#endif #endif
void OPPROTO op_test_ctrz (void) void OPPROTO op_test_ctrz (void)
{ {
T0 = ((uint32_t)regs->ctr == 0); T0 = ((uint32_t)env->ctr == 0);
RETURN(); RETURN();
} }
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
void OPPROTO op_test_ctrz_64 (void) void OPPROTO op_test_ctrz_64 (void)
{ {
T0 = ((uint64_t)regs->ctr == 0); T0 = ((uint64_t)env->ctr == 0);
RETURN(); RETURN();
} }
#endif #endif
void OPPROTO op_test_ctrz_true (void) void OPPROTO op_test_ctrz_true (void)
{ {
T0 = ((uint32_t)regs->ctr == 0 && (T0 & PARAM1) != 0); T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) != 0);
RETURN(); RETURN();
} }
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
void OPPROTO op_test_ctrz_true_64 (void) void OPPROTO op_test_ctrz_true_64 (void)
{ {
T0 = ((uint64_t)regs->ctr == 0 && (T0 & PARAM1) != 0); T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) != 0);
RETURN(); RETURN();
} }
#endif #endif
void OPPROTO op_test_ctrz_false (void) void OPPROTO op_test_ctrz_false (void)
{ {
T0 = ((uint32_t)regs->ctr == 0 && (T0 & PARAM1) == 0); T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) == 0);
RETURN(); RETURN();
} }
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
void OPPROTO op_test_ctrz_false_64 (void) void OPPROTO op_test_ctrz_false_64 (void)
{ {
T0 = ((uint64_t)regs->ctr == 0 && (T0 & PARAM1) == 0); T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) == 0);
RETURN(); RETURN();
} }
#endif #endif
PPC_OP(test_true) void OPPROTO op_test_true (void)
{ {
T0 = (T0 & PARAM(1)); T0 = (T0 & PARAM1);
RETURN(); RETURN();
} }
PPC_OP(test_false) void OPPROTO op_test_false (void)
{ {
T0 = ((T0 & PARAM(1)) == 0); T0 = ((T0 & PARAM1) == 0);
RETURN(); RETURN();
} }
/* CTR maintenance */ /* CTR maintenance */
PPC_OP(dec_ctr) void OPPROTO op_dec_ctr (void)
{ {
regs->ctr--; env->ctr--;
RETURN(); RETURN();
} }
/*** Integer arithmetic ***/ /*** Integer arithmetic ***/
/* add */ /* add */
PPC_OP(add) void OPPROTO op_add (void)
{ {
T0 += T1; T0 += T1;
RETURN(); RETURN();
@ -800,9 +790,9 @@ void OPPROTO op_adde_64 (void)
#endif #endif
/* add immediate */ /* add immediate */
PPC_OP(addi) void OPPROTO op_addi (void)
{ {
T0 += (int32_t)PARAM(1); T0 += (int32_t)PARAM1;
RETURN(); RETURN();
} }
@ -957,14 +947,14 @@ void OPPROTO op_mulhdu (void)
#endif #endif
/* multiply low immediate */ /* multiply low immediate */
PPC_OP(mulli) void OPPROTO op_mulli (void)
{ {
T0 = ((int32_t)T0 * (int32_t)PARAM1); T0 = ((int32_t)T0 * (int32_t)PARAM1);
RETURN(); RETURN();
} }
/* multiply low word */ /* multiply low word */
PPC_OP(mullw) void OPPROTO op_mullw (void)
{ {
T0 = (int32_t)(T0 * T1); T0 = (int32_t)(T0 * T1);
RETURN(); RETURN();
@ -1026,7 +1016,7 @@ void OPPROTO op_nego_64 (void)
#endif #endif
/* subtract from */ /* subtract from */
PPC_OP(subf) void OPPROTO op_subf (void)
{ {
T0 = T1 - T0; T0 = T1 - T0;
RETURN(); RETURN();
@ -1329,14 +1319,14 @@ void OPPROTO op_popcntb_64 (void)
/*** Integer logical ***/ /*** Integer logical ***/
/* and */ /* and */
PPC_OP(and) void OPPROTO op_and (void)
{ {
T0 &= T1; T0 &= T1;
RETURN(); RETURN();
} }
/* andc */ /* andc */
PPC_OP(andc) void OPPROTO op_andc (void)
{ {
T0 &= ~T1; T0 &= ~T1;
RETURN(); RETURN();
@ -1345,7 +1335,7 @@ PPC_OP(andc)
/* andi. */ /* andi. */
void OPPROTO op_andi_T0 (void) void OPPROTO op_andi_T0 (void)
{ {
T0 &= PARAM(1); T0 &= PARAM1;
RETURN(); RETURN();
} }
@ -1371,7 +1361,7 @@ void OPPROTO op_cntlzd (void)
#endif #endif
/* eqv */ /* eqv */
PPC_OP(eqv) void OPPROTO op_eqv (void)
{ {
T0 = ~(T0 ^ T1); T0 = ~(T0 ^ T1);
RETURN(); RETURN();
@ -1408,51 +1398,51 @@ void OPPROTO op_extsw (void)
#endif #endif
/* nand */ /* nand */
PPC_OP(nand) void OPPROTO op_nand (void)
{ {
T0 = ~(T0 & T1); T0 = ~(T0 & T1);
RETURN(); RETURN();
} }
/* nor */ /* nor */
PPC_OP(nor) void OPPROTO op_nor (void)
{ {
T0 = ~(T0 | T1); T0 = ~(T0 | T1);
RETURN(); RETURN();
} }
/* or */ /* or */
PPC_OP(or) void OPPROTO op_or (void)
{ {
T0 |= T1; T0 |= T1;
RETURN(); RETURN();
} }
/* orc */ /* orc */
PPC_OP(orc) void OPPROTO op_orc (void)
{ {
T0 |= ~T1; T0 |= ~T1;
RETURN(); RETURN();
} }
/* ori */ /* ori */
PPC_OP(ori) void OPPROTO op_ori (void)
{ {
T0 |= PARAM(1); T0 |= PARAM1;
RETURN(); RETURN();
} }
/* xor */ /* xor */
PPC_OP(xor) void OPPROTO op_xor (void)
{ {
T0 ^= T1; T0 ^= T1;
RETURN(); RETURN();
} }
/* xori */ /* xori */
PPC_OP(xori) void OPPROTO op_xori (void)
{ {
T0 ^= PARAM(1); T0 ^= PARAM1;
RETURN(); RETURN();
} }
@ -1630,56 +1620,56 @@ void OPPROTO op_srli_T1_64 (void)
/*** Floating-Point arithmetic ***/ /*** Floating-Point arithmetic ***/
/* fadd - fadd. */ /* fadd - fadd. */
PPC_OP(fadd) void OPPROTO op_fadd (void)
{ {
FT0 = float64_add(FT0, FT1, &env->fp_status); FT0 = float64_add(FT0, FT1, &env->fp_status);
RETURN(); RETURN();
} }
/* fsub - fsub. */ /* fsub - fsub. */
PPC_OP(fsub) void OPPROTO op_fsub (void)
{ {
FT0 = float64_sub(FT0, FT1, &env->fp_status); FT0 = float64_sub(FT0, FT1, &env->fp_status);
RETURN(); RETURN();
} }
/* fmul - fmul. */ /* fmul - fmul. */
PPC_OP(fmul) void OPPROTO op_fmul (void)
{ {
FT0 = float64_mul(FT0, FT1, &env->fp_status); FT0 = float64_mul(FT0, FT1, &env->fp_status);
RETURN(); RETURN();
} }
/* fdiv - fdiv. */ /* fdiv - fdiv. */
PPC_OP(fdiv) void OPPROTO op_fdiv (void)
{ {
FT0 = float64_div(FT0, FT1, &env->fp_status); FT0 = float64_div(FT0, FT1, &env->fp_status);
RETURN(); RETURN();
} }
/* fsqrt - fsqrt. */ /* fsqrt - fsqrt. */
PPC_OP(fsqrt) void OPPROTO op_fsqrt (void)
{ {
do_fsqrt(); do_fsqrt();
RETURN(); RETURN();
} }
/* fres - fres. */ /* fres - fres. */
PPC_OP(fres) void OPPROTO op_fres (void)
{ {
do_fres(); do_fres();
RETURN(); RETURN();
} }
/* frsqrte - frsqrte. */ /* frsqrte - frsqrte. */
PPC_OP(frsqrte) void OPPROTO op_frsqrte (void)
{ {
do_frsqrte(); do_frsqrte();
RETURN(); RETURN();
} }
/* fsel - fsel. */ /* fsel - fsel. */
PPC_OP(fsel) void OPPROTO op_fsel (void)
{ {
do_fsel(); do_fsel();
RETURN(); RETURN();
@ -1687,7 +1677,7 @@ PPC_OP(fsel)
/*** Floating-Point multiply-and-add ***/ /*** Floating-Point multiply-and-add ***/
/* fmadd - fmadd. */ /* fmadd - fmadd. */
PPC_OP(fmadd) void OPPROTO op_fmadd (void)
{ {
#if USE_PRECISE_EMULATION #if USE_PRECISE_EMULATION
do_fmadd(); do_fmadd();
@ -1699,7 +1689,7 @@ PPC_OP(fmadd)
} }
/* fmsub - fmsub. */ /* fmsub - fmsub. */
PPC_OP(fmsub) void OPPROTO op_fmsub (void)
{ {
#if USE_PRECISE_EMULATION #if USE_PRECISE_EMULATION
do_fmsub(); do_fmsub();
@ -1711,14 +1701,14 @@ PPC_OP(fmsub)
} }
/* fnmadd - fnmadd. - fnmadds - fnmadds. */ /* fnmadd - fnmadd. - fnmadds - fnmadds. */
PPC_OP(fnmadd) void OPPROTO op_fnmadd (void)
{ {
do_fnmadd(); do_fnmadd();
RETURN(); RETURN();
} }
/* fnmsub - fnmsub. */ /* fnmsub - fnmsub. */
PPC_OP(fnmsub) void OPPROTO op_fnmsub (void)
{ {
do_fnmsub(); do_fnmsub();
RETURN(); RETURN();
@ -1726,21 +1716,21 @@ PPC_OP(fnmsub)
/*** Floating-Point round & convert ***/ /*** Floating-Point round & convert ***/
/* frsp - frsp. */ /* frsp - frsp. */
PPC_OP(frsp) void OPPROTO op_frsp (void)
{ {
FT0 = float64_to_float32(FT0, &env->fp_status); FT0 = float64_to_float32(FT0, &env->fp_status);
RETURN(); RETURN();
} }
/* fctiw - fctiw. */ /* fctiw - fctiw. */
PPC_OP(fctiw) void OPPROTO op_fctiw (void)
{ {
do_fctiw(); do_fctiw();
RETURN(); RETURN();
} }
/* fctiwz - fctiwz. */ /* fctiwz - fctiwz. */
PPC_OP(fctiwz) void OPPROTO op_fctiwz (void)
{ {
do_fctiwz(); do_fctiwz();
RETURN(); RETURN();
@ -1748,21 +1738,21 @@ PPC_OP(fctiwz)
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
/* fcfid - fcfid. */ /* fcfid - fcfid. */
PPC_OP(fcfid) void OPPROTO op_fcfid (void)
{ {
do_fcfid(); do_fcfid();
RETURN(); RETURN();
} }
/* fctid - fctid. */ /* fctid - fctid. */
PPC_OP(fctid) void OPPROTO op_fctid (void)
{ {
do_fctid(); do_fctid();
RETURN(); RETURN();
} }
/* fctidz - fctidz. */ /* fctidz - fctidz. */
PPC_OP(fctidz) void OPPROTO op_fctidz (void)
{ {
do_fctidz(); do_fctidz();
RETURN(); RETURN();
@ -1771,14 +1761,14 @@ PPC_OP(fctidz)
/*** Floating-Point compare ***/ /*** Floating-Point compare ***/
/* fcmpu */ /* fcmpu */
PPC_OP(fcmpu) void OPPROTO op_fcmpu (void)
{ {
do_fcmpu(); do_fcmpu();
RETURN(); RETURN();
} }
/* fcmpo */ /* fcmpo */
PPC_OP(fcmpo) void OPPROTO op_fcmpo (void)
{ {
do_fcmpo(); do_fcmpo();
RETURN(); RETURN();
@ -1786,14 +1776,14 @@ PPC_OP(fcmpo)
/*** Floating-point move ***/ /*** Floating-point move ***/
/* fabs */ /* fabs */
PPC_OP(fabs) void OPPROTO op_fabs (void)
{ {
FT0 = float64_abs(FT0); FT0 = float64_abs(FT0);
RETURN(); RETURN();
} }
/* fnabs */ /* fnabs */
PPC_OP(fnabs) void OPPROTO op_fnabs (void)
{ {
FT0 = float64_abs(FT0); FT0 = float64_abs(FT0);
FT0 = float64_chs(FT0); FT0 = float64_chs(FT0);
@ -1801,7 +1791,7 @@ PPC_OP(fnabs)
} }
/* fneg */ /* fneg */
PPC_OP(fneg) void OPPROTO op_fneg (void)
{ {
FT0 = float64_chs(FT0); FT0 = float64_chs(FT0);
RETURN(); RETURN();
@ -1871,7 +1861,7 @@ void OPPROTO op_td (void)
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
/* tlbia */ /* tlbia */
PPC_OP(tlbia) void OPPROTO op_tlbia (void)
{ {
do_tlbia(); do_tlbia();
RETURN(); RETURN();

5
target-ppc/op_helper.c
View File

@ -258,6 +258,7 @@ void do_mul64 (uint64_t *plow, uint64_t *phigh)
static void imul64 (uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b) static void imul64 (uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b)
{ {
int sa, sb; int sa, sb;
sa = (a < 0); sa = (a < 0);
if (sa) if (sa)
a = -a; a = -a;
@ -2493,14 +2494,14 @@ void do_4xx_tlbre_hi (void)
void do_4xx_tlbsx (void) void do_4xx_tlbsx (void)
{ {
T0 = ppcemb_tlb_search(env, T0); T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]);
} }
void do_4xx_tlbsx_ (void) void do_4xx_tlbsx_ (void)
{ {
int tmp = xer_ov; int tmp = xer_ov;
T0 = ppcemb_tlb_search(env, T0); T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]);
if (T0 != -1) if (T0 != -1)
tmp |= 0x02; tmp |= 0x02;
env->crf[0] = tmp; env->crf[0] = tmp;

2
target-ppc/op_helper_mem.h
View File

@ -271,7 +271,7 @@ void glue(do_icbi_64, MEMSUFFIX) (void)
} }
#endif #endif
/* PPC 601 specific instructions (POWER bridge) */ /* PowerPC 601 specific instructions (POWER bridge) */
// XXX: to be tested // XXX: to be tested
void glue(do_POWER_lscbx, MEMSUFFIX) (int dest, int ra, int rb) void glue(do_POWER_lscbx, MEMSUFFIX) (int dest, int ra, int rb)
{ {

48
target-ppc/op_mem.h
View File

@ -517,7 +517,7 @@ void OPPROTO glue(op_lwarx, MEMSUFFIX) (void)
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ldl, MEMSUFFIX)((uint32_t)T0); T1 = glue(ldl, MEMSUFFIX)((uint32_t)T0);
regs->reserve = (uint32_t)T0; env->reserve = (uint32_t)T0;
} }
RETURN(); RETURN();
} }
@ -529,7 +529,7 @@ void OPPROTO glue(op_lwarx_64, MEMSUFFIX) (void)
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ldl, MEMSUFFIX)((uint64_t)T0); T1 = glue(ldl, MEMSUFFIX)((uint64_t)T0);
regs->reserve = (uint64_t)T0; env->reserve = (uint64_t)T0;
} }
RETURN(); RETURN();
} }
@ -540,7 +540,7 @@ void OPPROTO glue(op_ldarx, MEMSUFFIX) (void)
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ldq, MEMSUFFIX)((uint32_t)T0); T1 = glue(ldq, MEMSUFFIX)((uint32_t)T0);
regs->reserve = (uint32_t)T0; env->reserve = (uint32_t)T0;
} }
RETURN(); RETURN();
} }
@ -551,7 +551,7 @@ void OPPROTO glue(op_ldarx_64, MEMSUFFIX) (void)
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ldq, MEMSUFFIX)((uint64_t)T0); T1 = glue(ldq, MEMSUFFIX)((uint64_t)T0);
regs->reserve = (uint64_t)T0; env->reserve = (uint64_t)T0;
} }
RETURN(); RETURN();
} }
@ -563,7 +563,7 @@ void OPPROTO glue(op_lwarx_le, MEMSUFFIX) (void)
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ld32r, MEMSUFFIX)((uint32_t)T0); T1 = glue(ld32r, MEMSUFFIX)((uint32_t)T0);
regs->reserve = (uint32_t)T0; env->reserve = (uint32_t)T0;
} }
RETURN(); RETURN();
} }
@ -575,7 +575,7 @@ void OPPROTO glue(op_lwarx_le_64, MEMSUFFIX) (void)
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ld32r, MEMSUFFIX)((uint64_t)T0); T1 = glue(ld32r, MEMSUFFIX)((uint64_t)T0);
regs->reserve = (uint64_t)T0; env->reserve = (uint64_t)T0;
} }
RETURN(); RETURN();
} }
@ -586,7 +586,7 @@ void OPPROTO glue(op_ldarx_le, MEMSUFFIX) (void)
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ld64r, MEMSUFFIX)((uint32_t)T0); T1 = glue(ld64r, MEMSUFFIX)((uint32_t)T0);
regs->reserve = (uint32_t)T0; env->reserve = (uint32_t)T0;
} }
RETURN(); RETURN();
} }
@ -597,7 +597,7 @@ void OPPROTO glue(op_ldarx_le_64, MEMSUFFIX) (void)
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
T1 = glue(ld64r, MEMSUFFIX)((uint64_t)T0); T1 = glue(ld64r, MEMSUFFIX)((uint64_t)T0);
regs->reserve = (uint64_t)T0; env->reserve = (uint64_t)T0;
} }
RETURN(); RETURN();
} }
@ -609,14 +609,14 @@ void OPPROTO glue(op_stwcx, MEMSUFFIX) (void)
if (unlikely(T0 & 0x03)) { if (unlikely(T0 & 0x03)) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
if (unlikely(regs->reserve != (uint32_t)T0)) { if (unlikely(env->reserve != (uint32_t)T0)) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(stl, MEMSUFFIX)((uint32_t)T0, T1); glue(stl, MEMSUFFIX)((uint32_t)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
regs->reserve = -1; env->reserve = -1;
RETURN(); RETURN();
} }
@ -626,14 +626,14 @@ void OPPROTO glue(op_stwcx_64, MEMSUFFIX) (void)
if (unlikely(T0 & 0x03)) { if (unlikely(T0 & 0x03)) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
if (unlikely(regs->reserve != (uint64_t)T0)) { if (unlikely(env->reserve != (uint64_t)T0)) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(stl, MEMSUFFIX)((uint64_t)T0, T1); glue(stl, MEMSUFFIX)((uint64_t)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
regs->reserve = -1; env->reserve = -1;
RETURN(); RETURN();
} }
@ -642,14 +642,14 @@ void OPPROTO glue(op_stdcx, MEMSUFFIX) (void)
if (unlikely(T0 & 0x03)) { if (unlikely(T0 & 0x03)) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
if (unlikely(regs->reserve != (uint32_t)T0)) { if (unlikely(env->reserve != (uint32_t)T0)) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(stq, MEMSUFFIX)((uint32_t)T0, T1); glue(stq, MEMSUFFIX)((uint32_t)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
regs->reserve = -1; env->reserve = -1;
RETURN(); RETURN();
} }
@ -658,14 +658,14 @@ void OPPROTO glue(op_stdcx_64, MEMSUFFIX) (void)
if (unlikely(T0 & 0x03)) { if (unlikely(T0 & 0x03)) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
if (unlikely(regs->reserve != (uint64_t)T0)) { if (unlikely(env->reserve != (uint64_t)T0)) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(stq, MEMSUFFIX)((uint64_t)T0, T1); glue(stq, MEMSUFFIX)((uint64_t)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
regs->reserve = -1; env->reserve = -1;
RETURN(); RETURN();
} }
#endif #endif
@ -675,14 +675,14 @@ void OPPROTO glue(op_stwcx_le, MEMSUFFIX) (void)
if (unlikely(T0 & 0x03)) { if (unlikely(T0 & 0x03)) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
if (unlikely(regs->reserve != (uint32_t)T0)) { if (unlikely(env->reserve != (uint32_t)T0)) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(st32r, MEMSUFFIX)((uint32_t)T0, T1); glue(st32r, MEMSUFFIX)((uint32_t)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
regs->reserve = -1; env->reserve = -1;
RETURN(); RETURN();
} }
@ -692,14 +692,14 @@ void OPPROTO glue(op_stwcx_le_64, MEMSUFFIX) (void)
if (unlikely(T0 & 0x03)) { if (unlikely(T0 & 0x03)) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
if (unlikely(regs->reserve != (uint64_t)T0)) { if (unlikely(env->reserve != (uint64_t)T0)) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(st32r, MEMSUFFIX)((uint64_t)T0, T1); glue(st32r, MEMSUFFIX)((uint64_t)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
regs->reserve = -1; env->reserve = -1;
RETURN(); RETURN();
} }
@ -708,14 +708,14 @@ void OPPROTO glue(op_stdcx_le, MEMSUFFIX) (void)
if (unlikely(T0 & 0x03)) { if (unlikely(T0 & 0x03)) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
if (unlikely(regs->reserve != (uint32_t)T0)) { if (unlikely(env->reserve != (uint32_t)T0)) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(st64r, MEMSUFFIX)((uint32_t)T0, T1); glue(st64r, MEMSUFFIX)((uint32_t)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
regs->reserve = -1; env->reserve = -1;
RETURN(); RETURN();
} }
@ -724,14 +724,14 @@ void OPPROTO glue(op_stdcx_le_64, MEMSUFFIX) (void)
if (unlikely(T0 & 0x03)) { if (unlikely(T0 & 0x03)) {
do_raise_exception(EXCP_ALIGN); do_raise_exception(EXCP_ALIGN);
} else { } else {
if (unlikely(regs->reserve != (uint64_t)T0)) { if (unlikely(env->reserve != (uint64_t)T0)) {
env->crf[0] = xer_ov; env->crf[0] = xer_ov;
} else { } else {
glue(st64r, MEMSUFFIX)((uint64_t)T0, T1); glue(st64r, MEMSUFFIX)((uint64_t)T0, T1);
env->crf[0] = xer_ov | 0x02; env->crf[0] = xer_ov | 0x02;
} }
} }
regs->reserve = -1; env->reserve = -1;
RETURN(); RETURN();
} }
#endif #endif

42
target-ppc/op_template.h
View File

@ -21,38 +21,38 @@
/* General purpose registers moves */ /* General purpose registers moves */
void OPPROTO glue(op_load_gpr_T0_gpr, REG) (void) void OPPROTO glue(op_load_gpr_T0_gpr, REG) (void)
{ {
T0 = regs->gpr[REG]; T0 = env->gpr[REG];
RETURN(); RETURN();
} }
void OPPROTO glue(op_load_gpr_T1_gpr, REG) (void) void OPPROTO glue(op_load_gpr_T1_gpr, REG) (void)
{ {
T1 = regs->gpr[REG]; T1 = env->gpr[REG];
RETURN(); RETURN();
} }
void OPPROTO glue(op_load_gpr_T2_gpr, REG) (void) void OPPROTO glue(op_load_gpr_T2_gpr, REG) (void)
{ {
T2 = regs->gpr[REG]; T2 = env->gpr[REG];
RETURN(); RETURN();
} }
void OPPROTO glue(op_store_T0_gpr_gpr, REG) (void) void OPPROTO glue(op_store_T0_gpr_gpr, REG) (void)
{ {
regs->gpr[REG] = T0; env->gpr[REG] = T0;
RETURN(); RETURN();
} }
void OPPROTO glue(op_store_T1_gpr_gpr, REG) (void) void OPPROTO glue(op_store_T1_gpr_gpr, REG) (void)
{ {
regs->gpr[REG] = T1; env->gpr[REG] = T1;
RETURN(); RETURN();
} }
#if 0 // unused #if 0 // unused
void OPPROTO glue(op_store_T2_gpr_gpr, REG) (void) void OPPROTO glue(op_store_T2_gpr_gpr, REG) (void)
{ {
regs->gpr[REG] = T2; env->gpr[REG] = T2;
RETURN(); RETURN();
} }
#endif #endif
@ -60,40 +60,40 @@ void OPPROTO glue(op_store_T2_gpr_gpr, REG) (void)
#if defined(TARGET_PPCEMB) #if defined(TARGET_PPCEMB)
void OPPROTO glue(op_load_gpr64_T0_gpr, REG) (void) void OPPROTO glue(op_load_gpr64_T0_gpr, REG) (void)
{ {
T0_64 = regs->gpr[REG]; T0_64 = env->gpr[REG];
RETURN(); RETURN();
} }
void OPPROTO glue(op_load_gpr64_T1_gpr, REG) (void) void OPPROTO glue(op_load_gpr64_T1_gpr, REG) (void)
{ {
T1_64 = regs->gpr[REG]; T1_64 = env->gpr[REG];
RETURN(); RETURN();
} }
#if 0 // unused #if 0 // unused
void OPPROTO glue(op_load_gpr64_T2_gpr, REG) (void) void OPPROTO glue(op_load_gpr64_T2_gpr, REG) (void)
{ {
T2_64 = regs->gpr[REG]; T2_64 = env->gpr[REG];
RETURN(); RETURN();
} }
#endif #endif
void OPPROTO glue(op_store_T0_gpr64_gpr, REG) (void) void OPPROTO glue(op_store_T0_gpr64_gpr, REG) (void)
{ {
regs->gpr[REG] = T0_64; env->gpr[REG] = T0_64;
RETURN(); RETURN();
} }
void OPPROTO glue(op_store_T1_gpr64_gpr, REG) (void) void OPPROTO glue(op_store_T1_gpr64_gpr, REG) (void)
{ {
regs->gpr[REG] = T1_64; env->gpr[REG] = T1_64;
RETURN(); RETURN();
} }
#if 0 // unused #if 0 // unused
void OPPROTO glue(op_store_T2_gpr64_gpr, REG) (void) void OPPROTO glue(op_store_T2_gpr64_gpr, REG) (void)
{ {
regs->gpr[REG] = T2_64; env->gpr[REG] = T2_64;
RETURN(); RETURN();
} }
#endif #endif
@ -103,57 +103,57 @@ void OPPROTO glue(op_store_T2_gpr64_gpr, REG) (void)
/* Condition register moves */ /* Condition register moves */
void OPPROTO glue(op_load_crf_T0_crf, REG) (void) void OPPROTO glue(op_load_crf_T0_crf, REG) (void)
{ {
T0 = regs->crf[REG]; T0 = env->crf[REG];
RETURN(); RETURN();
} }
void OPPROTO glue(op_load_crf_T1_crf, REG) (void) void OPPROTO glue(op_load_crf_T1_crf, REG) (void)
{ {
T1 = regs->crf[REG]; T1 = env->crf[REG];
RETURN(); RETURN();
} }
void OPPROTO glue(op_store_T0_crf_crf, REG) (void) void OPPROTO glue(op_store_T0_crf_crf, REG) (void)
{ {
regs->crf[REG] = T0; env->crf[REG] = T0;
RETURN(); RETURN();
} }
void OPPROTO glue(op_store_T1_crf_crf, REG) (void) void OPPROTO glue(op_store_T1_crf_crf, REG) (void)
{ {
regs->crf[REG] = T1; env->crf[REG] = T1;
RETURN(); RETURN();
} }
/* Floating point condition and status register moves */ /* Floating point condition and status register moves */
void OPPROTO glue(op_load_fpscr_T0_fpscr, REG) (void) void OPPROTO glue(op_load_fpscr_T0_fpscr, REG) (void)
{ {
T0 = regs->fpscr[REG]; T0 = env->fpscr[REG];
RETURN(); RETURN();
} }
#if REG == 0 #if REG == 0
void OPPROTO glue(op_store_T0_fpscr_fpscr, REG) (void) void OPPROTO glue(op_store_T0_fpscr_fpscr, REG) (void)
{ {
regs->fpscr[REG] = (regs->fpscr[REG] & 0x9) | (T0 & ~0x9); env->fpscr[REG] = (env->fpscr[REG] & 0x9) | (T0 & ~0x9);
RETURN(); RETURN();
} }
void OPPROTO glue(op_clear_fpscr_fpscr, REG) (void) void OPPROTO glue(op_clear_fpscr_fpscr, REG) (void)
{ {
regs->fpscr[REG] = (regs->fpscr[REG] & 0x9); env->fpscr[REG] = (env->fpscr[REG] & 0x9);
RETURN(); RETURN();
} }
#else #else
void OPPROTO glue(op_store_T0_fpscr_fpscr, REG) (void) void OPPROTO glue(op_store_T0_fpscr_fpscr, REG) (void)
{ {
regs->fpscr[REG] = T0; env->fpscr[REG] = T0;
RETURN(); RETURN();
} }
void OPPROTO glue(op_clear_fpscr_fpscr, REG) (void) void OPPROTO glue(op_clear_fpscr_fpscr, REG) (void)
{ {
regs->fpscr[REG] = 0x0; env->fpscr[REG] = 0x0;
RETURN(); RETURN();
} }
#endif #endif

7
target-ppc/translate.c
View File

@ -1312,7 +1312,7 @@ static inline void gen_rldcl (DisasContext *ctx, int mbn)
mb = MB(ctx->opcode) | (mbn << 5); mb = MB(ctx->opcode) | (mbn << 5);
gen_rldnm(ctx, mb, 63); gen_rldnm(ctx, mb, 63);
} }
GEN_PPC64_R2(rldcl, 0x1E, 0x08) GEN_PPC64_R2(rldcl, 0x1E, 0x08);
/* rldcr - rldcr. */ /* rldcr - rldcr. */
static inline void gen_rldcr (DisasContext *ctx, int men) static inline void gen_rldcr (DisasContext *ctx, int men)
{ {
@ -1321,7 +1321,7 @@ static inline void gen_rldcr (DisasContext *ctx, int men)
me = MB(ctx->opcode) | (men << 5); me = MB(ctx->opcode) | (men << 5);
gen_rldnm(ctx, 0, me); gen_rldnm(ctx, 0, me);
} }
GEN_PPC64_R2(rldcr, 0x1E, 0x09) GEN_PPC64_R2(rldcr, 0x1E, 0x09);
/* rldimi - rldimi. */ /* rldimi - rldimi. */
static inline void gen_rldimi (DisasContext *ctx, int mbn, int shn) static inline void gen_rldimi (DisasContext *ctx, int mbn, int shn)
{ {
@ -1355,7 +1355,7 @@ static inline void gen_rldimi (DisasContext *ctx, int mbn, int shn)
if (unlikely(Rc(ctx->opcode) != 0)) if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx); gen_set_Rc0(ctx);
} }
GEN_PPC64_R4(rldimi, 0x1E, 0x06) GEN_PPC64_R4(rldimi, 0x1E, 0x06);
#endif #endif
/*** Integer shift ***/ /*** Integer shift ***/
@ -2601,7 +2601,6 @@ GEN_HANDLER(stfiwx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT)
} }
/*** Branch ***/ /*** Branch ***/
static inline void gen_goto_tb (DisasContext *ctx, int n, target_ulong dest) static inline void gen_goto_tb (DisasContext *ctx, int n, target_ulong dest)
{ {
TranslationBlock *tb; TranslationBlock *tb;