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target/alpha: Do not mix exception flags and FPCR bits

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get_float_exception_flags() returns exception flags,
which are distinct from the FPCR bits used as error code.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250211162604.83446-1-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-02-11 17:15:26 +01:00
parent 2101c85aea
commit 35487a6dc0
1 changed files with 7 additions and 8 deletions
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15
target/alpha/fpu_helper.c
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@ -455,29 +455,28 @@ static uint64_t do_cvttq(CPUAlphaState *env, uint64_t a, int roundmode)
{
float64 fa;
int64_t ret;
uint32_t exc;
uint32_t exc = 0;
int flags;
fa = t_to_float64(a);
ret = float64_to_int64_modulo(fa, roundmode, &FP_STATUS);
exc = get_float_exception_flags(&FP_STATUS);
if (unlikely(exc)) {
flags = get_float_exception_flags(&FP_STATUS);
if (unlikely(flags)) {
set_float_exception_flags(0, &FP_STATUS);
/* We need to massage the resulting exceptions. */
if (exc & float_flag_invalid_cvti) {
if (flags & float_flag_invalid_cvti) {
/* Overflow, either normal or infinity. */
if (float64_is_infinity(fa)) {
exc = FPCR_INV;
} else {
exc = FPCR_IOV | FPCR_INE;
}
} else if (exc & float_flag_invalid) {
} else if (flags & float_flag_invalid) {
exc = FPCR_INV;
} else if (exc & float_flag_inexact) {
} else if (flags & float_flag_inexact) {
exc = FPCR_INE;
} else {
exc = 0;
}
}
env->error_code = exc;