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target/arm/ptw.c: Add comments to S1Translate struct fields

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Add comments to the in_* fields in the S1Translate struct
that explain what they're doing.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230710152130.3928330-2-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2023-07-17 11:05:07 +01:00
parent aab746106c
commit 34eed55127
1 changed files with 40 additions and 0 deletions
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target/arm/ptw.c
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@ -19,10 +19,50 @@
#endif #endif
typedef struct S1Translate { typedef struct S1Translate {
/*
* in_mmu_idx : specifies which TTBR, TCR, etc to use for the walk.
* Together with in_space, specifies the architectural translation regime.
*/
ARMMMUIdx in_mmu_idx; ARMMMUIdx in_mmu_idx;
/*
* in_ptw_idx: specifies which mmuidx to use for the actual
* page table descriptor load operations. This will be one of the
* ARMMMUIdx_Stage2* or one of the ARMMMUIdx_Phys_* indexes.
* If a Secure ptw is "downgraded" to NonSecure by an NSTable bit,
* this field is updated accordingly.
*/
ARMMMUIdx in_ptw_idx; ARMMMUIdx in_ptw_idx;
/*
* in_space: the security space for this walk. This plus
* the in_mmu_idx specify the architectural translation regime.
* If a Secure ptw is "downgraded" to NonSecure by an NSTable bit,
* this field is updated accordingly.
*
* Note that the security space for the in_ptw_idx may be different
* from that for the in_mmu_idx. We do not need to explicitly track
* the in_ptw_idx security space because:
* - if the in_ptw_idx is an ARMMMUIdx_Phys_* then the mmuidx
* itself specifies the security space
* - if the in_ptw_idx is an ARMMMUIdx_Stage2* then the security
* space used for ptw reads is the same as that of the security
* space of the stage 1 translation for all cases except where
* stage 1 is Secure; in that case the only possibilities for
* the ptw read are Secure and NonSecure, and the in_ptw_idx
* value being Stage2 vs Stage2_S distinguishes those.
*/
ARMSecuritySpace in_space; ARMSecuritySpace in_space;
/*
* in_secure: whether the translation regime is a Secure one.
* This is always equal to arm_space_is_secure(in_space).
* If a Secure ptw is "downgraded" to NonSecure by an NSTable bit,
* this field is updated accordingly.
*/
bool in_secure; bool in_secure;
/*
* in_debug: is this a QEMU debug access (gdbstub, etc)? Debug
* accesses will not update the guest page table access flags
* and will not change the state of the softmmu TLBs.
*/
bool in_debug; bool in_debug;
/* /*
* If this is stage 2 of a stage 1+2 page table walk, then this must * If this is stage 2 of a stage 1+2 page table walk, then this must