hw/misc/imx6_src: Convert DPRINTF() to trace events
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20250108092538.11474-14-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
parent
bbaf7a0d4c
commit
2eabc49809
@ -17,18 +17,7 @@
|
|||||||
#include "qemu/module.h"
|
#include "qemu/module.h"
|
||||||
#include "target/arm/arm-powerctl.h"
|
#include "target/arm/arm-powerctl.h"
|
||||||
#include "hw/core/cpu.h"
|
#include "hw/core/cpu.h"
|
||||||
|
#include "trace.h"
|
||||||
#ifndef DEBUG_IMX6_SRC
|
|
||||||
#define DEBUG_IMX6_SRC 0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define DPRINTF(fmt, args...) \
|
|
||||||
do { \
|
|
||||||
if (DEBUG_IMX6_SRC) { \
|
|
||||||
fprintf(stderr, "[%s]%s: " fmt , TYPE_IMX6_SRC, \
|
|
||||||
__func__, ##args); \
|
|
||||||
} \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
static const char *imx6_src_reg_name(uint32_t reg)
|
static const char *imx6_src_reg_name(uint32_t reg)
|
||||||
{
|
{
|
||||||
@ -87,7 +76,7 @@ static void imx6_src_reset(DeviceState *dev)
|
|||||||
{
|
{
|
||||||
IMX6SRCState *s = IMX6_SRC(dev);
|
IMX6SRCState *s = IMX6_SRC(dev);
|
||||||
|
|
||||||
DPRINTF("\n");
|
trace_imx6_src_reset();
|
||||||
|
|
||||||
memset(s->regs, 0, sizeof(s->regs));
|
memset(s->regs, 0, sizeof(s->regs));
|
||||||
|
|
||||||
@ -111,7 +100,7 @@ static uint64_t imx6_src_read(void *opaque, hwaddr offset, unsigned size)
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
DPRINTF("reg[%s] => 0x%" PRIx32 "\n", imx6_src_reg_name(index), value);
|
trace_imx6_src_read(imx6_src_reg_name(index), value);
|
||||||
|
|
||||||
return value;
|
return value;
|
||||||
}
|
}
|
||||||
@ -134,8 +123,7 @@ static void imx6_clear_reset_bit(CPUState *cpu, run_on_cpu_data data)
|
|||||||
assert(bql_locked());
|
assert(bql_locked());
|
||||||
|
|
||||||
s->regs[SRC_SCR] = deposit32(s->regs[SRC_SCR], ri->reset_bit, 1, 0);
|
s->regs[SRC_SCR] = deposit32(s->regs[SRC_SCR], ri->reset_bit, 1, 0);
|
||||||
DPRINTF("reg[%s] <= 0x%" PRIx32 "\n",
|
trace_imx6_clear_reset_bit(imx6_src_reg_name(SRC_SCR), s->regs[SRC_SCR]);
|
||||||
imx6_src_reg_name(SRC_SCR), s->regs[SRC_SCR]);
|
|
||||||
|
|
||||||
g_free(ri);
|
g_free(ri);
|
||||||
}
|
}
|
||||||
@ -173,8 +161,7 @@ static void imx6_src_write(void *opaque, hwaddr offset, uint64_t value,
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
DPRINTF("reg[%s] <= 0x%" PRIx32 "\n", imx6_src_reg_name(index),
|
trace_imx6_src_write(imx6_src_reg_name(index), value);
|
||||||
(uint32_t)current_value);
|
|
||||||
|
|
||||||
change_mask = s->regs[index] ^ (uint32_t)current_value;
|
change_mask = s->regs[index] ^ (uint32_t)current_value;
|
||||||
|
|
||||||
|
@ -253,6 +253,12 @@ ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
|
|||||||
ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
|
ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
|
||||||
ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
|
ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
|
||||||
|
|
||||||
|
# imx6_src.c
|
||||||
|
imx6_src_read(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
|
||||||
|
imx6_src_write(const char *reg_name, uint64_t value) "reg[%s] <= 0x%" PRIx64
|
||||||
|
imx6_clear_reset_bit(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
|
||||||
|
imx6_src_reset(void) ""
|
||||||
|
|
||||||
# imx7_src.c
|
# imx7_src.c
|
||||||
imx7_src_read(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
|
imx7_src_read(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
|
||||||
imx7_src_write(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
|
imx7_src_write(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
|
||||||
|
Loading…
x
Reference in New Issue
Block a user