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target/i386: no single-step exception after MOV or POP SS

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Intel SDM 18.3.1.4 "If an occurrence of the MOV or POP instruction
loads the SS register executes with EFLAGS.TF = 1, no single-step debug
exception occurs following the MOV or POP instruction."

Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit f0f0136abba688a6516647a79cc91e03fad6d5d7)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
Paolo Bonzini 2024-05-25 10:03:22 +02:00 committed by Michael Tokarev
parent 89ed6d4b6c
commit 2cd8deb0d9
1 changed files with 1 additions and 1 deletions
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target/i386/tcg/translate.c
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@ -2817,7 +2817,7 @@ do_gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, bool jr)
if (recheck_tf) { if (recheck_tf) {
gen_helper_rechecking_single_step(tcg_env); gen_helper_rechecking_single_step(tcg_env);
tcg_gen_exit_tb(NULL, 0); tcg_gen_exit_tb(NULL, 0);
} else if (s->flags & HF_TF_MASK) { } else if ((s->flags & HF_TF_MASK) && !inhibit) {
gen_helper_single_step(tcg_env); gen_helper_single_step(tcg_env);
} else if (jr && } else if (jr &&
/* give irqs a chance to happen */ /* give irqs a chance to happen */