target/microblaze: Introduce mo_endian() helper

mo_endian() returns the target endianness, currently static.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20241105130431.22564-16-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-09-24 23:45:35 +02:00
parent 401bd7d340
commit 2c9e8ddd76

View File

@ -708,12 +708,17 @@ static void record_unaligned_ess(DisasContext *dc, int rd,
}
#endif
static inline MemOp mo_endian(DisasContext *dc)
{
return MO_TE;
}
static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop,
int mem_index, bool rev)
{
MemOp size = mop & MO_SIZE;
mop |= MO_TE;
mop |= mo_endian(dc);
/*
* When doing reverse accesses we need to do two things.
@ -848,7 +853,8 @@ static bool trans_lwx(DisasContext *dc, arg_typea *arg)
/* lwx does not throw unaligned access errors, so force alignment */
tcg_gen_andi_tl(addr, addr, ~3);
tcg_gen_qemu_ld_i32(cpu_res_val, addr, dc->mem_index, MO_TE | MO_UL);
tcg_gen_qemu_ld_i32(cpu_res_val, addr, dc->mem_index,
mo_endian(dc) | MO_UL);
tcg_gen_mov_tl(cpu_res_addr, addr);
if (arg->rd) {
@ -865,7 +871,7 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop,
{
MemOp size = mop & MO_SIZE;
mop |= MO_TE;
mop |= mo_endian(dc);
/*
* When doing reverse accesses we need to do two things.
@ -1019,7 +1025,7 @@ static bool trans_swx(DisasContext *dc, arg_typea *arg)
tcg_gen_atomic_cmpxchg_i32(tval, cpu_res_addr, cpu_res_val,
reg_for_write(dc, arg->rd),
dc->mem_index, MO_TE | MO_UL);
dc->mem_index, mo_endian(dc) | MO_UL);
tcg_gen_brcond_i32(TCG_COND_NE, cpu_res_val, tval, swx_fail);