target/arm: Move null function and sve check into gen_gvec_ool_zzzp
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220527181907.189259-26-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
4df37e414d
commit
2a753d1e1d
@ -235,15 +235,21 @@ static bool gen_gvec_ool_arg_zpzi(DisasContext *s, gen_helper_gvec_3 *fn,
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Invoke an out-of-line helper on 3 Zregs and a predicate. */
|
/* Invoke an out-of-line helper on 3 Zregs and a predicate. */
|
||||||
static void gen_gvec_ool_zzzp(DisasContext *s, gen_helper_gvec_4 *fn,
|
static bool gen_gvec_ool_zzzp(DisasContext *s, gen_helper_gvec_4 *fn,
|
||||||
int rd, int rn, int rm, int pg, int data)
|
int rd, int rn, int rm, int pg, int data)
|
||||||
{
|
{
|
||||||
unsigned vsz = vec_full_reg_size(s);
|
if (fn == NULL) {
|
||||||
tcg_gen_gvec_4_ool(vec_full_reg_offset(s, rd),
|
return false;
|
||||||
vec_full_reg_offset(s, rn),
|
}
|
||||||
vec_full_reg_offset(s, rm),
|
if (sve_access_check(s)) {
|
||||||
pred_full_reg_offset(s, pg),
|
unsigned vsz = vec_full_reg_size(s);
|
||||||
vsz, vsz, data, fn);
|
tcg_gen_gvec_4_ool(vec_full_reg_offset(s, rd),
|
||||||
|
vec_full_reg_offset(s, rn),
|
||||||
|
vec_full_reg_offset(s, rm),
|
||||||
|
pred_full_reg_offset(s, pg),
|
||||||
|
vsz, vsz, data, fn);
|
||||||
|
}
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Invoke a vector expander on two Zregs. */
|
/* Invoke a vector expander on two Zregs. */
|
||||||
@ -733,13 +739,7 @@ static bool trans_UQSUB_zzz(DisasContext *s, arg_rrr_esz *a)
|
|||||||
|
|
||||||
static bool do_zpzz_ool(DisasContext *s, arg_rprr_esz *a, gen_helper_gvec_4 *fn)
|
static bool do_zpzz_ool(DisasContext *s, arg_rprr_esz *a, gen_helper_gvec_4 *fn)
|
||||||
{
|
{
|
||||||
if (fn == NULL) {
|
return gen_gvec_ool_zzzp(s, fn, a->rd, a->rn, a->rm, a->pg, 0);
|
||||||
return false;
|
|
||||||
}
|
|
||||||
if (sve_access_check(s)) {
|
|
||||||
gen_gvec_ool_zzzp(s, fn, a->rd, a->rn, a->rm, a->pg, 0);
|
|
||||||
}
|
|
||||||
return true;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Select active elememnts from Zn and inactive elements from Zm,
|
/* Select active elememnts from Zn and inactive elements from Zm,
|
||||||
@ -2950,11 +2950,8 @@ TRANS_FEAT(REVW, aa64_sve, gen_gvec_ool_arg_zpz,
|
|||||||
|
|
||||||
static bool trans_SPLICE(DisasContext *s, arg_rprr_esz *a)
|
static bool trans_SPLICE(DisasContext *s, arg_rprr_esz *a)
|
||||||
{
|
{
|
||||||
if (sve_access_check(s)) {
|
return gen_gvec_ool_zzzp(s, gen_helper_sve_splice,
|
||||||
gen_gvec_ool_zzzp(s, gen_helper_sve_splice,
|
a->rd, a->rn, a->rm, a->pg, a->esz);
|
||||||
a->rd, a->rn, a->rm, a->pg, a->esz);
|
|
||||||
}
|
|
||||||
return true;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool trans_SPLICE_sve2(DisasContext *s, arg_rpr_esz *a)
|
static bool trans_SPLICE_sve2(DisasContext *s, arg_rpr_esz *a)
|
||||||
@ -2962,11 +2959,8 @@ static bool trans_SPLICE_sve2(DisasContext *s, arg_rpr_esz *a)
|
|||||||
if (!dc_isar_feature(aa64_sve2, s)) {
|
if (!dc_isar_feature(aa64_sve2, s)) {
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
if (sve_access_check(s)) {
|
return gen_gvec_ool_zzzp(s, gen_helper_sve_splice,
|
||||||
gen_gvec_ool_zzzp(s, gen_helper_sve_splice,
|
a->rd, a->rn, (a->rn + 1) % 32, a->pg, a->esz);
|
||||||
a->rd, a->rn, (a->rn + 1) % 32, a->pg, a->esz);
|
|
||||||
}
|
|
||||||
return true;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
Loading…
x
Reference in New Issue
Block a user