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target/mips: Fix potential integer overflow (CID 1452921)

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Use the BIT_ULL() macro to ensure we use 64-bit arithmetic.
This fixes the following Coverity issue (OVERFLOW_BEFORE_WIDEN):

  CID 1452921:  Integer handling issues:

    Potentially overflowing expression "1 << w" with type "int"
    (32 bits, signed) is evaluated using 32-bit arithmetic, and
    then used in a context that expects an expression of type
    "uint64_t" (64 bits, unsigned).

Fixes: 074cfcb4dae ("target/mips: Implement hardware page table walker")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210505215119.1517465-1-f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-05-05 23:38:36 +02:00
parent d0ac9a6147
commit 2838b1d635
1 changed files with 2 additions and 1 deletions
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3
target/mips/tcg/sysemu/tlb_helper.c
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@ -17,6 +17,7 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>. * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/ */
#include "qemu/osdep.h" #include "qemu/osdep.h"
#include "qemu/bitops.h"
#include "cpu.h" #include "cpu.h"
#include "internal.h" #include "internal.h"
@ -659,7 +660,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t *vaddr,
w = directory_index - 1; w = directory_index - 1;
if (directory_index & 0x1) { if (directory_index & 0x1) {
/* Generate adjacent page from same PTE for odd TLB page */ /* Generate adjacent page from same PTE for odd TLB page */
lsb = (1 << w) >> 6; lsb = BIT_ULL(w) >> 6;
*pw_entrylo0 = entry & ~lsb; /* even page */ *pw_entrylo0 = entry & ~lsb; /* even page */
*pw_entrylo1 = entry | lsb; /* odd page */ *pw_entrylo1 = entry | lsb; /* odd page */
} else if (dph) { } else if (dph) {