hw/sd: ssi-sd: Fix incorrect card response sequence
Per the "Physical Layer Specification Version 8.00" chapter 7.5.1, "Command/Response", there is a minimum 8 clock cycles (Ncr) before the card response shows up on the data out line. However current implementation jumps directly to the sending response state after all 6 bytes command is received, which is a spec violation. Add a new state PREP_RESP in the ssi-sd state machine to handle it. Fixes: 775616c3ae8c ("Partial SD card SPI mode support") Signed-off-by: Bin Meng <bin.meng@windriver.com> Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210123104016.17485-4-bmeng.cn@gmail.com> [PMD: Change VMState version id 2 -> 3] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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@ -36,6 +36,7 @@ do { fprintf(stderr, "ssi_sd: error: " fmt , ## __VA_ARGS__);} while (0)
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typedef enum {
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SSI_SD_CMD = 0,
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SSI_SD_CMDARG,
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SSI_SD_PREP_RESP,
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SSI_SD_RESPONSE,
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SSI_SD_DATA_START,
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SSI_SD_DATA_READ,
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@ -163,12 +164,16 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev, uint32_t val)
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s->response[1] = status;
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DPRINTF("Card status 0x%02x\n", status);
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}
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s->mode = SSI_SD_RESPONSE;
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s->mode = SSI_SD_PREP_RESP;
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s->response_pos = 0;
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} else {
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s->cmdarg[s->arglen++] = val;
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}
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return 0xff;
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case SSI_SD_PREP_RESP:
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DPRINTF("Prepare card response (Ncr)\n");
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s->mode = SSI_SD_RESPONSE;
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return 0xff;
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case SSI_SD_RESPONSE:
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if (s->stopping) {
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s->stopping = 0;
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@ -224,8 +229,8 @@ static int ssi_sd_post_load(void *opaque, int version_id)
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static const VMStateDescription vmstate_ssi_sd = {
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.name = "ssi_sd",
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.version_id = 2,
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.minimum_version_id = 2,
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.version_id = 3,
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.minimum_version_id = 3,
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.post_load = ssi_sd_post_load,
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.fields = (VMStateField []) {
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VMSTATE_UINT32(mode, ssi_sd_state),
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