hw/intc/loongson_ipi: Access memory in little endian
Loongson IPI is only available in little-endian, so use that to access the guest memory (in case we run on a big-endian host). Cc: qemu-stable@nongnu.org Signed-off-by: Bibo Mao <maobibo@loongson.cn> Fixes: f6783e3438 ("hw/loongarch: Add LoongArch ipi interrupt support") [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Tested-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20240718133312.10324-3-philmd@linaro.org>
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@ -14,6 +14,7 @@
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#include "qapi/error.h"
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#include "qapi/error.h"
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#include "qemu/log.h"
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#include "qemu/log.h"
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#include "exec/address-spaces.h"
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#include "exec/address-spaces.h"
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#include "exec/memory.h"
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#include "migration/vmstate.h"
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#include "migration/vmstate.h"
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#ifdef TARGET_LOONGARCH64
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#ifdef TARGET_LOONGARCH64
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#include "target/loongarch/cpu.h"
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#include "target/loongarch/cpu.h"
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@ -102,7 +103,7 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr,
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* if the mask is 0, we need not to do anything.
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* if the mask is 0, we need not to do anything.
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*/
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*/
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if ((val >> 27) & 0xf) {
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if ((val >> 27) & 0xf) {
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data = address_space_ldl(iocsr_as, addr, attrs, NULL);
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data = address_space_ldl_le(iocsr_as, addr, attrs, NULL);
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for (i = 0; i < 4; i++) {
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for (i = 0; i < 4; i++) {
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/* get mask for byte writing */
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/* get mask for byte writing */
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if (val & (0x1 << (27 + i))) {
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if (val & (0x1 << (27 + i))) {
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@ -113,7 +114,7 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr,
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data &= mask;
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data &= mask;
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data |= (val >> 32) & ~mask;
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data |= (val >> 32) & ~mask;
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address_space_stl(iocsr_as, addr, data, attrs, NULL);
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address_space_stl_le(iocsr_as, addr, data, attrs, NULL);
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return MEMTX_OK;
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return MEMTX_OK;
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}
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}
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