target-cris/helper.c: Update Coding Style
Reindent, add missing braces and drop/adjust whitespace. Prepares for CPUArchState-to-CPUState field movements in cpu_cris_handle_mmu_fault(), do_interruptv10() and do_interrupt(). The remaining functions were so minor that they can be fixed in one go. Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
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				@ -74,21 +74,19 @@ int cpu_cris_handle_mmu_fault (CPUCRISState *env, target_ulong address, int rw,
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    D(printf("%s addr=%x pc=%x rw=%x\n", __func__, address, env->pc, rw));
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    miss = cris_mmu_translate(&res, env, address & TARGET_PAGE_MASK,
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                              rw, mmu_idx, 0);
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	if (miss)
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	{
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		if (env->exception_index == EXCP_BUSFAULT)
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    if (miss) {
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        if (env->exception_index == EXCP_BUSFAULT) {
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            cpu_abort(env,
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                      "CRIS: Illegal recursive bus fault."
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                      "addr=%x rw=%d\n",
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                      address, rw);
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        }
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        env->pregs[PR_EDA] = address;
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        env->exception_index = EXCP_BUSFAULT;
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        env->fault_vector = res.bf_vec;
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        r = 1;
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	}
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	else
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	{
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    } else {
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        /*
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         * Mask off the cache selection bit. The ETRAX busses do not
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         * see the top bit.
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@ -99,10 +97,11 @@ int cpu_cris_handle_mmu_fault (CPUCRISState *env, target_ulong address, int rw,
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                     prot, mmu_idx, TARGET_PAGE_SIZE);
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        r = 0;
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    }
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	if (r > 0)
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    if (r > 0) {
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        D_LOG("%s returns %d irqreq=%x addr=%x phy=%x vec=%x pc=%x\n",
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              __func__, r, env->interrupt_request, address, res.phy,
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              res.bf_vec, env->pc);
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    }
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    return r;
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}
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@ -115,8 +114,7 @@ static void do_interruptv10(CPUCRISState *env)
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          env->interrupt_request);
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    assert(!(env->pregs[PR_CCS] & PFIX_FLAG));
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	switch (env->exception_index)
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	{
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    switch (env->exception_index) {
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    case EXCP_BREAK:
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        /* These exceptions are genereated by the core itself.
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           ERP should point to the insn following the brk.  */
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@ -166,15 +164,15 @@ void do_interrupt(CPUCRISState *env)
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{
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    int ex_vec = -1;
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	if (env->pregs[PR_VR] < 32)
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    if (env->pregs[PR_VR] < 32) {
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        return do_interruptv10(env);
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    }
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    D_LOG("exception index=%d interrupt_req=%d\n",
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          env->exception_index,
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          env->interrupt_request);
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	switch (env->exception_index)
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	{
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    switch (env->exception_index) {
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    case EXCP_BREAK:
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        /* These exceptions are genereated by the core itself.
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           ERP should point to the insn following the brk.  */
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@ -258,8 +256,9 @@ hwaddr cpu_get_phys_page_debug(CPUCRISState * env, target_ulong addr)
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        miss = cris_mmu_translate(&res, env, addr, 2, 0, 1);
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    }
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	if (!miss)
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    if (!miss) {
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        phy = res.phy;
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    }
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    D(fprintf(stderr, "%s %x -> %x\n", __func__, addr, phy));
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    return phy;
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}
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