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target/riscv: Convert misa_mxl_max using GLib macros

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Use GLib conversion macros to pass misa_mxl_max as
riscv_cpu_class_init() class data.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250210133134.90879-6-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-02-10 10:11:52 +01:00
parent 3bbcc0f732
commit 2101c85aea
1 changed files with 5 additions and 5 deletions
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10
target/riscv/cpu.c
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@ -3056,7 +3056,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
{
RISCVCPUClass *mcc = RISCV_CPU_CLASS(c);
mcc->misa_mxl_max = (RISCVMXL)(uintptr_t)data;
mcc->misa_mxl_max = (RISCVMXL)GPOINTER_TO_UINT(data);
riscv_cpu_validate_misa_mxl(mcc);
}
@ -3158,7 +3158,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename)
.parent = TYPE_RISCV_DYNAMIC_CPU, \
.instance_init = (initfn), \
.class_init = riscv_cpu_class_init, \
.class_data = (void *)(misa_mxl_max) \
.class_data = GUINT_TO_POINTER(misa_mxl_max) \
}
#define DEFINE_VENDOR_CPU(type_name, misa_mxl_max, initfn) \
@ -3167,7 +3167,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename)
.parent = TYPE_RISCV_VENDOR_CPU, \
.instance_init = (initfn), \
.class_init = riscv_cpu_class_init, \
.class_data = (void *)(misa_mxl_max) \
.class_data = GUINT_TO_POINTER(misa_mxl_max) \
}
#define DEFINE_BARE_CPU(type_name, misa_mxl_max, initfn) \
@ -3176,7 +3176,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename)
.parent = TYPE_RISCV_BARE_CPU, \
.instance_init = (initfn), \
.class_init = riscv_cpu_class_init, \
.class_data = (void *)(misa_mxl_max) \
.class_data = GUINT_TO_POINTER(misa_mxl_max) \
}
#define DEFINE_PROFILE_CPU(type_name, misa_mxl_max, initfn) \
@ -3185,7 +3185,7 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename)
.parent = TYPE_RISCV_BARE_CPU, \
.instance_init = (initfn), \
.class_init = riscv_cpu_class_init, \
.class_data = (void *)(misa_mxl_max) \
.class_data = GUINT_TO_POINTER(misa_mxl_max) \
}
static const TypeInfo riscv_cpu_type_infos[] = {