target/arm: Disable SVE extensions when SVE is disabled
Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2304 Reported-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Message-id: 20240526204551.553282-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> (cherry picked from commit daf9748ac002ec35258e5986b6257961fd04b565) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
parent
65b44e55e4
commit
1c8a740fad
@ -109,7 +109,11 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
|
|||||||
* No explicit bits enabled, and no implicit bits from sve-max-vq.
|
* No explicit bits enabled, and no implicit bits from sve-max-vq.
|
||||||
*/
|
*/
|
||||||
if (!cpu_isar_feature(aa64_sve, cpu)) {
|
if (!cpu_isar_feature(aa64_sve, cpu)) {
|
||||||
/* SVE is disabled and so are all vector lengths. Good. */
|
/*
|
||||||
|
* SVE is disabled and so are all vector lengths. Good.
|
||||||
|
* Disable all SVE extensions as well.
|
||||||
|
*/
|
||||||
|
cpu->isar.id_aa64zfr0 = 0;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Loading…
x
Reference in New Issue
Block a user