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hw/net/xilinx_ethlite: Update QOM style

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Use XlnxXpsEthLite typedef, OBJECT_DECLARE_SIMPLE_TYPE macro;
convert type_init() to DEFINE_TYPES().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Message-Id: <20241112181044.92193-5-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-11-09 19:28:39 +01:00
parent 9dd886c04d
commit 0fb867ed63
1 changed files with 22 additions and 26 deletions
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48
hw/net/xilinx_ethlite.c
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@ -53,10 +53,9 @@
#define CTRL_S 0x1 #define CTRL_S 0x1
#define TYPE_XILINX_ETHLITE "xlnx.xps-ethernetlite" #define TYPE_XILINX_ETHLITE "xlnx.xps-ethernetlite"
DECLARE_INSTANCE_CHECKER(struct xlx_ethlite, XILINX_ETHLITE, OBJECT_DECLARE_SIMPLE_TYPE(XlnxXpsEthLite, XILINX_ETHLITE)
TYPE_XILINX_ETHLITE)
struct xlx_ethlite struct XlnxXpsEthLite
{ {
SysBusDevice parent_obj; SysBusDevice parent_obj;
@ -73,7 +72,7 @@ struct xlx_ethlite
uint32_t regs[R_MAX]; uint32_t regs[R_MAX];
}; };
static inline void eth_pulse_irq(struct xlx_ethlite *s) static inline void eth_pulse_irq(XlnxXpsEthLite *s)
{ {
/* Only the first gie reg is active. */ /* Only the first gie reg is active. */
if (s->regs[R_TX_GIE0] & GIE_GIE) { if (s->regs[R_TX_GIE0] & GIE_GIE) {
@ -84,7 +83,7 @@ static inline void eth_pulse_irq(struct xlx_ethlite *s)
static uint64_t static uint64_t
eth_read(void *opaque, hwaddr addr, unsigned int size) eth_read(void *opaque, hwaddr addr, unsigned int size)
{ {
struct xlx_ethlite *s = opaque; XlnxXpsEthLite *s = opaque;
uint32_t r = 0; uint32_t r = 0;
addr >>= 2; addr >>= 2;
@ -112,7 +111,7 @@ static void
eth_write(void *opaque, hwaddr addr, eth_write(void *opaque, hwaddr addr,
uint64_t val64, unsigned int size) uint64_t val64, unsigned int size)
{ {
struct xlx_ethlite *s = opaque; XlnxXpsEthLite *s = opaque;
unsigned int base = 0; unsigned int base = 0;
uint32_t value = val64; uint32_t value = val64;
@ -172,7 +171,7 @@ static const MemoryRegionOps eth_ops = {
static bool eth_can_rx(NetClientState *nc) static bool eth_can_rx(NetClientState *nc)
{ {
struct xlx_ethlite *s = qemu_get_nic_opaque(nc); XlnxXpsEthLite *s = qemu_get_nic_opaque(nc);
unsigned int rxbase = s->rxbuf * (0x800 / 4); unsigned int rxbase = s->rxbuf * (0x800 / 4);
return !(s->regs[rxbase + R_RX_CTRL0] & CTRL_S); return !(s->regs[rxbase + R_RX_CTRL0] & CTRL_S);
@ -180,7 +179,7 @@ static bool eth_can_rx(NetClientState *nc)
static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size) static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size)
{ {
struct xlx_ethlite *s = qemu_get_nic_opaque(nc); XlnxXpsEthLite *s = qemu_get_nic_opaque(nc);
unsigned int rxbase = s->rxbuf * (0x800 / 4); unsigned int rxbase = s->rxbuf * (0x800 / 4);
/* DA filter. */ /* DA filter. */
@ -210,7 +209,7 @@ static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size)
static void xilinx_ethlite_reset(DeviceState *dev) static void xilinx_ethlite_reset(DeviceState *dev)
{ {
struct xlx_ethlite *s = XILINX_ETHLITE(dev); XlnxXpsEthLite *s = XILINX_ETHLITE(dev);
s->rxbuf = 0; s->rxbuf = 0;
} }
@ -224,7 +223,7 @@ static NetClientInfo net_xilinx_ethlite_info = {
static void xilinx_ethlite_realize(DeviceState *dev, Error **errp) static void xilinx_ethlite_realize(DeviceState *dev, Error **errp)
{ {
struct xlx_ethlite *s = XILINX_ETHLITE(dev); XlnxXpsEthLite *s = XILINX_ETHLITE(dev);
qemu_macaddr_default_if_unset(&s->conf.macaddr); qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf, s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf,
@ -235,7 +234,7 @@ static void xilinx_ethlite_realize(DeviceState *dev, Error **errp)
static void xilinx_ethlite_init(Object *obj) static void xilinx_ethlite_init(Object *obj)
{ {
struct xlx_ethlite *s = XILINX_ETHLITE(obj); XlnxXpsEthLite *s = XILINX_ETHLITE(obj);
sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
@ -245,9 +244,9 @@ static void xilinx_ethlite_init(Object *obj)
} }
static const Property xilinx_ethlite_properties[] = { static const Property xilinx_ethlite_properties[] = {
DEFINE_PROP_UINT32("tx-ping-pong", struct xlx_ethlite, c_tx_pingpong, 1), DEFINE_PROP_UINT32("tx-ping-pong", XlnxXpsEthLite, c_tx_pingpong, 1),
DEFINE_PROP_UINT32("rx-ping-pong", struct xlx_ethlite, c_rx_pingpong, 1), DEFINE_PROP_UINT32("rx-ping-pong", XlnxXpsEthLite, c_rx_pingpong, 1),
DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf), DEFINE_NIC_PROPERTIES(XlnxXpsEthLite, conf),
}; };
static void xilinx_ethlite_class_init(ObjectClass *klass, void *data) static void xilinx_ethlite_class_init(ObjectClass *klass, void *data)
@ -259,17 +258,14 @@ static void xilinx_ethlite_class_init(ObjectClass *klass, void *data)
device_class_set_props(dc, xilinx_ethlite_properties); device_class_set_props(dc, xilinx_ethlite_properties);
} }
static const TypeInfo xilinx_ethlite_info = { static const TypeInfo xilinx_ethlite_types[] = {
.name = TYPE_XILINX_ETHLITE, {
.parent = TYPE_SYS_BUS_DEVICE, .name = TYPE_XILINX_ETHLITE,
.instance_size = sizeof(struct xlx_ethlite), .parent = TYPE_SYS_BUS_DEVICE,
.instance_init = xilinx_ethlite_init, .instance_size = sizeof(XlnxXpsEthLite),
.class_init = xilinx_ethlite_class_init, .instance_init = xilinx_ethlite_init,
.class_init = xilinx_ethlite_class_init,
},
}; };
static void xilinx_ethlite_register_types(void) DEFINE_TYPES(xilinx_ethlite_types)
{
type_register_static(&xilinx_ethlite_info);
}
type_init(xilinx_ethlite_register_types)