
Use MSR mnemonics from cpu.h instead of magic numbers for the CPUPPCState.msr_mask initialization. There is one bit in the 401x2 (and subsequent) model that I could not find any documentation for. It is open coded at little endian bit position 20: pcc->msr_mask = (1ull << 20) | (1ull << MSR_KEY) | (1ull << MSR_POW) | (1ull << MSR_CE) | ... Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Read the documentation in qemu-doc.html or on http://wiki.qemu-project.org - QEMU team
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