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Correct MIPS register naming in libafl_qemu (#977)

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Sparrrgh 2022-12-31 09:23:50 +01:00 committed by GitHub
parent 9458549fef
commit 43425cf103
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1 changed files with 32 additions and 36 deletions
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68
libafl_qemu/src/mips.rs
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@ -4,52 +4,48 @@ use pyo3::prelude::*;
pub use strum_macros::EnumIter; pub use strum_macros::EnumIter;
pub use syscall_numbers::mips::*; pub use syscall_numbers::mips::*;
/// Registers for the ARM instruction set. /// Registers for the MIPS instruction set.
#[derive(IntoPrimitive, TryFromPrimitive, Debug, Clone, Copy, EnumIter)] #[derive(IntoPrimitive, TryFromPrimitive, Debug, Clone, Copy, EnumIter)]
#[repr(i32)] #[repr(i32)]
pub enum Regs { pub enum Regs {
R0 = 0, R0 = 0,
R1 = 1, At = 1,
R2 = 2, V0 = 2,
R3 = 3, V1 = 3,
R4 = 4, A0 = 4,
R5 = 5, A1 = 5,
R6 = 6, A2 = 6,
R7 = 7, A3 = 7,
R8 = 8, T0 = 8,
R9 = 9, T1 = 9,
R10 = 10, T2 = 10,
R11 = 11, T3 = 11,
R12 = 12, T4 = 12,
R13 = 13, T5 = 13,
R14 = 14, T6 = 14,
R15 = 15, T7 = 15,
R16 = 16, S0 = 16,
R17 = 17, S1 = 17,
R18 = 18, S2 = 18,
R19 = 19, S3 = 19,
R20 = 20, S4 = 20,
R21 = 21, S5 = 21,
R22 = 22, S6 = 22,
R23 = 23, S7 = 23,
R24 = 24, T8 = 24,
R25 = 25, T9 = 25,
R26 = 26, K0 = 26,
R27 = 27, K1 = 27,
R28 = 28, Gp = 28,
R29 = 29, Sp = 29,
R30 = 30, Fp = 30,
R31 = 31, Ra = 31,
} }
/// alias registers /// alias registers
#[allow(non_upper_case_globals)] #[allow(non_upper_case_globals)]
impl Regs { impl Regs {
pub const Zero: Regs = Regs::R0; pub const Zero: Regs = Regs::R0;
pub const Gp: Regs = Regs::R28;
pub const Sp: Regs = Regs::R29;
pub const Fp: Regs = Regs::R30;
pub const Ra: Regs = Regs::R31;
} }
#[cfg(feature = "python")] #[cfg(feature = "python")]