fix interrupt shifter, isr tracer

This commit is contained in:
Alwin Berger 2024-05-21 12:32:00 +02:00
parent f13412c175
commit 3444fdd8ec
2 changed files with 2 additions and 2 deletions

View File

@ -83,7 +83,7 @@ where
t[j]=target_bytes[i*4+j];
}
if i == 0 || true {
start_tick = u32::from_le_bytes(t)+FIRST_INT;
start_tick = u32::saturating_add(u32::from_le_bytes(t),FIRST_INT);
} else {
start_tick = u32::saturating_add(start_tick,max(MINIMUM_INTER_ARRIVAL_TIME,u32::from_le_bytes(t)));
}

View File

@ -298,7 +298,7 @@ fn add_abb_info(trace: &mut Vec<ExecInterval>, table: &HashMap<u64, ReducedFreeR
if let Some(last) = open_abb_at_this_task_or_level.get(&(trace[i].level, if trace[i].level<2 {&curr_name} else {trace[i].start_capture.1.as_str()})) {
wip_abb_trace.push(wip_abb_trace[*last].clone());
} else {
wip_abb_trace.push(Rc::new(RefCell::new(AtomicBasicBlock{start: edges[i].1.unwrap(), ends: HashSet::new(), level: if trace[i].level<2 {trace[i].level} else {2}})))
wip_abb_trace.push(Rc::new(RefCell::new(AtomicBasicBlock{start: edges[i].1.unwrap_or(0), ends: HashSet::new(), level: if trace[i].level<2 {trace[i].level} else {2}})))
}
} else {
// generic case, continue a preempted block