324 lines
9.1 KiB
C
324 lines
9.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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#include "lan966x_main.h"
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#define VLANACCESS_CMD_IDLE 0
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#define VLANACCESS_CMD_READ 1
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#define VLANACCESS_CMD_WRITE 2
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#define VLANACCESS_CMD_INIT 3
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static int lan966x_vlan_get_status(struct lan966x *lan966x)
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{
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return lan_rd(lan966x, ANA_VLANACCESS);
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}
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static int lan966x_vlan_wait_for_completion(struct lan966x *lan966x)
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{
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u32 val;
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return readx_poll_timeout(lan966x_vlan_get_status,
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lan966x, val,
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(val & ANA_VLANACCESS_VLAN_TBL_CMD) ==
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VLANACCESS_CMD_IDLE,
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TABLE_UPDATE_SLEEP_US, TABLE_UPDATE_TIMEOUT_US);
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}
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static void lan966x_vlan_set_mask(struct lan966x *lan966x, u16 vid)
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{
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u16 mask = lan966x->vlan_mask[vid];
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bool cpu_dis;
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cpu_dis = !(mask & BIT(CPU_PORT));
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/* Set flags and the VID to configure */
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lan_rmw(ANA_VLANTIDX_VLAN_PGID_CPU_DIS_SET(cpu_dis) |
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ANA_VLANTIDX_V_INDEX_SET(vid),
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ANA_VLANTIDX_VLAN_PGID_CPU_DIS |
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ANA_VLANTIDX_V_INDEX,
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lan966x, ANA_VLANTIDX);
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/* Set the vlan port members mask */
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lan_rmw(ANA_VLAN_PORT_MASK_VLAN_PORT_MASK_SET(mask),
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ANA_VLAN_PORT_MASK_VLAN_PORT_MASK,
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lan966x, ANA_VLAN_PORT_MASK);
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/* Issue a write command */
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lan_rmw(ANA_VLANACCESS_VLAN_TBL_CMD_SET(VLANACCESS_CMD_WRITE),
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ANA_VLANACCESS_VLAN_TBL_CMD,
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lan966x, ANA_VLANACCESS);
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if (lan966x_vlan_wait_for_completion(lan966x))
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dev_err(lan966x->dev, "Vlan set mask failed\n");
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}
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static void lan966x_vlan_port_add_vlan_mask(struct lan966x_port *port, u16 vid)
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{
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struct lan966x *lan966x = port->lan966x;
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u8 p = port->chip_port;
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lan966x->vlan_mask[vid] |= BIT(p);
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lan966x_vlan_set_mask(lan966x, vid);
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}
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static void lan966x_vlan_port_del_vlan_mask(struct lan966x_port *port, u16 vid)
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{
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struct lan966x *lan966x = port->lan966x;
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u8 p = port->chip_port;
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lan966x->vlan_mask[vid] &= ~BIT(p);
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lan966x_vlan_set_mask(lan966x, vid);
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}
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static bool lan966x_vlan_port_any_vlan_mask(struct lan966x *lan966x, u16 vid)
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{
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return !!(lan966x->vlan_mask[vid] & ~BIT(CPU_PORT));
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}
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static void lan966x_vlan_cpu_add_vlan_mask(struct lan966x *lan966x, u16 vid)
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{
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lan966x->vlan_mask[vid] |= BIT(CPU_PORT);
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lan966x_vlan_set_mask(lan966x, vid);
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}
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static void lan966x_vlan_cpu_del_vlan_mask(struct lan966x *lan966x, u16 vid)
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{
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lan966x->vlan_mask[vid] &= ~BIT(CPU_PORT);
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lan966x_vlan_set_mask(lan966x, vid);
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}
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static void lan966x_vlan_cpu_add_cpu_vlan_mask(struct lan966x *lan966x, u16 vid)
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{
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__set_bit(vid, lan966x->cpu_vlan_mask);
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}
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static void lan966x_vlan_cpu_del_cpu_vlan_mask(struct lan966x *lan966x, u16 vid)
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{
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__clear_bit(vid, lan966x->cpu_vlan_mask);
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}
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bool lan966x_vlan_cpu_member_cpu_vlan_mask(struct lan966x *lan966x, u16 vid)
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{
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return test_bit(vid, lan966x->cpu_vlan_mask);
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}
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static u16 lan966x_vlan_port_get_pvid(struct lan966x_port *port)
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{
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struct lan966x *lan966x = port->lan966x;
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if (!(lan966x->bridge_mask & BIT(port->chip_port)))
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return HOST_PVID;
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return port->vlan_aware ? port->pvid : UNAWARE_PVID;
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}
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int lan966x_vlan_port_set_vid(struct lan966x_port *port, u16 vid,
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bool pvid, bool untagged)
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{
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struct lan966x *lan966x = port->lan966x;
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/* Egress vlan classification */
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if (untagged && port->vid != vid) {
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if (port->vid) {
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dev_err(lan966x->dev,
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"Port already has a native VLAN: %d\n",
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port->vid);
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return -EBUSY;
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}
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port->vid = vid;
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}
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/* Default ingress vlan classification */
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if (pvid)
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port->pvid = vid;
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return 0;
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}
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static void lan966x_vlan_port_remove_vid(struct lan966x_port *port, u16 vid)
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{
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if (port->pvid == vid)
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port->pvid = 0;
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if (port->vid == vid)
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port->vid = 0;
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}
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void lan966x_vlan_port_set_vlan_aware(struct lan966x_port *port,
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bool vlan_aware)
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{
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port->vlan_aware = vlan_aware;
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}
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void lan966x_vlan_port_apply(struct lan966x_port *port)
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{
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struct lan966x *lan966x = port->lan966x;
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u16 pvid;
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u32 val;
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pvid = lan966x_vlan_port_get_pvid(port);
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/* Ingress clasification (ANA_PORT_VLAN_CFG) */
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/* Default vlan to classify for untagged frames (may be zero) */
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val = ANA_VLAN_CFG_VLAN_VID_SET(pvid);
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if (port->vlan_aware)
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val |= ANA_VLAN_CFG_VLAN_AWARE_ENA_SET(1) |
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ANA_VLAN_CFG_VLAN_POP_CNT_SET(1);
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lan_rmw(val,
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ANA_VLAN_CFG_VLAN_VID | ANA_VLAN_CFG_VLAN_AWARE_ENA |
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ANA_VLAN_CFG_VLAN_POP_CNT,
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lan966x, ANA_VLAN_CFG(port->chip_port));
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lan_rmw(DEV_MAC_TAGS_CFG_VLAN_AWR_ENA_SET(port->vlan_aware) |
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DEV_MAC_TAGS_CFG_VLAN_DBL_AWR_ENA_SET(port->vlan_aware),
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DEV_MAC_TAGS_CFG_VLAN_AWR_ENA |
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DEV_MAC_TAGS_CFG_VLAN_DBL_AWR_ENA,
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lan966x, DEV_MAC_TAGS_CFG(port->chip_port));
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/* Drop frames with multicast source address */
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val = ANA_DROP_CFG_DROP_MC_SMAC_ENA_SET(1);
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if (port->vlan_aware && !pvid)
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/* If port is vlan-aware and tagged, drop untagged and priority
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* tagged frames.
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*/
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val |= ANA_DROP_CFG_DROP_UNTAGGED_ENA_SET(1) |
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ANA_DROP_CFG_DROP_PRIO_S_TAGGED_ENA_SET(1) |
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ANA_DROP_CFG_DROP_PRIO_C_TAGGED_ENA_SET(1);
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lan_wr(val, lan966x, ANA_DROP_CFG(port->chip_port));
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/* Egress configuration (REW_TAG_CFG): VLAN tag type to 8021Q */
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val = REW_TAG_CFG_TAG_TPID_CFG_SET(0);
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if (port->vlan_aware) {
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if (port->vid)
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/* Tag all frames except when VID == DEFAULT_VLAN */
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val |= REW_TAG_CFG_TAG_CFG_SET(1);
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else
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val |= REW_TAG_CFG_TAG_CFG_SET(3);
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}
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/* Update only some bits in the register */
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lan_rmw(val,
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REW_TAG_CFG_TAG_TPID_CFG | REW_TAG_CFG_TAG_CFG,
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lan966x, REW_TAG_CFG(port->chip_port));
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/* Set default VLAN and tag type to 8021Q */
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lan_rmw(REW_PORT_VLAN_CFG_PORT_TPID_SET(ETH_P_8021Q) |
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REW_PORT_VLAN_CFG_PORT_VID_SET(port->vid),
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REW_PORT_VLAN_CFG_PORT_TPID |
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REW_PORT_VLAN_CFG_PORT_VID,
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lan966x, REW_PORT_VLAN_CFG(port->chip_port));
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}
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void lan966x_vlan_port_add_vlan(struct lan966x_port *port,
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u16 vid,
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bool pvid,
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bool untagged)
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{
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struct lan966x *lan966x = port->lan966x;
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/* If the CPU(br) is already part of the vlan then add the fdb
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* entries in MAC table to copy the frames to the CPU(br).
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* If the CPU(br) is not part of the vlan then it would
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* just drop the frames.
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*/
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if (lan966x_vlan_cpu_member_cpu_vlan_mask(lan966x, vid)) {
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lan966x_vlan_cpu_add_vlan_mask(lan966x, vid);
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lan966x_fdb_write_entries(lan966x, vid);
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lan966x_mdb_write_entries(lan966x, vid);
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}
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lan966x_vlan_port_set_vid(port, vid, pvid, untagged);
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lan966x_vlan_port_add_vlan_mask(port, vid);
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lan966x_vlan_port_apply(port);
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}
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void lan966x_vlan_port_del_vlan(struct lan966x_port *port, u16 vid)
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{
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struct lan966x *lan966x = port->lan966x;
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lan966x_vlan_port_remove_vid(port, vid);
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lan966x_vlan_port_del_vlan_mask(port, vid);
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lan966x_vlan_port_apply(port);
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/* In case there are no other ports in vlan then remove the CPU from
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* that vlan but still keep it in the mask because it may be needed
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* again then another port gets added in that vlan
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*/
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if (!lan966x_vlan_port_any_vlan_mask(lan966x, vid)) {
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lan966x_vlan_cpu_del_vlan_mask(lan966x, vid);
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lan966x_fdb_erase_entries(lan966x, vid);
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lan966x_mdb_erase_entries(lan966x, vid);
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}
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}
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void lan966x_vlan_cpu_add_vlan(struct lan966x *lan966x, u16 vid)
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{
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/* Add an entry in the MAC table for the CPU
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* Add the CPU part of the vlan only if there is another port in that
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* vlan otherwise all the broadcast frames in that vlan will go to CPU
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* even if none of the ports are in the vlan and then the CPU will just
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* need to discard these frames. It is required to store this
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* information so when a front port is added then it would add also the
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* CPU port.
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*/
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if (lan966x_vlan_port_any_vlan_mask(lan966x, vid)) {
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lan966x_vlan_cpu_add_vlan_mask(lan966x, vid);
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lan966x_mdb_write_entries(lan966x, vid);
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}
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lan966x_vlan_cpu_add_cpu_vlan_mask(lan966x, vid);
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lan966x_fdb_write_entries(lan966x, vid);
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}
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void lan966x_vlan_cpu_del_vlan(struct lan966x *lan966x, u16 vid)
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{
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/* Remove the CPU part of the vlan */
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lan966x_vlan_cpu_del_cpu_vlan_mask(lan966x, vid);
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lan966x_vlan_cpu_del_vlan_mask(lan966x, vid);
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lan966x_fdb_erase_entries(lan966x, vid);
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lan966x_mdb_erase_entries(lan966x, vid);
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}
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void lan966x_vlan_init(struct lan966x *lan966x)
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{
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u16 port, vid;
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/* Clear VLAN table, by default all ports are members of all VLANS */
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lan_rmw(ANA_VLANACCESS_VLAN_TBL_CMD_SET(VLANACCESS_CMD_INIT),
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ANA_VLANACCESS_VLAN_TBL_CMD,
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lan966x, ANA_VLANACCESS);
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lan966x_vlan_wait_for_completion(lan966x);
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for (vid = 1; vid < VLAN_N_VID; vid++) {
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lan966x->vlan_mask[vid] = 0;
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lan966x_vlan_set_mask(lan966x, vid);
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}
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/* Set all the ports + cpu to be part of HOST_PVID and UNAWARE_PVID */
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lan966x->vlan_mask[HOST_PVID] =
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GENMASK(lan966x->num_phys_ports - 1, 0) | BIT(CPU_PORT);
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lan966x_vlan_set_mask(lan966x, HOST_PVID);
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lan966x->vlan_mask[UNAWARE_PVID] =
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GENMASK(lan966x->num_phys_ports - 1, 0) | BIT(CPU_PORT);
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lan966x_vlan_set_mask(lan966x, UNAWARE_PVID);
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lan966x_vlan_cpu_add_cpu_vlan_mask(lan966x, UNAWARE_PVID);
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/* Configure the CPU port to be vlan aware */
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lan_wr(ANA_VLAN_CFG_VLAN_VID_SET(0) |
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ANA_VLAN_CFG_VLAN_AWARE_ENA_SET(1) |
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ANA_VLAN_CFG_VLAN_POP_CNT_SET(1),
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lan966x, ANA_VLAN_CFG(CPU_PORT));
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/* Set vlan ingress filter mask to all ports */
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lan_wr(GENMASK(lan966x->num_phys_ports, 0),
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lan966x, ANA_VLANMASK);
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for (port = 0; port < lan966x->num_phys_ports; port++) {
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lan_wr(0, lan966x, REW_PORT_VLAN_CFG(port));
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lan_wr(0, lan966x, REW_TAG_CFG(port));
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}
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}
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