198 lines
5.1 KiB
YAML
198 lines
5.1 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra SOR Output Encoder
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maintainers:
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- Thierry Reding <thierry.reding@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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description: |
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The Serial Output Resource (SOR) can be used to drive HDMI, LVDS, eDP
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and DP outputs.
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properties:
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$nodename:
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pattern: "^sor@[0-9a-f]+$"
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compatible:
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oneOf:
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- enum:
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- nvidia,tegra124-sor
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- nvidia,tegra210-sor
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- nvidia,tegra210-sor1
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- nvidia,tegra186-sor
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- nvidia,tegra186-sor1
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- nvidia,tegra194-sor
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- items:
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- const: nvidia,tegra132-sor
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- const: nvidia,tegra124-sor
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 5
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maxItems: 6
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clock-names:
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minItems: 5
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maxItems: 6
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resets:
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items:
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- description: module reset
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reset-names:
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items:
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- const: sor
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power-domains:
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maxItems: 1
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avdd-io-hdmi-dp-supply:
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description: I/O supply for HDMI/DP
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vdd-hdmi-dp-pll-supply:
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description: PLL supply for HDMI/DP
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hdmi-supply:
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description: +5.0V HDMI connector supply, required for HDMI
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# Tegra186 and later
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nvidia,interface:
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description: index of the SOR interface
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$ref: "/schemas/types.yaml#/definitions/uint32"
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nvidia,ddc-i2c-bus:
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description: phandle of an I2C controller used for DDC EDID
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probing
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$ref: "/schemas/types.yaml#/definitions/phandle"
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nvidia,hpd-gpio:
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description: specifies a GPIO used for hotplug detection
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maxItems: 1
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nvidia,edid:
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description: supplies a binary EDID blob
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$ref: "/schemas/types.yaml#/definitions/uint8-array"
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nvidia,panel:
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description: phandle of a display panel, required for eDP
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$ref: "/schemas/types.yaml#/definitions/phandle"
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nvidia,xbar-cfg:
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description: 5 cells containing the crossbar configuration.
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Each lane of the SOR, identified by the cell's index, is
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mapped via the crossbar to the pad specified by the cell's
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value.
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$ref: "/schemas/types.yaml#/definitions/uint32-array"
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# optional when driving an eDP output
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nvidia,dpaux:
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description: phandle to a DispayPort AUX interface
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$ref: "/schemas/types.yaml#/definitions/phandle"
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- nvidia,tegra186-sor
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- nvidia,tegra194-sor
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then:
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properties:
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clocks:
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items:
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- description: clock input for the SOR hardware
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- description: SOR output clock
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- description: input for the pixel clock
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- description: reference clock for the SOR clock
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- description: safe reference clock for the SOR clock
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during power up
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- description: SOR pad output clock
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clock-names:
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items:
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- const: sor
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- enum:
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- source # deprecated
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- out
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- const: parent
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- const: dp
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- const: safe
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- const: pad
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else:
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properties:
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clocks:
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items:
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- description: clock input for the SOR hardware
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- description: SOR output clock
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- description: input for the pixel clock
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- description: reference clock for the SOR clock
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- description: safe reference clock for the SOR clock
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during power up
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clock-names:
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items:
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- const: sor
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- enum:
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- source # deprecated
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- out
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- const: parent
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- const: dp
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- const: safe
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additionalProperties: false
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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- reset-names
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- avdd-io-hdmi-dp-supply
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- vdd-hdmi-dp-pll-supply
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examples:
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- |
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#include <dt-bindings/clock/tegra210-car.h>
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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sor0: sor@54540000 {
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compatible = "nvidia,tegra210-sor";
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reg = <0x54540000 0x00040000>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA210_CLK_SOR0>,
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<&tegra_car TEGRA210_CLK_SOR0_OUT>,
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<&tegra_car TEGRA210_CLK_PLL_D_OUT0>,
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<&tegra_car TEGRA210_CLK_PLL_DP>,
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<&tegra_car TEGRA210_CLK_SOR_SAFE>;
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clock-names = "sor", "out", "parent", "dp", "safe";
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resets = <&tegra_car 182>;
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reset-names = "sor";
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pinctrl-0 = <&state_dpaux_aux>;
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pinctrl-1 = <&state_dpaux_i2c>;
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pinctrl-2 = <&state_dpaux_off>;
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pinctrl-names = "aux", "i2c", "off";
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power-domains = <&pd_sor>;
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avdd-io-hdmi-dp-supply = <&avdd_1v05>;
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vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
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hdmi-supply = <&vdd_hdmi>;
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nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) GPIO_ACTIVE_LOW>;
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};
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