66 lines
1.8 KiB
C
66 lines
1.8 KiB
C
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef INTEL_GT_IRQ_H
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#define INTEL_GT_IRQ_H
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#include <linux/types.h>
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#include "intel_engine_types.h"
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struct intel_gt;
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#define GEN8_GT_IRQS (GEN8_GT_RCS_IRQ | \
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GEN8_GT_BCS_IRQ | \
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GEN8_GT_VCS0_IRQ | \
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GEN8_GT_VCS1_IRQ | \
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GEN8_GT_VECS_IRQ | \
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GEN8_GT_PM_IRQ | \
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GEN8_GT_GUC_IRQ)
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void gen11_gt_irq_reset(struct intel_gt *gt);
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void gen11_gt_irq_postinstall(struct intel_gt *gt);
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void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl);
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bool gen11_gt_reset_one_iir(struct intel_gt *gt,
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const unsigned int bank,
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const unsigned int bit);
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void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
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void gen5_gt_irq_postinstall(struct intel_gt *gt);
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void gen5_gt_irq_reset(struct intel_gt *gt);
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void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask);
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void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask);
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void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
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void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl);
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void gen8_gt_irq_reset(struct intel_gt *gt);
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void gen8_gt_irq_postinstall(struct intel_gt *gt);
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static inline void intel_engine_cs_irq(struct intel_engine_cs *engine, u16 iir)
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{
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if (iir)
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engine->irq_handler(engine, iir);
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}
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static inline void
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intel_engine_set_irq_handler(struct intel_engine_cs *engine,
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void (*fn)(struct intel_engine_cs *engine,
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u16 iir))
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{
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/*
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* As the interrupt is live as allocate and setup the engines,
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* err on the side of caution and apply barriers to updating
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* the irq handler callback. This assures that when we do use
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* the engine, we will receive interrupts only to ourselves,
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* and not lose any.
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*/
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smp_store_mb(engine->irq_handler, fn);
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}
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#endif /* INTEL_GT_IRQ_H */
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