724 lines
25 KiB
C++
724 lines
25 KiB
C++
//===--- RISCV.cpp - RISCV Helpers for Tools --------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "RISCV.h"
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#include "clang/Basic/CharInfo.h"
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#include "clang/Driver/Driver.h"
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#include "clang/Driver/DriverDiagnostic.h"
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#include "clang/Driver/Options.h"
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#include "llvm/Option/ArgList.h"
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#include "llvm/ADT/Optional.h"
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#include "llvm/Support/TargetParser.h"
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#include "llvm/Support/raw_ostream.h"
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#include "ToolChains/CommonArgs.h"
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using namespace clang::driver;
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using namespace clang::driver::tools;
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using namespace clang;
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using namespace llvm::opt;
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namespace {
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// Represents the major and version number components of a RISC-V extension
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struct RISCVExtensionVersion {
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StringRef Major;
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StringRef Minor;
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};
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} // end anonymous namespace
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static StringRef getExtensionTypeDesc(StringRef Ext) {
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if (Ext.startswith("sx"))
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return "non-standard supervisor-level extension";
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if (Ext.startswith("s"))
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return "standard supervisor-level extension";
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if (Ext.startswith("x"))
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return "non-standard user-level extension";
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if (Ext.startswith("z"))
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return "standard user-level extension";
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return StringRef();
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}
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static StringRef getExtensionType(StringRef Ext) {
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if (Ext.startswith("sx"))
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return "sx";
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if (Ext.startswith("s"))
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return "s";
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if (Ext.startswith("x"))
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return "x";
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if (Ext.startswith("z"))
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return "z";
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return StringRef();
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}
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// If the extension is supported as experimental, return the version of that
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// extension that the compiler currently supports.
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static Optional<RISCVExtensionVersion>
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isExperimentalExtension(StringRef Ext) {
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if (Ext == "b" || Ext == "zba" || Ext == "zbb" || Ext == "zbc" ||
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Ext == "zbe" || Ext == "zbf" || Ext == "zbm" || Ext == "zbp" ||
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Ext == "zbr" || Ext == "zbs" || Ext == "zbt" || Ext == "zbproposedc")
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return RISCVExtensionVersion{"0", "93"};
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if (Ext == "v" || Ext == "zvamo" || Ext == "zvlsseg")
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return RISCVExtensionVersion{"0", "10"};
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if (Ext == "zfh")
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return RISCVExtensionVersion{"0", "1"};
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return None;
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}
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static bool isSupportedExtension(StringRef Ext) {
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// LLVM supports "z" extensions which are marked as experimental.
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if (isExperimentalExtension(Ext))
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return true;
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// LLVM does not support "sx", "s" nor "x" extensions.
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return false;
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}
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// Extensions may have a version number, and may be separated by
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// an underscore '_' e.g.: rv32i2_m2.
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// Version number is divided into major and minor version numbers,
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// separated by a 'p'. If the minor version is 0 then 'p0' can be
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// omitted from the version string. E.g., rv32i2p0, rv32i2, rv32i2p1.
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static bool getExtensionVersion(const Driver &D, const ArgList &Args,
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StringRef MArch, StringRef Ext, StringRef In,
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std::string &Major, std::string &Minor) {
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Major = std::string(In.take_while(isDigit));
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In = In.substr(Major.size());
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if (Major.size() && In.consume_front("p")) {
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Minor = std::string(In.take_while(isDigit));
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In = In.substr(Major.size() + 1);
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// Expected 'p' to be followed by minor version number.
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if (Minor.empty()) {
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std::string Error =
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"minor version number missing after 'p' for extension";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << Ext;
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return false;
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}
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}
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// Expected multi-character extension with version number to have no
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// subsequent characters (i.e. must either end string or be followed by
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// an underscore).
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if (Ext.size() > 1 && In.size()) {
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std::string Error =
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"multi-character extensions must be separated by underscores";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name) << MArch << Error << In;
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return false;
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}
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// If experimental extension, require use of current version number number
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if (auto ExperimentalExtension = isExperimentalExtension(Ext)) {
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if (!Args.hasArg(options::OPT_menable_experimental_extensions)) {
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std::string Error =
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"requires '-menable-experimental-extensions' for experimental extension";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << Ext;
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return false;
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} else if (Major.empty() && Minor.empty()) {
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std::string Error =
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"experimental extension requires explicit version number";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << Ext;
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return false;
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}
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auto SupportedVers = *ExperimentalExtension;
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if (Major != SupportedVers.Major || Minor != SupportedVers.Minor) {
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std::string Error =
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"unsupported version number " + Major;
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if (!Minor.empty())
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Error += "." + Minor;
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Error += " for experimental extension (this compiler supports "
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+ SupportedVers.Major.str() + "."
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+ SupportedVers.Minor.str() + ")";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << Ext;
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return false;
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}
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return true;
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}
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// Allow extensions to declare no version number
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if (Major.empty() && Minor.empty())
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return true;
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// TODO: Handle supported extensions with version number.
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std::string Error = "unsupported version number " + Major;
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if (!Minor.empty())
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Error += "." + Minor;
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Error += " for extension";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name) << MArch << Error << Ext;
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return false;
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}
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// Handle other types of extensions other than the standard
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// general purpose and standard user-level extensions.
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// Parse the ISA string containing non-standard user-level
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// extensions, standard supervisor-level extensions and
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// non-standard supervisor-level extensions.
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// These extensions start with 'z', 'x', 's', 'sx' prefixes, follow a
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// canonical order, might have a version number (major, minor)
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// and are separated by a single underscore '_'.
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// Set the hardware features for the extensions that are supported.
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static void getExtensionFeatures(const Driver &D,
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const ArgList &Args,
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std::vector<StringRef> &Features,
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StringRef &MArch, StringRef &Exts) {
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if (Exts.empty())
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return;
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// Multi-letter extensions are seperated by a single underscore
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// as described in RISC-V User-Level ISA V2.2.
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SmallVector<StringRef, 8> Split;
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Exts.split(Split, StringRef("_"));
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SmallVector<StringRef, 4> Prefix{"z", "x", "s", "sx"};
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auto I = Prefix.begin();
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auto E = Prefix.end();
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SmallVector<StringRef, 8> AllExts;
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for (StringRef Ext : Split) {
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if (Ext.empty()) {
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D.Diag(diag::err_drv_invalid_riscv_arch_name) << MArch
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<< "extension name missing after separator '_'";
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return;
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}
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StringRef Type = getExtensionType(Ext);
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StringRef Desc = getExtensionTypeDesc(Ext);
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auto Pos = Ext.find_if(isDigit);
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StringRef Name(Ext.substr(0, Pos));
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StringRef Vers(Ext.substr(Pos));
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if (Type.empty()) {
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << "invalid extension prefix" << Ext;
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return;
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}
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// Check ISA extensions are specified in the canonical order.
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while (I != E && *I != Type)
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++I;
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if (I == E) {
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std::string Error = std::string(Desc);
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Error += " not given in canonical order";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << Ext;
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return;
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}
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// The order is OK, do not advance I to the next prefix
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// to allow repeated extension type, e.g.: rv32ixabc_xdef.
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if (Name.size() == Type.size()) {
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std::string Error = std::string(Desc);
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Error += " name missing after";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << Type;
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return;
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}
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std::string Major, Minor;
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if (!getExtensionVersion(D, Args, MArch, Name, Vers, Major, Minor))
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return;
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// Check if duplicated extension.
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if (llvm::is_contained(AllExts, Name)) {
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std::string Error = "duplicated ";
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Error += Desc;
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << Name;
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return;
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}
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// Extension format is correct, keep parsing the extensions.
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// TODO: Save Type, Name, Major, Minor to avoid parsing them later.
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AllExts.push_back(Name);
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}
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// Set target features.
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// TODO: Hardware features to be handled in Support/TargetParser.cpp.
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// TODO: Use version number when setting target features.
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for (auto Ext : AllExts) {
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if (!isSupportedExtension(Ext)) {
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StringRef Desc = getExtensionTypeDesc(getExtensionType(Ext));
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std::string Error = "unsupported ";
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Error += Desc;
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << Ext;
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return;
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}
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if (Ext == "zvamo" || Ext == "zvlsseg") {
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Features.push_back("+experimental-v");
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Features.push_back("+experimental-zvamo");
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Features.push_back("+experimental-zvlsseg");
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} else if (isExperimentalExtension(Ext))
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Features.push_back(Args.MakeArgString("+experimental-" + Ext));
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else
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Features.push_back(Args.MakeArgString("+" + Ext));
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}
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}
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// Returns false if an error is diagnosed.
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static bool getArchFeatures(const Driver &D, StringRef MArch,
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std::vector<StringRef> &Features,
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const ArgList &Args) {
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// RISC-V ISA strings must be lowercase.
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if (llvm::any_of(MArch, [](char c) { return isupper(c); })) {
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D.Diag(diag::err_drv_invalid_riscv_arch_name)
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<< MArch << "string must be lowercase";
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return false;
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}
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// ISA string must begin with rv32 or rv64.
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if (!(MArch.startswith("rv32") || MArch.startswith("rv64")) ||
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(MArch.size() < 5)) {
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D.Diag(diag::err_drv_invalid_riscv_arch_name)
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<< MArch << "string must begin with rv32{i,e,g} or rv64{i,g}";
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return false;
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}
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bool HasRV64 = MArch.startswith("rv64");
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// The canonical order specified in ISA manual.
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// Ref: Table 22.1 in RISC-V User-Level ISA V2.2
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StringRef StdExts = "mafdqlcbjtpvn";
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bool HasF = false, HasD = false;
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char Baseline = MArch[4];
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// First letter should be 'e', 'i' or 'g'.
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switch (Baseline) {
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default:
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D.Diag(diag::err_drv_invalid_riscv_arch_name)
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<< MArch << "first letter should be 'e', 'i' or 'g'";
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return false;
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case 'e': {
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StringRef Error;
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// Currently LLVM does not support 'e'.
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// Extension 'e' is not allowed in rv64.
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if (HasRV64)
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Error = "standard user-level extension 'e' requires 'rv32'";
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else
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Error = "unsupported standard user-level extension 'e'";
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D.Diag(diag::err_drv_invalid_riscv_arch_name) << MArch << Error;
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return false;
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}
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case 'i':
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break;
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case 'g':
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// g = imafd
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StdExts = StdExts.drop_front(4);
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Features.push_back("+m");
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Features.push_back("+a");
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Features.push_back("+f");
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Features.push_back("+d");
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HasF = true;
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HasD = true;
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break;
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}
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// Skip rvxxx
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StringRef Exts = MArch.substr(5);
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// Remove multi-letter standard extensions, non-standard extensions and
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// supervisor-level extensions. They have 'z', 'x', 's', 'sx' prefixes.
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// Parse them at the end.
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// Find the very first occurrence of 's', 'x' or 'z'.
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StringRef OtherExts;
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size_t Pos = Exts.find_first_of("zsx");
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if (Pos != StringRef::npos) {
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OtherExts = Exts.substr(Pos);
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Exts = Exts.substr(0, Pos);
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}
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std::string Major, Minor;
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if (!getExtensionVersion(D, Args, MArch, std::string(1, Baseline), Exts,
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Major, Minor))
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return false;
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// Consume the base ISA version number and any '_' between rvxxx and the
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// first extension
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Exts = Exts.drop_front(Major.size());
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if (!Minor.empty())
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Exts = Exts.drop_front(Minor.size() + 1 /*'p'*/);
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Exts.consume_front("_");
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// TODO: Use version number when setting target features
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auto StdExtsItr = StdExts.begin();
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auto StdExtsEnd = StdExts.end();
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for (auto I = Exts.begin(), E = Exts.end(); I != E; ) {
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char c = *I;
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// Check ISA extensions are specified in the canonical order.
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while (StdExtsItr != StdExtsEnd && *StdExtsItr != c)
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++StdExtsItr;
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if (StdExtsItr == StdExtsEnd) {
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// Either c contains a valid extension but it was not given in
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// canonical order or it is an invalid extension.
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StringRef Error;
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if (StdExts.contains(c))
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Error = "standard user-level extension not given in canonical order";
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else
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Error = "invalid standard user-level extension";
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << Error << std::string(1, c);
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return false;
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}
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// Move to next char to prevent repeated letter.
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++StdExtsItr;
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std::string Next, Major, Minor;
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if (std::next(I) != E)
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Next = std::string(std::next(I), E);
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if (!getExtensionVersion(D, Args, MArch, std::string(1, c), Next, Major,
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Minor))
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return false;
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// The order is OK, then push it into features.
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// TODO: Use version number when setting target features
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switch (c) {
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default:
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// Currently LLVM supports only "mafdc".
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D.Diag(diag::err_drv_invalid_riscv_ext_arch_name)
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<< MArch << "unsupported standard user-level extension"
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<< std::string(1, c);
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return false;
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case 'm':
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Features.push_back("+m");
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break;
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case 'a':
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Features.push_back("+a");
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break;
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case 'f':
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Features.push_back("+f");
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HasF = true;
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break;
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case 'd':
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Features.push_back("+d");
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HasD = true;
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break;
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case 'c':
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Features.push_back("+c");
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break;
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case 'b':
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Features.push_back("+experimental-b");
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Features.push_back("+experimental-zba");
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Features.push_back("+experimental-zbb");
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Features.push_back("+experimental-zbc");
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Features.push_back("+experimental-zbe");
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Features.push_back("+experimental-zbf");
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Features.push_back("+experimental-zbm");
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Features.push_back("+experimental-zbp");
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Features.push_back("+experimental-zbr");
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Features.push_back("+experimental-zbs");
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Features.push_back("+experimental-zbt");
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break;
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case 'v':
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Features.push_back("+experimental-v");
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Features.push_back("+experimental-zvamo");
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Features.push_back("+experimental-zvlsseg");
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break;
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}
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// Consume full extension name and version, including any optional '_'
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// between this extension and the next
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++I;
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I += Major.size();
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if (Minor.size())
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I += Minor.size() + 1 /*'p'*/;
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if (*I == '_')
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++I;
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}
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// Dependency check.
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// It's illegal to specify the 'd' (double-precision floating point)
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// extension without also specifying the 'f' (single precision
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// floating-point) extension.
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if (HasD && !HasF) {
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D.Diag(diag::err_drv_invalid_riscv_arch_name)
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<< MArch << "d requires f extension to also be specified";
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return false;
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}
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// Additional dependency checks.
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// TODO: The 'q' extension requires rv64.
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// TODO: It is illegal to specify 'e' extensions with 'f' and 'd'.
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// Handle all other types of extensions.
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getExtensionFeatures(D, Args, Features, MArch, OtherExts);
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return true;
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}
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// Get features except standard extension feature
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static void getRISCFeaturesFromMcpu(const Driver &D, const llvm::Triple &Triple,
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const llvm::opt::ArgList &Args,
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const llvm::opt::Arg *A, StringRef Mcpu,
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std::vector<StringRef> &Features) {
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bool Is64Bit = (Triple.getArch() == llvm::Triple::riscv64);
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llvm::RISCV::CPUKind CPUKind = llvm::RISCV::parseCPUKind(Mcpu);
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if (!llvm::RISCV::checkCPUKind(CPUKind, Is64Bit) ||
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!llvm::RISCV::getCPUFeaturesExceptStdExt(CPUKind, Features)) {
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D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
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}
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}
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void riscv::getRISCVTargetFeatures(const Driver &D, const llvm::Triple &Triple,
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const ArgList &Args,
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std::vector<StringRef> &Features) {
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StringRef MArch = getRISCVArch(Args, Triple);
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if (!getArchFeatures(D, MArch, Features, Args))
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return;
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|
|
// If users give march and mcpu, get std extension feature from MArch
|
|
// and other features (ex. mirco architecture feature) from mcpu
|
|
if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ))
|
|
getRISCFeaturesFromMcpu(D, Triple, Args, A, A->getValue(), Features);
|
|
|
|
// Handle features corresponding to "-ffixed-X" options
|
|
if (Args.hasArg(options::OPT_ffixed_x1))
|
|
Features.push_back("+reserve-x1");
|
|
if (Args.hasArg(options::OPT_ffixed_x2))
|
|
Features.push_back("+reserve-x2");
|
|
if (Args.hasArg(options::OPT_ffixed_x3))
|
|
Features.push_back("+reserve-x3");
|
|
if (Args.hasArg(options::OPT_ffixed_x4))
|
|
Features.push_back("+reserve-x4");
|
|
if (Args.hasArg(options::OPT_ffixed_x5))
|
|
Features.push_back("+reserve-x5");
|
|
if (Args.hasArg(options::OPT_ffixed_x6))
|
|
Features.push_back("+reserve-x6");
|
|
if (Args.hasArg(options::OPT_ffixed_x7))
|
|
Features.push_back("+reserve-x7");
|
|
if (Args.hasArg(options::OPT_ffixed_x8))
|
|
Features.push_back("+reserve-x8");
|
|
if (Args.hasArg(options::OPT_ffixed_x9))
|
|
Features.push_back("+reserve-x9");
|
|
if (Args.hasArg(options::OPT_ffixed_x10))
|
|
Features.push_back("+reserve-x10");
|
|
if (Args.hasArg(options::OPT_ffixed_x11))
|
|
Features.push_back("+reserve-x11");
|
|
if (Args.hasArg(options::OPT_ffixed_x12))
|
|
Features.push_back("+reserve-x12");
|
|
if (Args.hasArg(options::OPT_ffixed_x13))
|
|
Features.push_back("+reserve-x13");
|
|
if (Args.hasArg(options::OPT_ffixed_x14))
|
|
Features.push_back("+reserve-x14");
|
|
if (Args.hasArg(options::OPT_ffixed_x15))
|
|
Features.push_back("+reserve-x15");
|
|
if (Args.hasArg(options::OPT_ffixed_x16))
|
|
Features.push_back("+reserve-x16");
|
|
if (Args.hasArg(options::OPT_ffixed_x17))
|
|
Features.push_back("+reserve-x17");
|
|
if (Args.hasArg(options::OPT_ffixed_x18))
|
|
Features.push_back("+reserve-x18");
|
|
if (Args.hasArg(options::OPT_ffixed_x19))
|
|
Features.push_back("+reserve-x19");
|
|
if (Args.hasArg(options::OPT_ffixed_x20))
|
|
Features.push_back("+reserve-x20");
|
|
if (Args.hasArg(options::OPT_ffixed_x21))
|
|
Features.push_back("+reserve-x21");
|
|
if (Args.hasArg(options::OPT_ffixed_x22))
|
|
Features.push_back("+reserve-x22");
|
|
if (Args.hasArg(options::OPT_ffixed_x23))
|
|
Features.push_back("+reserve-x23");
|
|
if (Args.hasArg(options::OPT_ffixed_x24))
|
|
Features.push_back("+reserve-x24");
|
|
if (Args.hasArg(options::OPT_ffixed_x25))
|
|
Features.push_back("+reserve-x25");
|
|
if (Args.hasArg(options::OPT_ffixed_x26))
|
|
Features.push_back("+reserve-x26");
|
|
if (Args.hasArg(options::OPT_ffixed_x27))
|
|
Features.push_back("+reserve-x27");
|
|
if (Args.hasArg(options::OPT_ffixed_x28))
|
|
Features.push_back("+reserve-x28");
|
|
if (Args.hasArg(options::OPT_ffixed_x29))
|
|
Features.push_back("+reserve-x29");
|
|
if (Args.hasArg(options::OPT_ffixed_x30))
|
|
Features.push_back("+reserve-x30");
|
|
if (Args.hasArg(options::OPT_ffixed_x31))
|
|
Features.push_back("+reserve-x31");
|
|
|
|
// -mrelax is default, unless -mno-relax is specified.
|
|
if (Args.hasFlag(options::OPT_mrelax, options::OPT_mno_relax, true))
|
|
Features.push_back("+relax");
|
|
else
|
|
Features.push_back("-relax");
|
|
|
|
// GCC Compatibility: -mno-save-restore is default, unless -msave-restore is
|
|
// specified.
|
|
if (Args.hasFlag(options::OPT_msave_restore, options::OPT_mno_save_restore, false))
|
|
Features.push_back("+save-restore");
|
|
else
|
|
Features.push_back("-save-restore");
|
|
|
|
// Now add any that the user explicitly requested on the command line,
|
|
// which may override the defaults.
|
|
handleTargetFeaturesGroup(Args, Features, options::OPT_m_riscv_Features_Group);
|
|
}
|
|
|
|
StringRef riscv::getRISCVABI(const ArgList &Args, const llvm::Triple &Triple) {
|
|
assert((Triple.getArch() == llvm::Triple::riscv32 ||
|
|
Triple.getArch() == llvm::Triple::riscv64) &&
|
|
"Unexpected triple");
|
|
|
|
// GCC's logic around choosing a default `-mabi=` is complex. If GCC is not
|
|
// configured using `--with-abi=`, then the logic for the default choice is
|
|
// defined in config.gcc. This function is based on the logic in GCC 9.2.0.
|
|
//
|
|
// The logic used in GCC 9.2.0 is the following, in order:
|
|
// 1. Explicit choices using `--with-abi=`
|
|
// 2. A default based on `--with-arch=`, if provided
|
|
// 3. A default based on the target triple's arch
|
|
//
|
|
// The logic in config.gcc is a little circular but it is not inconsistent.
|
|
//
|
|
// Clang does not have `--with-arch=` or `--with-abi=`, so we use `-march=`
|
|
// and `-mabi=` respectively instead.
|
|
//
|
|
// In order to make chosing logic more clear, Clang uses the following logic,
|
|
// in order:
|
|
// 1. Explicit choices using `-mabi=`
|
|
// 2. A default based on the architecture as determined by getRISCVArch
|
|
// 3. Choose a default based on the triple
|
|
|
|
// 1. If `-mabi=` is specified, use it.
|
|
if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ))
|
|
return A->getValue();
|
|
|
|
// 2. Choose a default based on the target architecture.
|
|
//
|
|
// rv32g | rv32*d -> ilp32d
|
|
// rv32e -> ilp32e
|
|
// rv32* -> ilp32
|
|
// rv64g | rv64*d -> lp64d
|
|
// rv64* -> lp64
|
|
StringRef MArch = getRISCVArch(Args, Triple);
|
|
|
|
if (MArch.startswith_lower("rv32")) {
|
|
// FIXME: parse `March` to find `D` extension properly
|
|
if (MArch.substr(4).contains_lower("d") || MArch.startswith_lower("rv32g"))
|
|
return "ilp32d";
|
|
else if (MArch.startswith_lower("rv32e"))
|
|
return "ilp32e";
|
|
else
|
|
return "ilp32";
|
|
} else if (MArch.startswith_lower("rv64")) {
|
|
// FIXME: parse `March` to find `D` extension properly
|
|
if (MArch.substr(4).contains_lower("d") || MArch.startswith_lower("rv64g"))
|
|
return "lp64d";
|
|
else
|
|
return "lp64";
|
|
}
|
|
|
|
// 3. Choose a default based on the triple
|
|
//
|
|
// We deviate from GCC's defaults here:
|
|
// - On `riscv{XLEN}-unknown-elf` we use the integer calling convention only.
|
|
// - On all other OSs we use the double floating point calling convention.
|
|
if (Triple.getArch() == llvm::Triple::riscv32) {
|
|
if (Triple.getOS() == llvm::Triple::UnknownOS)
|
|
return "ilp32";
|
|
else
|
|
return "ilp32d";
|
|
} else {
|
|
if (Triple.getOS() == llvm::Triple::UnknownOS)
|
|
return "lp64";
|
|
else
|
|
return "lp64d";
|
|
}
|
|
}
|
|
|
|
StringRef riscv::getRISCVArch(const llvm::opt::ArgList &Args,
|
|
const llvm::Triple &Triple) {
|
|
assert((Triple.getArch() == llvm::Triple::riscv32 ||
|
|
Triple.getArch() == llvm::Triple::riscv64) &&
|
|
"Unexpected triple");
|
|
|
|
// GCC's logic around choosing a default `-march=` is complex. If GCC is not
|
|
// configured using `--with-arch=`, then the logic for the default choice is
|
|
// defined in config.gcc. This function is based on the logic in GCC 9.2.0. We
|
|
// deviate from GCC's default on additional `-mcpu` option (GCC does not
|
|
// support `-mcpu`) and baremetal targets (UnknownOS) where neither `-march`
|
|
// nor `-mabi` is specified.
|
|
//
|
|
// The logic used in GCC 9.2.0 is the following, in order:
|
|
// 1. Explicit choices using `--with-arch=`
|
|
// 2. A default based on `--with-abi=`, if provided
|
|
// 3. A default based on the target triple's arch
|
|
//
|
|
// The logic in config.gcc is a little circular but it is not inconsistent.
|
|
//
|
|
// Clang does not have `--with-arch=` or `--with-abi=`, so we use `-march=`
|
|
// and `-mabi=` respectively instead.
|
|
//
|
|
// Clang uses the following logic, in order:
|
|
// 1. Explicit choices using `-march=`
|
|
// 2. Based on `-mcpu` if the target CPU has a default ISA string
|
|
// 3. A default based on `-mabi`, if provided
|
|
// 4. A default based on the target triple's arch
|
|
//
|
|
// Clang does not yet support MULTILIB_REUSE, so we use `rv{XLEN}imafdc`
|
|
// instead of `rv{XLEN}gc` though they are (currently) equivalent.
|
|
|
|
// 1. If `-march=` is specified, use it.
|
|
if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
|
|
return A->getValue();
|
|
|
|
// 2. Get march (isa string) based on `-mcpu=`
|
|
if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
|
|
StringRef MArch = llvm::RISCV::getMArchFromMcpu(A->getValue());
|
|
// Bypass if target cpu's default march is empty.
|
|
if (MArch != "")
|
|
return MArch;
|
|
}
|
|
|
|
// 3. Choose a default based on `-mabi=`
|
|
//
|
|
// ilp32e -> rv32e
|
|
// ilp32 | ilp32f | ilp32d -> rv32imafdc
|
|
// lp64 | lp64f | lp64d -> rv64imafdc
|
|
if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) {
|
|
StringRef MABI = A->getValue();
|
|
|
|
if (MABI.equals_lower("ilp32e"))
|
|
return "rv32e";
|
|
else if (MABI.startswith_lower("ilp32"))
|
|
return "rv32imafdc";
|
|
else if (MABI.startswith_lower("lp64"))
|
|
return "rv64imafdc";
|
|
}
|
|
|
|
// 4. Choose a default based on the triple
|
|
//
|
|
// We deviate from GCC's defaults here:
|
|
// - On `riscv{XLEN}-unknown-elf` we default to `rv{XLEN}imac`
|
|
// - On all other OSs we use `rv{XLEN}imafdc` (equivalent to `rv{XLEN}gc`)
|
|
if (Triple.getArch() == llvm::Triple::riscv32) {
|
|
if (Triple.getOS() == llvm::Triple::UnknownOS)
|
|
return "rv32imac";
|
|
else
|
|
return "rv32imafdc";
|
|
} else {
|
|
if (Triple.getOS() == llvm::Triple::UnknownOS)
|
|
return "rv64imac";
|
|
else
|
|
return "rv64imafdc";
|
|
}
|
|
}
|