127 lines
4.3 KiB
LLVM
127 lines
4.3 KiB
LLVM
; Test that loops with sufficient registers do not reload or spill on
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; stack. These cases include calls and it is necessary to have the GR128 /
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; FP128 registers part of the callee saved registers list in order to avoid
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; spilling / reloading.
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;
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; RUN: llc -switch-peel-threshold=101 < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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%0 = type { %0*, %0*, %0*, i32, %1*, i64, i64, i64, i64, i64, i64, %2, %5, %7 }
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%1 = type { i32, i32, i32 (%1*, i64, i32)*, i32 (%1*, i64, i64, i32, i8**)*, i32 (%1*, i64, i64, i64, i32)*, i32 (%1*)*, void (i8*)*, i8*, i8* }
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%2 = type { i64, i64, %3** }
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%3 = type { %4*, i64 }
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%4 = type { i64, i8* }
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%5 = type { i64, i64, %6** }
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%6 = type { i64, %4*, i32, i64, i8* }
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%7 = type { i64, i64, %8** }
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%8 = type { i64, i64*, i64*, %4*, i64, i32*, %5, i32, i64, i64 }
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
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define void @fun0(%0*) {
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; CHECK-LABEL: .LBB0_4
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; CHECK: => This Inner Loop Header: Depth=2
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; CHECK-NOT: 16-byte Folded Spill
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; CHECK-NOT: 16-byte Folded Reload
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%2 = load i64, i64* undef, align 8
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%3 = udiv i64 128, %2
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%4 = mul i64 %3, %2
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%5 = load i64, i64* undef, align 8
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switch i32 undef, label %36 [
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i32 1, label %6
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i32 2, label %7
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i32 3, label %8
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i32 4, label %9
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i32 5, label %10
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i32 6, label %11
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]
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; <label>:6: ; preds = %1
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br label %12
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; <label>:7: ; preds = %1
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br label %12
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; <label>:8: ; preds = %1
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unreachable
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; <label>:9: ; preds = %1
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unreachable
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; <label>:10: ; preds = %1
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unreachable
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; <label>:11: ; preds = %1
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unreachable
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; <label>:12: ; preds = %7, %6
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%13 = getelementptr inbounds %0, %0* %0, i64 0, i32 5
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br label %14
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; <label>:14: ; preds = %31, %12
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%15 = phi i64 [ undef, %31 ], [ %5, %12 ]
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%16 = phi i64 [ %35, %31 ], [ undef, %12 ]
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%17 = load i64, i64* %13, align 8
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%18 = icmp ult i64 %15, %17
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%19 = select i1 %18, i64 %15, i64 %17
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%20 = udiv i64 %19, %4
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%21 = icmp ugt i64 %20, 1
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%22 = select i1 %21, i64 %20, i64 1
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%23 = sub i64 %22, 0
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br label %24
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; <label>:24: ; preds = %24, %14
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%25 = phi i64 [ %23, %14 ], [ %27, %24 ]
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* nonnull undef, i64 %4, i1 false)
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%26 = getelementptr inbounds i8, i8* null, i64 %4
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store i8* %26, i8** undef, align 8
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%27 = add i64 %25, -4
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%28 = icmp eq i64 %27, 0
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br i1 %28, label %31, label %24
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; <label>:29: ; preds = %24
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br i1 undef, label %31, label %30
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; <label>:30: ; preds = %29
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call void @llvm.memcpy.p0i8.p0i8.i64(i8* %26, i8* nonnull undef, i64 %4, i1 false)
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br label %31
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; <label>:31: ; preds = %30, %29
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%32 = call signext i32 undef(%1* undef, i64 %16, i32 signext 8)
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%33 = icmp eq i64 undef, 0
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%34 = select i1 %33, i64 0, i64 %19
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%35 = add i64 %34, %16
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br i1 %33, label %36, label %14
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; <label>:36: ; preds = %31, %1
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ret void
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}
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declare fp128 @llvm.pow.f128(fp128, fp128)
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define void @fun1(fp128*) {
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; CHECK-LABEL: .LBB1_2
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; CHECK: =>This Inner Loop Header: Depth=1
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; CHECK-NOT: 16-byte Folded Spill
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; CHECK-NOT: 16-byte Folded Reload
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; CHECK-LABEL: .LBB1_3
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br i1 undef, label %7, label %2
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; <label>:2: ; preds = %2, %1
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%3 = phi fp128 [ %5, %2 ], [ 0xL00000000000000000000000000000000, %1 ]
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%4 = tail call fp128 @llvm.pow.f128(fp128 0xL00000000000000000000000000000000, fp128 0xL00000000000000000000000000000000) #2
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%5 = fadd fp128 %3, %4
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%6 = icmp eq i64 undef, 0
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br i1 %6, label %7, label %2
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; <label>:7: ; preds = %2, %1
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%8 = phi fp128 [ 0xL00000000000000000000000000000000, %1 ], [ %5, %2 ]
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%9 = fadd fp128 0xL00000000000000000000000000000000, %8
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%10 = fadd fp128 0xL00000000000000000000000000000000, %9
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%11 = fadd fp128 0xL00000000000000000000000000000000, %10
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%12 = tail call fp128 @llvm.pow.f128(fp128 %11, fp128 0xL00000000000000000000000000000000) #2
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store fp128 %12, fp128* %0, align 8
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ret void
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}
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