# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s

--- |
  ; Function Attrs: nounwind
  define hidden arm_aapcs_vfpcc void @cond_trip_count(float* %0, i32 %1, float* nocapture %2) local_unnamed_addr #1 {
    ret void
  }

...
---
name:            cond_trip_count
alignment:       4
tracksRegLiveness: true
registers:       []
liveins:
  - { reg: '$r0', virtual-reg: '' }
  - { reg: '$r1', virtual-reg: '' }
  - { reg: '$r2', virtual-reg: '' }
frameInfo:
  stackSize:       8
  offsetAdjustment: 0
  maxAlignment:    4
fixedStack:      []
stack:
  - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
      stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
callSites:       []
constants:
  - id:              0
    value:           'float 0.000000e+00'
    alignment:       4
    isTargetSpecific: false
machineFunctionInfo: {}
body:             |
  ; CHECK-LABEL: name: cond_trip_count
  ; CHECK: bb.0:
  ; CHECK:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK:   liveins: $lr, $r0, $r1, $r2, $r4
  ; CHECK:   frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
  ; CHECK:   frame-setup CFI_INSTRUCTION offset $lr, -4
  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r4, -8
  ; CHECK:   tCMPi8 renamable $r1, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK:   renamable $r12 = t2MOVi 4, 14 /* CC::al */, $noreg, $noreg
  ; CHECK:   tBcc %bb.2, 2 /* CC::hs */, killed $cpsr
  ; CHECK: bb.1:
  ; CHECK:   liveins: $r2
  ; CHECK:   renamable $s0 = VLDRS %const.0, 0, 14 /* CC::al */, $noreg
  ; CHECK:   VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg
  ; CHECK:   tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
  ; CHECK: bb.2:
  ; CHECK:   successors: %bb.3(0x80000000)
  ; CHECK:   liveins: $r0, $r1, $r2, $r12
  ; CHECK:   renamable $r4, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
  ; CHECK:   tCMPi8 renamable $r1, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr
  ; CHECK:   t2IT 11, 8, implicit-def $itstate
  ; CHECK:   $r12 = tMOVr renamable $r1, 11 /* CC::lt */, killed $cpsr, implicit killed renamable $r12, implicit killed $itstate
  ; CHECK:   renamable $r3 = t2SUBrr renamable $r1, killed renamable $r12, 14 /* CC::al */, $noreg, $noreg
  ; CHECK:   renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14 /* CC::al */, $noreg
  ; CHECK:   $r12 = tMOVr $r1, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $r4 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg
  ; CHECK:   renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, undef renamable $q0
  ; CHECK:   $r3 = tMOVr $r0, 14 /* CC::al */, $noreg
  ; CHECK:   $lr = MVE_DLSTP_32 killed renamable $r12
  ; CHECK: bb.3:
  ; CHECK:   successors: %bb.3(0x7c000000), %bb.4(0x04000000)
  ; CHECK:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4
  ; CHECK:   renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r3, 0, 0, $noreg
  ; CHECK:   renamable $q0 = nnan ninf nsz MVE_VADDf32 killed renamable $q0, killed renamable $q1, 0, killed $noreg, killed renamable $q0
  ; CHECK:   renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg
  ; CHECK:   $lr = MVE_LETP killed renamable $lr, %bb.3
  ; CHECK: bb.4:
  ; CHECK:   successors: %bb.5(0x80000000)
  ; CHECK:   liveins: $q0, $r0, $r1, $r2, $r4
  ; CHECK:   renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14 /* CC::al */, $noreg
  ; CHECK:   dead $lr = tMOVr $r4, 14 /* CC::al */, $noreg
  ; CHECK:   $r3 = tMOVr $r1, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14 /* CC::al */, $noreg, implicit killed $q0
  ; CHECK:   $s2 = VMOVSR $r1, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $s2 = VUITOS killed renamable $s2, 14 /* CC::al */, $noreg
  ; CHECK:   $lr = t2DLS killed $r4
  ; CHECK:   renamable $s4 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, undef renamable $q0
  ; CHECK: bb.5:
  ; CHECK:   successors: %bb.5(0x7c000000), %bb.6(0x04000000)
  ; CHECK:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $s4
  ; CHECK:   renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg
  ; CHECK:   $r4 = VMOVRS $s4, 14 /* CC::al */, $noreg
  ; CHECK:   MVE_VPST 2, implicit $vpr
  ; CHECK:   renamable $q2 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr
  ; CHECK:   renamable $q2 = nnan ninf nsz MVE_VSUB_qr_f32 killed renamable $q2, killed renamable $r4, 1, renamable $vpr, undef renamable $q2
  ; CHECK:   renamable $q0 = nnan ninf nsz MVE_VFMAf32 killed renamable $q0, killed renamable $q2, killed renamable $q2, 1, killed renamable $vpr
  ; CHECK:   renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg
  ; CHECK:   $lr = t2LEUpdate killed renamable $lr, %bb.5
  ; CHECK: bb.6:
  ; CHECK:   liveins: $q0, $r1, $r2
  ; CHECK:   renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 1, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14 /* CC::al */, $noreg, implicit killed $q0
  ; CHECK:   $s2 = VMOVSR killed $r0, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $s2 = VUITOS killed renamable $s2, 14 /* CC::al */, $noreg
  ; CHECK:   renamable $s0 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14 /* CC::al */, $noreg
  ; CHECK:   VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg
  ; CHECK:   tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
  ; CHECK: bb.7 (align 4):
  ; CHECK:   CONSTPOOL_ENTRY 0, %const.0, 4
  bb.0:
    successors: %bb.1(0x40000000), %bb.2(0x40000000)
    liveins: $r0, $r1, $r2, $r4, $lr

    frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
    frame-setup CFI_INSTRUCTION def_cfa_offset 8
    frame-setup CFI_INSTRUCTION offset $lr, -4
    frame-setup CFI_INSTRUCTION offset $r4, -8
    tCMPi8 renamable $r1, 4, 14, $noreg, implicit-def $cpsr
    renamable $r3 = t2MOVi 4, 14, $noreg, $noreg
    t2IT 11, 8, implicit-def $itstate
    $r3 = tMOVr renamable $r1, 11, killed $cpsr, implicit killed renamable $r3, implicit killed $itstate
    tCMPi8 renamable $r1, 2, 14, $noreg, implicit-def $cpsr
    renamable $r12 = t2MOVi 4, 14, $noreg, $noreg
    tBcc %bb.2, 2, killed $cpsr

  bb.1:
    liveins: $r2

    renamable $s0 = VLDRS %const.0, 0, 14, $noreg
    VSTRS killed renamable $s0, killed renamable $r2, 0, 14, $noreg
    tPOP_RET 14, $noreg, def $r4, def $pc

  bb.2:
    successors: %bb.3(0x80000000)
    liveins: $r0, $r1, $r2, $r3, $r12

    renamable $r3, dead $cpsr = tSUBrr renamable $r1, killed renamable $r3, 14, $noreg
    renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14, $noreg
    tCMPi8 renamable $r1, 4, 14, $noreg, implicit-def $cpsr
    renamable $lr = nuw nsw t2ADDrs renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
    t2IT 11, 8, implicit-def $itstate
    $r12 = tMOVr renamable $r1, 11, killed $cpsr, implicit killed renamable $r12, implicit killed $itstate
    renamable $r3 = t2SUBrr renamable $r1, killed renamable $r12, 14, $noreg, $noreg
    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14, $noreg
    $r12 = tMOVr $r1, 14, $noreg
    renamable $r4 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
    renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, undef renamable $q0
    $r3 = tMOVr $r0, 14, $noreg
    $lr = t2DoLoopStart renamable $lr

  bb.3:
    successors: %bb.3(0x7c000000), %bb.4(0x04000000)
    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r12

    renamable $vpr = MVE_VCTP32 renamable $r12, 0, $noreg
    renamable $lr = t2LoopDec killed renamable $lr, 1
    MVE_VPST 4, implicit $vpr
    renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r3, 0, 1, renamable $vpr
    renamable $q0 = nnan ninf nsz MVE_VADDf32 killed renamable $q0, killed renamable $q1, 1, killed renamable $vpr, renamable $q0
    renamable $r12 = nsw t2SUBri killed renamable $r12, 4, 14, $noreg, $noreg
    renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14, $noreg
    t2LoopEnd renamable $lr, %bb.3, implicit-def dead $cpsr
    tB %bb.4, 14, $noreg

  bb.4:
    successors: %bb.5(0x80000000)
    liveins: $q0, $r0, $r1, $r2, $r4

    renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14, $noreg
    $lr = tMOVr $r4, 14, $noreg
    $r3 = tMOVr $r1, 14, $noreg
    renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14, $noreg
    renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14, $noreg, implicit $q0
    $s2 = VMOVSR $r1, 14, $noreg
    renamable $s2 = VUITOS killed renamable $s2, 14, $noreg
    $lr = t2DoLoopStart killed $r4
    renamable $s4 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14, $noreg
    renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, undef renamable $q0

  bb.5:
    successors: %bb.5(0x7c000000), %bb.6(0x04000000)
    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $s4

    renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg
    $r4 = VMOVRS $s4, 14, $noreg
    MVE_VPST 2, implicit $vpr
    renamable $q2 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr
    renamable $q2 = nnan ninf nsz MVE_VSUB_qr_f32 killed renamable $q2, killed renamable $r4, 1, renamable $vpr, undef renamable $q2
    renamable $q0 = nnan ninf nsz MVE_VFMAf32 killed renamable $q0, killed renamable $q2, renamable $q2, 1, killed renamable $vpr
    renamable $lr = t2LoopDec killed renamable $lr, 1
    renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14, $noreg
    renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14, $noreg
    t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr
    tB %bb.6, 14, $noreg

  bb.6:
    liveins: $q0, $r1, $r2

    renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14, $noreg
    renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 1, 14, $noreg
    renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14, $noreg
    renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14, $noreg, implicit $q0
    $s2 = VMOVSR killed $r0, 14, $noreg
    renamable $s2 = VUITOS killed renamable $s2, 14, $noreg
    renamable $s0 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14, $noreg
    VSTRS killed renamable $s0, killed renamable $r2, 0, 14, $noreg
    tPOP_RET 14, $noreg, def $r4, def $pc

  bb.7 (align 4):
    CONSTPOOL_ENTRY 0, %const.0, 4

...