# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN --- name: select_s32_scc legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3 ; GCN-LABEL: name: select_s32_scc ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3 ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY2]], [[COPY3]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B32_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(s32) = COPY $sgpr2 %3:sgpr(s32) = COPY $sgpr3 %4:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %5:sgpr(s32) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_s64_scc legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5 ; GCN-LABEL: name: select_s64_scc ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3 ; GCN: [[COPY3:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5 ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64 = S_CSELECT_B64 [[COPY2]], [[COPY3]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B64_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(s64) = COPY $sgpr2_sgpr3 %3:sgpr(s64) = COPY $sgpr4_sgpr5 %4:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %5:sgpr(s64) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_p0_scc legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5 ; GCN-LABEL: name: select_p0_scc ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3 ; GCN: [[COPY3:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5 ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64 = S_CSELECT_B64 [[COPY2]], [[COPY3]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B64_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(p0) = COPY $sgpr2_sgpr3 %3:sgpr(p0) = COPY $sgpr4_sgpr5 %4:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %5:sgpr(p0) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_p1_scc legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5 ; GCN-LABEL: name: select_p1_scc ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3 ; GCN: [[COPY3:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5 ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64 = S_CSELECT_B64 [[COPY2]], [[COPY3]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B64_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(p1) = COPY $sgpr2_sgpr3 %3:sgpr(p1) = COPY $sgpr4_sgpr5 %4:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %5:sgpr(p1) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_p999_scc legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5 ; GCN-LABEL: name: select_p999_scc ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3 ; GCN: [[COPY3:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5 ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64 = S_CSELECT_B64 [[COPY2]], [[COPY3]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B64_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(p999) = COPY $sgpr2_sgpr3 %3:sgpr(p999) = COPY $sgpr4_sgpr5 %4:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %5:sgpr(p999) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_v4s16_scc legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2_sgpr3, $sgpr4_sgpr5 ; GCN-LABEL: name: select_v4s16_scc ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3 ; GCN: [[COPY3:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5 ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B64_:%[0-9]+]]:sreg_64 = S_CSELECT_B64 [[COPY2]], [[COPY3]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B64_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(<4 x s16>) = COPY $sgpr2_sgpr3 %3:sgpr(<4 x s16>) = COPY $sgpr4_sgpr5 %4:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %5:sgpr(<4 x s16>) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_s16_scc legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3 ; GCN-LABEL: name: select_s16_scc ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3 ; GCN: S_CMP_EQ_U32 [[COPY2]], [[COPY3]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B32_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(s32) = COPY $sgpr2 %3:sgpr(s32) = COPY $sgpr3 %4:sgpr(s16) = G_TRUNC %0 %5:sgpr(s16) = G_TRUNC %1 %6:sgpr(s32) = G_ICMP intpred(eq), %2, %3 %7:sgpr(s16) = G_SELECT %6, %4, %5 S_ENDPGM 0, implicit %7 ... --- name: select_v2s16_scc legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3 ; GCN-LABEL: name: select_v2s16_scc ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3 ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY2]], [[COPY3]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B32_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(<2 x s16>) = COPY $sgpr2 %3:sgpr(<2 x s16>) = COPY $sgpr3 %4:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %5:sgpr(<2 x s16>) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_s32_vcc legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_s32_vcc ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY3]], 0, [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(s32) = COPY $vgpr2 %3:vgpr(s32) = COPY $vgpr3 %4:vcc(s1) = G_ICMP intpred(eq), %0, %1 %5:vgpr(s32) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_s16_vcc legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_s16_vcc ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY2]], [[COPY3]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(s32) = COPY $vgpr2 %3:vgpr(s32) = COPY $vgpr3 %4:vgpr(s16) = G_TRUNC %0 %5:vgpr(s16) = G_TRUNC %1 %6:vcc(s1) = G_ICMP intpred(eq), %2, %3 %7:vgpr(s16) = G_SELECT %6, %4, %5 S_ENDPGM 0, implicit %7 ... --- name: select_v2s16_vcc legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_v2s16_vcc ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY3]], 0, [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(<2 x s16>) = COPY $vgpr2 %3:vgpr(<2 x s16>) = COPY $vgpr3 %4:vcc(s1) = G_ICMP intpred(eq), %0, %1 %5:vgpr(<2 x s16>) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... --- name: select_p3_vcc legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_p3_vcc ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY3]], 0, [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(p3) = COPY $vgpr2 %3:vgpr(p3) = COPY $vgpr3 %4:vcc(s1) = G_ICMP intpred(eq), %0, %1 %5:vgpr(p3) = G_SELECT %4, %2, %3 S_ENDPGM 0, implicit %5 ... # Fold source modifiers into VOP select --- name: select_s32_vcc_fneg_lhs legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_s32_vcc_fneg_lhs ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY3]], 1, [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(s32) = COPY $vgpr2 %3:vgpr(s32) = COPY $vgpr3 %4:vgpr(s32) = G_FNEG %2 %5:vcc(s1) = G_ICMP intpred(eq), %0, %1 %6:vgpr(s32) = G_SELECT %5, %4, %3 S_ENDPGM 0, implicit %6 ... --- name: select_s32_vcc_fneg_rhs legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_s32_vcc_fneg_rhs ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 1, [[COPY3]], 0, [[COPY2]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(s32) = COPY $vgpr2 %3:vgpr(s32) = COPY $vgpr3 %4:vgpr(s32) = G_FNEG %3 %5:vcc(s1) = G_ICMP intpred(eq), %0, %1 %6:vgpr(s32) = G_SELECT %5, %2, %4 S_ENDPGM 0, implicit %6 ... --- name: select_s32_vcc_fneg_fabs_lhs legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_s32_vcc_fneg_fabs_lhs ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 3, [[COPY3]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(s32) = COPY $vgpr2 %3:vgpr(s32) = COPY $vgpr3 %4:vgpr(s32) = G_FABS %3 %5:vgpr(s32) = G_FNEG %4 %6:vcc(s1) = G_ICMP intpred(eq), %0, %1 %7:vgpr(s32) = G_SELECT %6, %5, %2 S_ENDPGM 0, implicit %7 ... # Make sure we don't try to fold source modifiers into non-32 bit value. --- name: select_s16_vcc_fneg_lhs legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_s16_vcc_fneg_lhs ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 ; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768 ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY2]], [[COPY3]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[V_XOR_B32_e32_]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(s32) = COPY $vgpr2 %3:vgpr(s32) = COPY $vgpr3 %4:vgpr(s16) = G_TRUNC %0 %5:vgpr(s16) = G_TRUNC %1 %6:vgpr(s16) = G_FNEG %4 %7:vcc(s1) = G_ICMP intpred(eq), %2, %3 %8:vgpr(s16) = G_SELECT %7, %6, %5 S_ENDPGM 0, implicit %8 ... # Make sure we don't try to fold source modifiers into a vector --- name: select_v2s16_vcc_fneg_lhs legalized: true regBankSelected: true body: | bb.0: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 ; GCN-LABEL: name: select_v2s16_vcc_fneg_lhs ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr3 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147516416 ; GCN: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY2]], implicit $exec ; GCN: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY1]], implicit $exec ; GCN: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[V_XOR_B32_e32_]], [[V_CMP_EQ_U32_e64_]], implicit $exec ; GCN: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]] %0:vgpr(s32) = COPY $vgpr0 %1:vgpr(s32) = COPY $vgpr1 %2:vgpr(<2 x s16>) = COPY $vgpr2 %3:vgpr(<2 x s16>) = COPY $vgpr3 %4:vgpr(<2 x s16>) = G_FNEG %3 %5:vcc(s1) = G_ICMP intpred(eq), %0, %1 %6:vgpr(<2 x s16>) = G_SELECT %5, %4, %3 S_ENDPGM 0, implicit %6 ... # Make sure we don't try to fold source modifiers into a scalar select --- name: select_s32_scc_fneg_lhs legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3 ; GCN-LABEL: name: select_s32_scc_fneg_lhs ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648 ; GCN: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[S_XOR_B32_]], [[COPY3]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B32_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(s32) = COPY $sgpr2 %3:sgpr(s32) = COPY $sgpr3 %4:sgpr(s32) = G_FNEG %2 %5:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %6:sgpr(s32) = G_SELECT %5, %4, %3 S_ENDPGM 0, implicit %6 ... --- name: select_s32_scc_fneg_rhs legalized: true regBankSelected: true body: | bb.0: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3 ; GCN-LABEL: name: select_s32_scc_fneg_rhs ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 ; GCN: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 ; GCN: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 ; GCN: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr3 ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648 ; GCN: [[S_XOR_B32_:%[0-9]+]]:sreg_32 = S_XOR_B32 [[COPY3]], [[S_MOV_B32_]], implicit-def $scc ; GCN: S_CMP_EQ_U32 [[COPY]], [[COPY1]], implicit-def $scc ; GCN: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc ; GCN: $scc = COPY [[COPY4]] ; GCN: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY2]], [[S_XOR_B32_]], implicit $scc ; GCN: S_ENDPGM 0, implicit [[S_CSELECT_B32_]] %0:sgpr(s32) = COPY $sgpr0 %1:sgpr(s32) = COPY $sgpr1 %2:sgpr(s32) = COPY $sgpr2 %3:sgpr(s32) = COPY $sgpr3 %4:sgpr(s32) = G_FNEG %3 %5:sgpr(s32) = G_ICMP intpred(eq), %0, %1 %6:sgpr(s32) = G_SELECT %5, %2, %4 S_ENDPGM 0, implicit %6 ...