//==------ llvm/CodeGen/GlobalISel/MIPatternMatch.h -------------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // /// Contains matchers for matching SSA Machine Instructions. // //===----------------------------------------------------------------------===// #ifndef LLVM_GMIR_PATTERNMATCH_H #define LLVM_GMIR_PATTERNMATCH_H #include "llvm/CodeGen/GlobalISel/Utils.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/IR/InstrTypes.h" namespace llvm { namespace MIPatternMatch { template bool mi_match(Reg R, const MachineRegisterInfo &MRI, Pattern &&P) { return P.match(MRI, R); } // TODO: Extend for N use. template struct OneUse_match { SubPatternT SubPat; OneUse_match(const SubPatternT &SP) : SubPat(SP) {} bool match(const MachineRegisterInfo &MRI, Register Reg) { return MRI.hasOneUse(Reg) && SubPat.match(MRI, Reg); } }; template inline OneUse_match m_OneUse(const SubPat &SP) { return SP; } template struct OneNonDBGUse_match { SubPatternT SubPat; OneNonDBGUse_match(const SubPatternT &SP) : SubPat(SP) {} bool match(const MachineRegisterInfo &MRI, Register Reg) { return MRI.hasOneNonDBGUse(Reg) && SubPat.match(MRI, Reg); } }; template inline OneNonDBGUse_match m_OneNonDBGUse(const SubPat &SP) { return SP; } struct ConstantMatch { int64_t &CR; ConstantMatch(int64_t &C) : CR(C) {} bool match(const MachineRegisterInfo &MRI, Register Reg) { if (auto MaybeCst = getConstantVRegSExtVal(Reg, MRI)) { CR = *MaybeCst; return true; } return false; } }; inline ConstantMatch m_ICst(int64_t &Cst) { return ConstantMatch(Cst); } /// Matcher for a specific constant value. struct SpecificConstantMatch { int64_t RequestedVal; SpecificConstantMatch(int64_t RequestedVal) : RequestedVal(RequestedVal) {} bool match(const MachineRegisterInfo &MRI, Register Reg) { int64_t MatchedVal; return mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal; } }; /// Matches a constant equal to \p RequestedValue. inline SpecificConstantMatch m_SpecificICst(int64_t RequestedValue) { return SpecificConstantMatch(RequestedValue); } ///{ /// Convenience matchers for specific integer values. inline SpecificConstantMatch m_ZeroInt() { return SpecificConstantMatch(0); } inline SpecificConstantMatch m_AllOnesInt() { return SpecificConstantMatch(-1); } ///} // TODO: Rework this for different kinds of MachineOperand. // Currently assumes the Src for a match is a register. // We might want to support taking in some MachineOperands and call getReg on // that. struct operand_type_match { bool match(const MachineRegisterInfo &MRI, Register Reg) { return true; } bool match(const MachineRegisterInfo &MRI, MachineOperand *MO) { return MO->isReg(); } }; inline operand_type_match m_Reg() { return operand_type_match(); } /// Matching combinators. template struct And { template bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { return true; } }; template struct And : And { Pred P; And(Pred &&p, Preds &&... preds) : And(std::forward(preds)...), P(std::forward(p)) { } template bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { return P.match(MRI, src) && And::match(MRI, src); } }; template struct Or { template bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { return false; } }; template struct Or : Or { Pred P; Or(Pred &&p, Preds &&... preds) : Or(std::forward(preds)...), P(std::forward(p)) {} template bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) { return P.match(MRI, src) || Or::match(MRI, src); } }; template And m_all_of(Preds &&... preds) { return And(std::forward(preds)...); } template Or m_any_of(Preds &&... preds) { return Or(std::forward(preds)...); } template struct bind_helper { static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V) { VR = V; return true; } }; template <> struct bind_helper { static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI, Register Reg) { MI = MRI.getVRegDef(Reg); if (MI) return true; return false; } }; template <> struct bind_helper { static bool bind(const MachineRegisterInfo &MRI, LLT Ty, Register Reg) { Ty = MRI.getType(Reg); if (Ty.isValid()) return true; return false; } }; template <> struct bind_helper { static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F, Register Reg) { F = getConstantFPVRegVal(Reg, MRI); if (F) return true; return false; } }; template struct bind_ty { Class &VR; bind_ty(Class &V) : VR(V) {} template bool match(const MachineRegisterInfo &MRI, ITy &&V) { return bind_helper::bind(MRI, VR, V); } }; inline bind_ty m_Reg(Register &R) { return R; } inline bind_ty m_MInstr(MachineInstr *&MI) { return MI; } inline bind_ty m_Type(LLT Ty) { return Ty; } inline bind_ty m_Pred(CmpInst::Predicate &P) { return P; } inline operand_type_match m_Pred() { return operand_type_match(); } // Helper for matching G_FCONSTANT inline bind_ty m_GFCst(const ConstantFP *&C) { return C; } // General helper for all the binary generic MI such as G_ADD/G_SUB etc template struct BinaryOp_match { LHS_P L; RHS_P R; BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS) : L(LHS), R(RHS) {} template bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { MachineInstr *TmpMI; if (mi_match(Op, MRI, m_MInstr(TmpMI))) { if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) { return (L.match(MRI, TmpMI->getOperand(1).getReg()) && R.match(MRI, TmpMI->getOperand(2).getReg())) || (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) && L.match(MRI, TmpMI->getOperand(2).getReg()))); } } return false; } }; template inline BinaryOp_match m_GAdd(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GPtrAdd(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GSub(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GMul(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GFAdd(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GFMul(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GFSub(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GAnd(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GXor(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GOr(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GShl(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GLShr(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } template inline BinaryOp_match m_GAShr(const LHS &L, const RHS &R) { return BinaryOp_match(L, R); } // Helper for unary instructions (G_[ZSA]EXT/G_TRUNC) etc template struct UnaryOp_match { SrcTy L; UnaryOp_match(const SrcTy &LHS) : L(LHS) {} template bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { MachineInstr *TmpMI; if (mi_match(Op, MRI, m_MInstr(TmpMI))) { if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) { return L.match(MRI, TmpMI->getOperand(1).getReg()); } } return false; } }; template inline UnaryOp_match m_GAnyExt(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GSExt(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GZExt(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GFPExt(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GTrunc(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GBitcast(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GPtrToInt(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GIntToPtr(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GFPTrunc(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GFabs(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_GFNeg(const SrcTy &Src) { return UnaryOp_match(Src); } template inline UnaryOp_match m_Copy(SrcTy &&Src) { return UnaryOp_match(std::forward(Src)); } // General helper for generic MI compares, i.e. G_ICMP and G_FCMP // TODO: Allow checking a specific predicate. template struct CompareOp_match { Pred_P P; LHS_P L; RHS_P R; CompareOp_match(const Pred_P &Pred, const LHS_P &LHS, const RHS_P &RHS) : P(Pred), L(LHS), R(RHS) {} template bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { MachineInstr *TmpMI; if (!mi_match(Op, MRI, m_MInstr(TmpMI)) || TmpMI->getOpcode() != Opcode) return false; auto TmpPred = static_cast(TmpMI->getOperand(1).getPredicate()); if (!P.match(MRI, TmpPred)) return false; return L.match(MRI, TmpMI->getOperand(2).getReg()) && R.match(MRI, TmpMI->getOperand(3).getReg()); } }; template inline CompareOp_match m_GICmp(const Pred &P, const LHS &L, const RHS &R) { return CompareOp_match(P, L, R); } template inline CompareOp_match m_GFCmp(const Pred &P, const LHS &L, const RHS &R) { return CompareOp_match(P, L, R); } // Helper for checking if a Reg is of specific type. struct CheckType { LLT Ty; CheckType(const LLT Ty) : Ty(Ty) {} bool match(const MachineRegisterInfo &MRI, Register Reg) { return MRI.getType(Reg) == Ty; } }; inline CheckType m_SpecificType(LLT Ty) { return Ty; } template struct TernaryOp_match { Src0Ty Src0; Src1Ty Src1; Src2Ty Src2; TernaryOp_match(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) : Src0(Src0), Src1(Src1), Src2(Src2) {} template bool match(const MachineRegisterInfo &MRI, OpTy &&Op) { MachineInstr *TmpMI; if (mi_match(Op, MRI, m_MInstr(TmpMI))) { if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 4) { return (Src0.match(MRI, TmpMI->getOperand(1).getReg()) && Src1.match(MRI, TmpMI->getOperand(2).getReg()) && Src2.match(MRI, TmpMI->getOperand(3).getReg())); } } return false; } }; template inline TernaryOp_match m_GInsertVecElt(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) { return TernaryOp_match(Src0, Src1, Src2); } /// Matches a register negated by a G_SUB. /// G_SUB 0, %negated_reg template inline BinaryOp_match m_Neg(const SrcTy &&Src) { return m_GSub(m_ZeroInt(), Src); } /// Matches a register not-ed by a G_XOR. /// G_XOR %not_reg, -1 template inline BinaryOp_match m_Not(const SrcTy &&Src) { return m_GXor(Src, m_AllOnesInt()); } } // namespace GMIPatternMatch } // namespace llvm #endif