# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --- | define void @test_shl() { ret void } define void @test_shl_i1() { ret void } ... --- name: test_shl alignment: 16 legalized: false regBankSelected: false tracksRegLiveness: true registers: - { id: 0, class: _, preferred-register: '' } - { id: 1, class: _, preferred-register: '' } - { id: 2, class: _, preferred-register: '' } - { id: 3, class: _, preferred-register: '' } - { id: 4, class: _, preferred-register: '' } - { id: 5, class: _, preferred-register: '' } - { id: 6, class: _, preferred-register: '' } - { id: 7, class: _, preferred-register: '' } - { id: 8, class: _, preferred-register: '' } - { id: 9, class: _, preferred-register: '' } - { id: 10, class: _, preferred-register: '' } - { id: 11, class: _, preferred-register: '' } body: | bb.1 (%ir-block.0): liveins: $rdi, $rsi ; CHECK-LABEL: name: test_shl ; CHECK: liveins: $rdi, $rsi ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi ; CHECK: RET 0 %0(s64) = COPY $rdi %1(s64) = COPY $rsi %2(s64) = G_SHL %0, %1 %3(s32) = G_TRUNC %0 %4(s32) = G_TRUNC %1 %5(s32) = G_SHL %3, %4 %6(s16) = G_TRUNC %0 %7(s16) = G_TRUNC %1 %8(s16) = G_SHL %6, %7 %9(s8) = G_TRUNC %0 %10(s8) = G_TRUNC %1 %11(s8) = G_SHL %9, %10 RET 0 ... --- name: test_shl_i1 alignment: 16 legalized: false regBankSelected: false tracksRegLiveness: true registers: - { id: 0, class: _, preferred-register: '' } - { id: 1, class: _, preferred-register: '' } - { id: 2, class: _, preferred-register: '' } - { id: 3, class: _, preferred-register: '' } - { id: 4, class: _, preferred-register: '' } body: | bb.1 (%ir-block.0): liveins: $rdi, $rsi ; CHECK-LABEL: name: test_shl_i1 ; CHECK: liveins: $rdi, $rsi ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi ; CHECK: RET 0 %0(s64) = COPY $rdi %1(s64) = COPY $rsi %2(s1) = G_TRUNC %0 %3(s1) = G_TRUNC %1 %4(s1) = G_SHL %2, %3 RET 0 ...