# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -O3 -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 -run-pass=ppc-mi-peepholes \ # RUN: -simplify-mir %s -o - | FileCheck %s --- name: poc alignment: 16 tracksRegLiveness: true body: | ; CHECK-LABEL: name: poc ; CHECK: bb.0.entry: ; CHECK: successors: %bb.1, %bb.2 ; CHECK: liveins: $x3, $x4, $x5, $x6 ; CHECK: [[COPY:%[0-9]+]]:g8rc = COPY $x6 ; CHECK: [[COPY1:%[0-9]+]]:g8rc = COPY $x5 ; CHECK: [[COPY2:%[0-9]+]]:g8rc = COPY $x4 ; CHECK: [[COPY3:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3 ; CHECK: [[ANDI8_rec_:%[0-9]+]]:g8rc = ANDI8_rec [[COPY1]], 1, implicit-def $cr0 ; CHECK: [[COPY4:%[0-9]+]]:crbitrc = COPY $cr0gt ; CHECK: BCn killed [[COPY4]], %bb.2 ; CHECK: B %bb.1 ; CHECK: bb.1: ; CHECK: liveins: $x3 ; CHECK: [[EXTSW:%[0-9]+]]:g8rc = EXTSW $x3 ; CHECK: [[RLDICR:%[0-9]+]]:g8rc = RLDICR [[ANDI8_rec_]], 2, 61 ; CHECK: $x3 = COPY [[RLDICR]] ; CHECK: [[RLDICR1:%[0-9]+]]:g8rc = RLDICR [[EXTSW]], 2, 61 ; CHECK: [[ADD8_:%[0-9]+]]:g8rc = ADD8 [[COPY3]], [[RLDICR1]] ; CHECK: $x3 = COPY [[ADD8_]] ; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3 ; CHECK: bb.2: ; CHECK: [[COPY5:%[0-9]+]]:gprc = COPY [[COPY]].sub_32 ; CHECK: [[DEF:%[0-9]+]]:g8rc = IMPLICIT_DEF ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:g8rc = INSERT_SUBREG [[DEF]], [[COPY5]], %subreg.sub_32 ; CHECK: $x3 = COPY [[INSERT_SUBREG]] ; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3 bb.0.entry: successors: %bb.1, %bb.2 liveins: $x3, $x4, $x5, $x6 %4:g8rc = COPY $x6 %3:g8rc = COPY $x5 %2:g8rc = COPY $x4 %1:g8rc_and_g8rc_nox0 = COPY $x3 %11:g8rc = ANDI8_rec %3, 1, implicit-def $cr0 %6:crbitrc = COPY $cr0gt BCn killed %6, %bb.2 B %bb.1 bb.1: liveins: $x3 %0:g8rc = EXTSW $x3 %12:g8rc = RLDICR %11, 2, 61 $x3 = COPY %12:g8rc %9:g8rc = RLDICR %0, 2, 61 %10:g8rc = ADD8 %1, %9 $x3 = COPY %10 BLR8 implicit $lr8, implicit $rm, implicit $x3 bb.2: %5:gprc = COPY %4.sub_32 %8:g8rc = IMPLICIT_DEF %7:g8rc = INSERT_SUBREG %8, %5, %subreg.sub_32 $x3 = COPY %7 BLR8 implicit $lr8, implicit $rm, implicit $x3 ...