# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32 --- | define void @select_i32(i32, i32) {entry: ret void} define void @select_ptr(i32, i32) {entry: ret void} define void @select_i64() {entry: ret void} define void @select_ambiguous_i64_in_fpr(i64* %i64_ptr_a, i64* %i64_ptr_b, i64* %i64_ptr_c) {entry: ret void} define void @select_float() {entry: ret void} define void @select_ambiguous_float_in_gpr(float* %f32_ptr_a, float* %f32_ptr_b, float* %f32_ptr_c) {entry: ret void} define void @select_double() {entry: ret void} ... --- name: select_i32 alignment: 4 legalized: true tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1, $a2 ; MIPS32-LABEL: name: select_i32 ; MIPS32: liveins: $a0, $a1, $a2 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]] ; MIPS32: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]] ; MIPS32: $v0 = COPY [[SELECT]](s32) ; MIPS32: RetRA implicit $v0 %3:_(s32) = COPY $a0 %1:_(s32) = COPY $a1 %2:_(s32) = COPY $a2 %6:_(s32) = G_CONSTANT i32 1 %7:_(s32) = COPY %3(s32) %5:_(s32) = G_AND %7, %6 %4:_(s32) = G_SELECT %5(s32), %1, %2 $v0 = COPY %4(s32) RetRA implicit $v0 ... --- name: select_ptr alignment: 4 legalized: true tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1, $a2 ; MIPS32-LABEL: name: select_ptr ; MIPS32: liveins: $a0, $a1, $a2 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]] ; MIPS32: [[SELECT:%[0-9]+]]:gprb(p0) = G_SELECT [[AND]](s32), [[COPY1]], [[COPY2]] ; MIPS32: $v0 = COPY [[SELECT]](p0) ; MIPS32: RetRA implicit $v0 %3:_(s32) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(p0) = COPY $a2 %6:_(s32) = G_CONSTANT i32 1 %7:_(s32) = COPY %3(s32) %5:_(s32) = G_AND %7, %6 %4:_(p0) = G_SELECT %5(s32), %1, %2 $v0 = COPY %4(p0) RetRA implicit $v0 ... --- name: select_i64 alignment: 4 legalized: true tracksRegLiveness: true fixedStack: - { id: 0, offset: 20, size: 4, alignment: 4, isImmutable: true } - { id: 1, offset: 16, size: 4, alignment: 8, isImmutable: true } body: | bb.1.entry: liveins: $a0, $a2, $a3 ; MIPS32-LABEL: name: select_i64 ; MIPS32: liveins: $a0, $a2, $a3 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a2 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a3 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8) ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1 ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load 4 from %fixed-stack.1) ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]] ; MIPS32: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY1]], [[LOAD]] ; MIPS32: [[SELECT1:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[COPY2]], [[LOAD1]] ; MIPS32: $v0 = COPY [[SELECT]](s32) ; MIPS32: $v1 = COPY [[SELECT1]](s32) ; MIPS32: RetRA implicit $v0, implicit $v1 %3:_(s32) = COPY $a0 %4:_(s32) = COPY $a2 %5:_(s32) = COPY $a3 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32) %8:_(p0) = G_FRAME_INDEX %fixed-stack.1 %6:_(s32) = G_LOAD %8(p0) :: (load 4 from %fixed-stack.1, align 8) %9:_(p0) = G_FRAME_INDEX %fixed-stack.0 %7:_(s32) = G_LOAD %9(p0) :: (load 4 from %fixed-stack.0) %2:_(s64) = G_MERGE_VALUES %6(s32), %7(s32) %14:_(s32) = G_CONSTANT i32 1 %15:_(s32) = COPY %3(s32) %13:_(s32) = G_AND %15, %14 %10:_(s64) = G_SELECT %13(s32), %1, %2 %11:_(s32), %12:_(s32) = G_UNMERGE_VALUES %10(s64) $v0 = COPY %11(s32) $v1 = COPY %12(s32) RetRA implicit $v0, implicit $v1 ... --- name: select_ambiguous_i64_in_fpr alignment: 4 legalized: true tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1, $a2, $a3 ; MIPS32-LABEL: name: select_ambiguous_i64_in_fpr ; MIPS32: liveins: $a0, $a1, $a2, $a3 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY1]](p0) :: (load 8 from %ir.i64_ptr_a) ; MIPS32: [[LOAD1:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY2]](p0) :: (load 8 from %ir.i64_ptr_b) ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s32), [[LOAD]], [[LOAD1]] ; MIPS32: G_STORE [[SELECT]](s64), [[COPY3]](p0) :: (store 8 into %ir.i64_ptr_c) ; MIPS32: RetRA %4:_(s32) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(p0) = COPY $a2 %3:_(p0) = COPY $a3 %5:_(s64) = G_LOAD %1(p0) :: (load 8 from %ir.i64_ptr_a) %6:_(s64) = G_LOAD %2(p0) :: (load 8 from %ir.i64_ptr_b) %9:_(s32) = G_CONSTANT i32 1 %10:_(s32) = COPY %4(s32) %8:_(s32) = G_AND %10, %9 %7:_(s64) = G_SELECT %8(s32), %5, %6 G_STORE %7(s64), %3(p0) :: (store 8 into %ir.i64_ptr_c) RetRA ... --- name: select_float alignment: 4 legalized: true tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1, $a2 ; MIPS32-LABEL: name: select_float ; MIPS32: liveins: $a0, $a1, $a2 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]] ; MIPS32: [[COPY4:%[0-9]+]]:fprb(s32) = COPY [[COPY1]](s32) ; MIPS32: [[COPY5:%[0-9]+]]:fprb(s32) = COPY [[COPY2]](s32) ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s32) = G_SELECT [[AND]](s32), [[COPY4]], [[COPY5]] ; MIPS32: $f0 = COPY [[SELECT]](s32) ; MIPS32: RetRA implicit $f0 %3:_(s32) = COPY $a0 %1:_(s32) = COPY $a1 %2:_(s32) = COPY $a2 %6:_(s32) = G_CONSTANT i32 1 %7:_(s32) = COPY %3(s32) %5:_(s32) = G_AND %7, %6 %4:_(s32) = G_SELECT %5(s32), %1, %2 $f0 = COPY %4(s32) RetRA implicit $f0 ... --- name: select_ambiguous_float_in_gpr alignment: 4 legalized: true tracksRegLiveness: true body: | bb.1.entry: liveins: $a0, $a1, $a2, $a3 ; MIPS32-LABEL: name: select_ambiguous_float_in_gpr ; MIPS32: liveins: $a0, $a1, $a2, $a3 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY1]](p0) :: (load 4 from %ir.f32_ptr_a) ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY2]](p0) :: (load 4 from %ir.f32_ptr_b) ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32) ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]] ; MIPS32: [[SELECT:%[0-9]+]]:gprb(s32) = G_SELECT [[AND]](s32), [[LOAD]], [[LOAD1]] ; MIPS32: G_STORE [[SELECT]](s32), [[COPY3]](p0) :: (store 4 into %ir.f32_ptr_c) ; MIPS32: RetRA %4:_(s32) = COPY $a0 %1:_(p0) = COPY $a1 %2:_(p0) = COPY $a2 %3:_(p0) = COPY $a3 %5:_(s32) = G_LOAD %1(p0) :: (load 4 from %ir.f32_ptr_a) %6:_(s32) = G_LOAD %2(p0) :: (load 4 from %ir.f32_ptr_b) %9:_(s32) = G_CONSTANT i32 1 %10:_(s32) = COPY %4(s32) %8:_(s32) = G_AND %10, %9 %7:_(s32) = G_SELECT %8(s32), %5, %6 G_STORE %7(s32), %3(p0) :: (store 4 into %ir.f32_ptr_c) RetRA ... --- name: select_double alignment: 4 legalized: true tracksRegLiveness: true fixedStack: - { id: 0, offset: 16, size: 4, alignment: 8, isImmutable: true } body: | bb.1.entry: liveins: $d6, $d7 ; MIPS32-LABEL: name: select_double ; MIPS32: liveins: $d6, $d7 ; MIPS32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6 ; MIPS32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load 4 from %fixed-stack.0, align 8) ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[LOAD]](s32) ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]] ; MIPS32: [[SELECT:%[0-9]+]]:fprb(s64) = G_SELECT [[AND]](s32), [[COPY]], [[COPY1]] ; MIPS32: $d0 = COPY [[SELECT]](s64) ; MIPS32: RetRA implicit $d0 %0:_(s64) = COPY $d6 %1:_(s64) = COPY $d7 %4:_(p0) = G_FRAME_INDEX %fixed-stack.0 %3:_(s32) = G_LOAD %4(p0) :: (load 4 from %fixed-stack.0, align 8) %7:_(s32) = G_CONSTANT i32 1 %8:_(s32) = COPY %3(s32) %6:_(s32) = G_AND %8, %7 %5:_(s64) = G_SELECT %6(s32), %0, %1 $d0 = COPY %5(s64) RetRA implicit $d0 ...