360 lines
12 KiB
Plaintext
360 lines
12 KiB
Plaintext
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# REQUIRES: asserts
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# RUN: llc -run-pass arm-cp-islands %s -o - | FileCheck %s
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#
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# This is a reduced test made to expose a bug in
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# ARMConstantIslandPass in Thumb1 mode, see PR36658.
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# Verify optimized JT code uses TBB instructions.
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# CHECK-LABEL: bb.7.entry:
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# CHECK: tTBB_JT $pc, killed $r2, %jump-table.1, 0
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# CHECK-LABEL: bb.8:
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# CHECK: JUMPTABLE_TBB 0, %jump-table.1, 44
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# CHECK-LABEL: bb.11.entry:
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# CHECK: $r1 = tMOVSr $r0, implicit-def dead $cpsr
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# CHECK: tTBB_JT $pc, killed $r2, %jump-table.0, 1
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# CHECK-LABEL: bb.12:
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# CHECK: JUMPTABLE_TBB 1, %jump-table.0, 44
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--- |
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; ModuleID = 'PR36658.ll'
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source_filename = "PR36658.ll"
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv5e-none-linux-gnueabi"
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declare i32 @foo1(...)
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declare i32 @foo2(i32)
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declare i32 @foo3(i32*)
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; Function Attrs: nounwind optsize
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define internal fastcc i32 @foo4(i32* nocapture %ignore_ptr) #0 {
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entry:
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%call = tail call i32 @foo3(i32* undef)
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switch i32 %call, label %sw.epilog [
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i32 120, label %sw.bb
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i32 48, label %sw.bb73
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i32 49, label %sw.bb73
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i32 50, label %sw.bb73
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i32 51, label %sw.bb73
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i32 52, label %sw.bb73
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i32 53, label %sw.bb73
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i32 54, label %sw.bb73
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i32 55, label %sw.bb73
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i32 92, label %cleanup
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i32 39, label %cleanup
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i32 34, label %cleanup
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i32 10, label %sw.bb91
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i32 110, label %sw.bb93
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i32 116, label %sw.bb94
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i32 114, label %sw.bb95
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i32 102, label %sw.bb96
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i32 98, label %sw.bb97
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i32 97, label %sw.bb98
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i32 118, label %sw.bb106
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i32 101, label %sw.bb107
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i32 69, label %sw.bb107
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i32 63, label %cleanup
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]
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sw.bb: ; preds = %entry
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br label %while.cond
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while.cond: ; preds = %while.cond, %sw.bb
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%call5 = tail call i32 @foo3(i32* null)
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br label %while.cond
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sw.bb73: ; preds = %entry, %entry, %entry, %entry, %entry, %entry, %entry, %entry
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%0 = and i32 %call, -8
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%1 = icmp eq i32 %0, 48
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br i1 %1, label %while.body83.preheader, label %while.end88
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while.body83.preheader: ; preds = %sw.bb73
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br label %while.body83
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while.body83: ; preds = %while.body83.preheader, %while.body83
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%call87 = tail call i32 @foo3(i32* null)
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br label %while.body83
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while.end88: ; preds = %sw.bb73
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%call89 = tail call i32 @foo2(i32 %call)
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unreachable
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sw.bb91: ; preds = %entry
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store i32 1, i32* %ignore_ptr, align 4
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br label %cleanup
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sw.bb93: ; preds = %entry
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br label %cleanup
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sw.bb94: ; preds = %entry
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br label %cleanup
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sw.bb95: ; preds = %entry
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br label %cleanup
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sw.bb96: ; preds = %entry
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br label %cleanup
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sw.bb97: ; preds = %entry
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br label %cleanup
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sw.bb98: ; preds = %entry
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br label %cleanup
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sw.bb106: ; preds = %entry
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br label %cleanup
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sw.bb107: ; preds = %entry, %entry
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br i1 undef, label %cleanup, label %if.then109
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if.then109: ; preds = %sw.bb107
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%call110 = tail call i32 bitcast (i32 (...)* @foo1 to i32 (i8*, i32)*)(i8* undef, i32 %call)
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unreachable
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sw.epilog: ; preds = %entry
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%call.off = add i32 %call, -32
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unreachable
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cleanup: ; preds = %sw.bb107, %sw.bb106, %sw.bb98, %sw.bb97, %sw.bb96, %sw.bb95, %sw.bb94, %sw.bb93, %sw.bb91, %entry, %entry, %entry, %entry
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%retval.0 = phi i32 [ 11, %sw.bb106 ], [ 7, %sw.bb98 ], [ 8, %sw.bb97 ], [ 12, %sw.bb96 ], [ 13, %sw.bb95 ], [ 9, %sw.bb94 ], [ 10, %sw.bb93 ], [ 0, %sw.bb91 ], [ %call, %entry ], [ %call, %entry ], [ %call, %entry ], [ 27, %sw.bb107 ], [ %call, %entry ]
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ret i32 %retval.0
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}
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**) #1
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attributes #0 = { nounwind optsize }
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attributes #1 = { nounwind }
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...
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---
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name: foo4
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alignment: 2
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0' }
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frameInfo:
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stackSize: 8
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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maxCallFrameSize: 0
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stack:
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- { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, stack-id: default,
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callee-saved-register: '$lr', callee-saved-restored: false }
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- { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: default,
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callee-saved-register: '$r4' }
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jumpTable:
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kind: inline
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entries:
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- id: 0
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blocks: [ '%bb.28', '%bb.26', '%bb.26', '%bb.26', '%bb.26',
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'%bb.24', '%bb.23', '%bb.26', '%bb.26', '%bb.12',
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'%bb.22' ]
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- id: 1
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blocks: [ '%bb.19', '%bb.26', '%bb.26', '%bb.26', '%bb.21',
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'%bb.26', '%bb.20', '%bb.26', '%bb.25', '%bb.26',
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'%bb.15' ]
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body: |
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bb.0.entry:
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successors: %bb.1(0x42c8590b), %bb.9(0x3d37a6f5)
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liveins: $r0, $r4, $lr
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frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
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frame-setup CFI_INSTRUCTION def_cfa_offset 8
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frame-setup CFI_INSTRUCTION offset $lr, -4
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frame-setup CFI_INSTRUCTION offset $r4, -8
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$r4 = tMOVSr $r0, implicit-def dead $cpsr
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tBL 14, $noreg, @foo3, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit undef $r0, implicit-def $sp, implicit-def $r0
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$r1 = tMOVSr $r0, implicit-def dead $cpsr
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tCMPi8 $r0, 68, 14, $noreg, implicit-def $cpsr
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tBcc %bb.9, 12, killed $cpsr
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bb.1.entry:
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successors: %bb.2(0x20000000), %bb.7(0x60000000)
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liveins: $r0, $r1, $r4
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tCMPi8 renamable $r1, 47, 14, $noreg, implicit-def $cpsr
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tBcc %bb.2, 13, killed $cpsr
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bb.7.entry:
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successors: %bb.16(0x71c71c72), %bb.8(0x0e38e38e)
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liveins: $r0, $r1
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$r2 = tMOVSr $r1, implicit-def dead $cpsr
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renamable $r2, dead $cpsr = tSUBi8 killed renamable $r2, 48, 14, $noreg
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tCMPi8 killed renamable $r2, 8, 14, $noreg, implicit-def $cpsr
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tBcc %bb.8, 2, killed $cpsr
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bb.16.sw.bb73:
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successors: %bb.17(0x7fffffff), %bb.18(0x00000001)
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liveins: $r0, $r1
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renamable $r2, dead $cpsr = tMOVi8 7, 14, $noreg
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renamable $r1, dead $cpsr = tBIC killed renamable $r1, killed renamable $r2, 14, $noreg
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tCMPi8 killed renamable $r1, 48, 14, $noreg, implicit-def $cpsr
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tBcc %bb.18, 1, killed $cpsr
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bb.17.while.body83:
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renamable $r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBL 14, $noreg, @foo3, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0
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tB %bb.17, 14, $noreg
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bb.9.entry:
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successors: %bb.10(0x45d1745d), %bb.29(0x3a2e8ba3)
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liveins: $r0, $r1
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$r2 = tMOVSr $r1, implicit-def dead $cpsr
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renamable $r2, dead $cpsr = tSUBi8 killed renamable $r2, 92, 14, $noreg
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tCMPi8 renamable $r2, 10, 14, $noreg, implicit-def $cpsr
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tBcc %bb.29, 9, killed $cpsr
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bb.10.entry:
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successors: %bb.11(0x15555555), %bb.14(0x6aaaaaab)
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liveins: $r0, $r1
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$r2 = tMOVSr $r1, implicit-def dead $cpsr
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renamable $r2, dead $cpsr = tSUBi8 killed renamable $r2, 110, 14, $noreg
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tCMPi8 renamable $r2, 10, 14, $noreg, implicit-def $cpsr
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tBcc %bb.11, 8, killed $cpsr
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bb.14.entry:
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successors: %bb.19(0x1999999a), %bb.26(0x00000000), %bb.21(0x1999999a), %bb.20(0x1999999a), %bb.25(0x1999999a), %bb.15(0x1999999a)
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liveins: $r2
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renamable $r0, dead $cpsr = tLSLri killed renamable $r2, 2, 14, $noreg
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renamable $r1 = tLEApcrelJT %jump-table.1, 14, $noreg
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renamable $r0 = tLDRr killed renamable $r1, killed renamable $r0, 14, $noreg :: (load 4 from jump-table)
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tBR_JTr killed renamable $r0, %jump-table.1
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bb.19.sw.bb93:
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renamable $r1, dead $cpsr = tMOVi8 10, 14, $noreg
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tB %bb.28, 14, $noreg
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bb.15.while.cond:
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renamable $r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBL 14, $noreg, @foo3, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0
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tB %bb.15, 14, $noreg
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bb.29.entry:
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successors: %bb.28(0x1999999a), %bb.26(0x00000000), %bb.24(0x1999999a), %bb.23(0x1999999a), %bb.12(0x1999999a), %bb.22(0x1999999a)
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liveins: $r0, $r2
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renamable $r1, dead $cpsr = tLSLri killed renamable $r2, 2, 14, $noreg
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renamable $r2 = tLEApcrelJT %jump-table.0, 14, $noreg
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renamable $r2 = tLDRr killed renamable $r2, killed renamable $r1, 14, $noreg :: (load 4 from jump-table)
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$r1 = tMOVSr $r0, implicit-def dead $cpsr
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tBR_JTr killed renamable $r2, %jump-table.0
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bb.24.sw.bb98:
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renamable $r1, dead $cpsr = tMOVi8 7, 14, $noreg
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tB %bb.28, 14, $noreg
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bb.2.entry:
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successors: %bb.27(0x2aaaaaab), %bb.3(0x55555555)
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liveins: $r0, $r1, $r4
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tCMPi8 renamable $r1, 10, 14, $noreg, implicit-def $cpsr
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tBcc %bb.27, 0, killed $cpsr
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bb.3.entry:
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successors: %bb.4, %bb.5
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liveins: $r0, $r1
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tCMPi8 renamable $r1, 34, 14, $noreg, implicit-def $cpsr
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tBcc %bb.5, 1, killed $cpsr
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bb.4:
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liveins: $r0
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$r1 = tMOVSr killed $r0, implicit-def dead $cpsr
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tB %bb.28, 14, $noreg
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bb.25.sw.bb106:
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renamable $r1, dead $cpsr = tMOVi8 11, 14, $noreg
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tB %bb.28, 14, $noreg
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bb.23.sw.bb97:
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renamable $r1, dead $cpsr = tMOVi8 8, 14, $noreg
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tB %bb.28, 14, $noreg
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bb.27.sw.bb91:
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liveins: $r4
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renamable $r0, dead $cpsr = tMOVi8 1, 14, $noreg
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tSTRi killed renamable $r0, killed renamable $r4, 0, 14, $noreg :: (store 4 into %ir.ignore_ptr)
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renamable $r1, dead $cpsr = tMOVi8 0, 14, $noreg
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tB %bb.28, 14, $noreg
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bb.21.sw.bb95:
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renamable $r1, dead $cpsr = tMOVi8 13, 14, $noreg
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tB %bb.28, 14, $noreg
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bb.20.sw.bb94:
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renamable $r1, dead $cpsr = tMOVi8 9, 14, $noreg
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tB %bb.28, 14, $noreg
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bb.5.entry:
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liveins: $r0, $r1
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tCMPi8 killed renamable $r1, 39, 14, $noreg, implicit-def $cpsr
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tB %bb.6, 14, $noreg
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bb.11.entry:
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successors: %bb.12(0x80000000), %bb.26(0x00000000)
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liveins: $r0, $r1
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tCMPi8 killed renamable $r1, 69, 14, $noreg, implicit-def $cpsr
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tBcc %bb.26, 1, killed $cpsr
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bb.12.sw.bb107:
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successors: %bb.28(0x7fffffff), %bb.13(0x00000001)
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liveins: $r0
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||
|
|
|
||
|
|
renamable $r1, dead $cpsr = tMOVi8 27, 14, $noreg
|
||
|
|
renamable $r2, dead $cpsr = tMOVi8 0, 14, $noreg
|
||
|
|
tCMPi8 killed renamable $r2, 0, 14, $noreg, implicit-def $cpsr
|
||
|
|
tBcc %bb.28, 1, killed $cpsr
|
||
|
|
|
||
|
|
bb.13.if.then109:
|
||
|
|
successors:
|
||
|
|
liveins: $r0
|
||
|
|
|
||
|
|
$r1 = tMOVSr killed $r0, implicit-def dead $cpsr
|
||
|
|
tBL 14, $noreg, @foo1, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit undef $r0, implicit $r1, implicit-def $sp, implicit-def dead $r0
|
||
|
|
|
||
|
|
bb.8.entry:
|
||
|
|
liveins: $r0, $r1
|
||
|
|
|
||
|
|
tCMPi8 killed renamable $r1, 63, 14, $noreg, implicit-def $cpsr
|
||
|
|
|
||
|
|
bb.6.entry:
|
||
|
|
successors: %bb.28(0x80000000), %bb.26(0x00000000)
|
||
|
|
liveins: $cpsr, $r0
|
||
|
|
|
||
|
|
tPUSH 14, $noreg, killed $r0, implicit-def $sp, implicit $sp
|
||
|
|
tPOP 14, $noreg, def $r1, implicit-def $sp, implicit $sp
|
||
|
|
tBcc %bb.28, 0, killed $cpsr
|
||
|
|
|
||
|
|
bb.26.sw.epilog:
|
||
|
|
successors:
|
||
|
|
|
||
|
|
|
||
|
|
bb.22.sw.bb96:
|
||
|
|
renamable $r1, dead $cpsr = tMOVi8 12, 14, $noreg
|
||
|
|
|
||
|
|
bb.28.cleanup:
|
||
|
|
liveins: $r1
|
||
|
|
|
||
|
|
$r0 = tMOVSr killed $r1, implicit-def dead $cpsr
|
||
|
|
tPOP_RET 14, $noreg, def $r4, def $pc, implicit-def $sp, implicit $sp, implicit $r0
|
||
|
|
|
||
|
|
bb.18.while.end88:
|
||
|
|
liveins: $r0
|
||
|
|
|
||
|
|
tBL 14, $noreg, @foo2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit-def $sp, implicit-def dead $r0
|
||
|
|
|
||
|
|
...
|