248 lines
11 KiB
LLVM
248 lines
11 KiB
LLVM
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; RUN: opt -mtriple=armv7 -mcpu=cortex-a57 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-A
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; RUN: opt -mtriple=thumbv7 -mcpu=cortex-a57 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-A
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; RUN: opt -mtriple=thumbv7 -mcpu=cortex-a72 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-A
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; RUN: opt -mtriple=thumbv8m -mcpu=cortex-m23 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T1
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; RUN: opt -mtriple=thumbv8m.main -mcpu=cortex-m33 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T2
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; RUN: opt -mtriple=thumbv7em -mcpu=cortex-m7 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-T2
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; CHECK-LABEL: partial
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define arm_aapcs_vfpcc void @partial(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B) local_unnamed_addr #0 {
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entry:
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br label %for.body
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; CHECK-LABEL: for.body
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for.body:
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; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV2:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-A: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-A: [[IV2]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL-A: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV2]], 1024
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; CHECK-UNROLL-A: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body
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; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-T1: [[IV1]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-T1: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV1]], 1024
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; CHECK-UNROLL-T1: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body
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; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV16:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL-T2: [[IV4:%[a-z.0-9]+]] = add nuw nsw i32 [[IV3]], 1
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; CHECK-UNROLL-T2: [[IV5:%[a-z.0-9]+]] = add nuw nsw i32 [[IV4]], 1
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; CHECK-UNROLL-T2: [[IV6:%[a-z.0-9]+]] = add nuw nsw i32 [[IV5]], 1
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; CHECK-UNROLL-T2: [[IV7:%[a-z.0-9]+]] = add nuw nsw i32 [[IV6]], 1
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; CHECK-UNROLL-T2: [[IV8:%[a-z.0-9]+]] = add nuw nsw i32 [[IV7]], 1
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; CHECK-UNROLL-T2: [[IV9:%[a-z.0-9]+]] = add nuw nsw i32 [[IV8]], 1
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; CHECK-UNROLL-T2: [[IV10:%[a-z.0-9]+]] = add nuw nsw i32 [[IV9]], 1
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; CHECK-UNROLL-T2: [[IV11:%[a-z.0-9]+]] = add nuw nsw i32 [[IV10]], 1
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; CHECK-UNROLL-T2: [[IV12:%[a-z.0-9]+]] = add nuw nsw i32 [[IV11]], 1
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; CHECK-UNROLL-T2: [[IV13:%[a-z.0-9]+]] = add nuw nsw i32 [[IV12]], 1
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; CHECK-UNROLL-T2: [[IV14:%[a-z.0-9]+]] = add nuw nsw i32 [[IV13]], 1
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; CHECK-UNROLL-T2: [[IV15:%[a-z.0-9]+]] = add nuw nsw i32 [[IV14]], 1
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; CHECK-UNROLL-T2: [[IV16]] = add nuw nsw i32 [[IV15]], 1
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; CHECK-UNROLL-T2: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV16]], 1024
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; CHECK-UNROLL-T2: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body
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%i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.08
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%1 = load i32, i32* %arrayidx1, align 4
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%mul = mul nsw i32 %1, %0
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.08
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store i32 %mul, i32* %arrayidx2, align 4
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, 1024
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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for.cond.cleanup:
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ret void
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}
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; CHECK-LABEL: runtime
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define arm_aapcs_vfpcc void @runtime(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B, i32 %N) local_unnamed_addr #0 {
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entry:
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%cmp8 = icmp eq i32 %N, 0
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br i1 %cmp8, label %for.cond.cleanup, label %for.body
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; CHECK-LABEL: for.body
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for.body:
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; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV2:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-A: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-A: [[IV2]] = add nuw i32 [[IV1]], 1
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; CHECK-UNROLL-A: br
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; CHECK-UNROLL-T1: %i.09 = phi i32 [ %inc, %for.body ], [ 0
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; CHECK-UNROLL-T1: %inc = add nuw i32 %i.09, 1
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; CHECK-UNROLL-T1: %exitcond = icmp eq i32 %inc, %N
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; CHECK-UNROLL-T1: br
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; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV4:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL-T2: [[IV4]] = add nuw i32 [[IV3]], 1
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; CHECK-UNROLL-T2: br
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; CHECK-UNROLL-T2: for.body.epil:
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; CHECK-UNROLL-T2: for.body.epil.1:
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; CHECK-UNROLL-T2: for.body.epil.2:
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%i.09 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.09
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.09
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%1 = load i32, i32* %arrayidx1, align 4
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%mul = mul nsw i32 %1, %0
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.09
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store i32 %mul, i32* %arrayidx2, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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for.cond.cleanup:
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ret void
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}
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; CHECK-LABEL: nested_runtime
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define arm_aapcs_vfpcc void @nested_runtime(i32* nocapture %C, i16* nocapture readonly %A, i16* nocapture readonly %B, i32 %N) local_unnamed_addr #0 {
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entry:
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%cmp25 = icmp eq i32 %N, 0
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br i1 %cmp25, label %for.cond.cleanup, label %for.body4.lr.ph
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for.body4.lr.ph:
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%h.026 = phi i32 [ %inc11, %for.cond.cleanup3 ], [ 0, %entry ]
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%mul = mul i32 %h.026, %N
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br label %for.body4
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for.cond.cleanup:
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ret void
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for.cond.cleanup3:
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%inc11 = add nuw i32 %h.026, 1
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%exitcond27 = icmp eq i32 %inc11, %N
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br i1 %exitcond27, label %for.cond.cleanup, label %for.body4.lr.ph
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; CHECK-LABEL: for.body4
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for.body4:
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; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV1:%[a-z.0-9]+]], %for.body4 ]
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; CHECK-UNROLL-T1: [[IV1]] = add nuw i32 [[IV0]], 1
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; CHECK-UNROLL-T1: br
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; CHECK-UNROLL-T2: for.body4.epil:
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; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV4:%[a-z.0-9]+]], %for.body4 ]
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; CHECK-UNROLL-T2: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-T2: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL-T2: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL-T2: [[IV4]] = add nuw i32 [[IV3]], 1
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; CHECK-UNROLL-T2: br
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; CHECK-UNROLL-T2: for.body4.epil.1:
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; CHECK-UNROLL-T2: for.body4.epil.2:
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%w.024 = phi i32 [ 0, %for.body4.lr.ph ], [ %inc, %for.body4 ]
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%add = add i32 %w.024, %mul
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%arrayidx = getelementptr inbounds i16, i16* %A, i32 %add
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%0 = load i16, i16* %arrayidx, align 2
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%conv = sext i16 %0 to i32
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%arrayidx5 = getelementptr inbounds i16, i16* %B, i32 %w.024
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%1 = load i16, i16* %arrayidx5, align 2
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%conv6 = sext i16 %1 to i32
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%mul7 = mul nsw i32 %conv6, %conv
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%arrayidx8 = getelementptr inbounds i32, i32* %C, i32 %w.024
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%2 = load i32, i32* %arrayidx8, align 4
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%add9 = add nsw i32 %mul7, %2
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store i32 %add9, i32* %arrayidx8, align 4
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%inc = add nuw i32 %w.024, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %for.cond.cleanup3, label %for.body4
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}
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; CHECK-LABEL: loop_call
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define arm_aapcs_vfpcc void @loop_call(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B) local_unnamed_addr #1 {
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entry:
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br label %for.body
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for.cond.cleanup:
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ret void
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; CHECK-LABEL: for.body
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for.body:
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; CHECK-UNROLL-A: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-A: [[IV1]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-A: icmp eq i32 [[IV1]], 1024
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; CHECK-UNROLL-A: br
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; CHECK-UNROLL-T1: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-T1: [[IV1]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-T1: icmp eq i32 [[IV1]], 1024
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; CHECK-UNROLL-T1: br
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; CHECK-UNROLL-T2: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-T2: [[IV1]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-T2: icmp eq i32 [[IV1]], 1024
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; CHECK-UNROLL-T2: br
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%i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.08
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%1 = load i32, i32* %arrayidx1, align 4
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%call = tail call arm_aapcs_vfpcc i32 @some_func(i32 %0, i32 %1) #3
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.08
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store i32 %call, i32* %arrayidx2, align 4
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, 1024
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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; CHECK-LABEL: iterate_inc
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; CHECK-UNROLL-A: %n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ]
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; CHECK-UNROLL-A: %tobool = icmp eq %struct.Node* %1, null
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; CHECK-UNROLL-A: br i1 %tobool
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; CHECK-UNROLL-A-NOT: load
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; CHECK-UNROLL-T1: %n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ]
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; CHECK-UNROLL-T1: %tobool = icmp eq %struct.Node* %1, null
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; CHECK-UNROLL-T1: br i1 %tobool
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; CHECK-UNROLL-T1-NOT: load
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; CHECK-UNROLL-T2: [[CMP0:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR0:%[a-z.0-9]+]], null
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; CHECK-UNROLL-T2: br i1 [[CMP0]], label [[END:%[a-z.0-9]+]]
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; CHECK-UNROLL-T2: [[CMP1:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR1:%[a-z.0-9]+]], null
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; CHECK-UNROLL-T2: br i1 [[CMP1]], label [[END]]
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; CHECK-UNROLL-T2: [[CMP2:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR2:%[a-z.0-9]+]], null
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; CHECK-UNROLL-T2: br i1 [[CMP2]], label [[END]]
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; CHECK-UNROLL-T2: [[CMP3:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR3:%[a-z.0-9]+]], null
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; CHECK-UNROLL-T2: br i1 [[CMP3]], label [[END]]
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; CHECK-UNROLL-T2: [[CMP4:%[a-z.0-9]+]] = icmp eq %struct.Node* [[VAR4:%[a-z.0-9]+]], null
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; CHECK-UNROLL-T2: br i1 [[CMP4]], label [[END]]
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; CHECK-UNROLL-T2-NOT: load
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%struct.Node = type { %struct.Node*, i32 }
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define arm_aapcscc void @iterate_inc(%struct.Node* %n) local_unnamed_addr #0 {
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entry:
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%tobool3 = icmp eq %struct.Node* %n, null
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br i1 %tobool3, label %while.end, label %while.body.preheader
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while.body.preheader:
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br label %while.body
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while.body:
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%n.addr.04 = phi %struct.Node* [ %1, %while.body ], [ %n, %while.body.preheader ]
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%val = getelementptr inbounds %struct.Node, %struct.Node* %n.addr.04, i32 0, i32 1
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%0 = load i32, i32* %val, align 4
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%add = add nsw i32 %0, 1
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store i32 %add, i32* %val, align 4
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%next = getelementptr inbounds %struct.Node, %struct.Node* %n.addr.04, i32 0, i32 0
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%1 = load %struct.Node*, %struct.Node** %next, align 4
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%tobool = icmp eq %struct.Node* %1, null
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br i1 %tobool, label %while.end, label %while.body
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while.end:
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ret void
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}
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declare arm_aapcs_vfpcc i32 @some_func(i32, i32) local_unnamed_addr #2
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