105 lines
4.8 KiB
LLVM
105 lines
4.8 KiB
LLVM
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; RUN: opt < %s -S -passes=msan 2>&1 | FileCheck %s
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; RUN: opt < %s -msan -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-linux-gnu"
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%struct.__va_list = type { i8*, i8*, i8*, i32, i32 }
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define i32 @foo(i32 %guard, ...) {
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%vl = alloca %struct.__va_list, align 8
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%1 = bitcast %struct.__va_list* %vl to i8*
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call void @llvm.lifetime.start.p0i8(i64 32, i8* %1)
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call void @llvm.va_start(i8* %1)
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call void @llvm.va_end(i8* %1)
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call void @llvm.lifetime.end.p0i8(i64 32, i8* %1)
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ret i32 0
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}
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; First check if the variadic shadow values are saved in stack with correct
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; size (192 is total of general purpose registers size, 64, plus total of
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; floating-point registers size, 128).
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; CHECK-LABEL: @foo
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; CHECK: [[A:%.*]] = load {{.*}} @__msan_va_arg_overflow_size_tls
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; CHECK: [[B:%.*]] = add i64 192, [[A]]
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; CHECK: alloca {{.*}} [[B]]
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; We expect three memcpy operations: one for the general purpose registers,
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; one for floating-point/SIMD ones, and one for thre remaining arguments.
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; Propagate the GR shadow values on for the va_list::__gp_top, adjust the
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; offset in the __msan_va_arg_tls based on va_list:__gp_off, and finally
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; issue the memcpy.
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; CHECK: [[GRP:%.*]] = getelementptr inbounds i8, i8* {{%.*}}, i64 {{%.*}}
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; CHECK: [[GRSIZE:%.*]] = sub i64 64, {{%.*}}
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 {{%.*}}, i8* align 8 [[GRP]], i64 [[GRSIZE]], i1 false)
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; Propagate the VR shadow values on for the va_list::__vr_top, adjust the
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; offset in the __msan_va_arg_tls based on va_list:__vr_off, and finally
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; issue the memcpy.
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; CHECK: [[VRP:%.*]] = getelementptr inbounds i8, i8* {{%.*}}, i64 {{%.*}}
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; CHECK: [[VRSIZE:%.*]] = sub i64 128, {{%.*}}
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 {{%.*}}, i8* align 8 [[VRP]], i64 [[VRSIZE]], i1 false)
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; Copy the remaining shadow values on the va_list::__stack position (it is
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; on the constant offset of 192 from __msan_va_arg_tls).
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; CHECK: [[STACK:%.*]] = getelementptr inbounds i8, i8* {{%.*}}, i32 192
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; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 {{%.*}}, i8* align 16 [[STACK]], i64 {{%.*}}, i1 false)
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1
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declare void @llvm.va_start(i8*) #2
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declare void @llvm.va_end(i8*) #2
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
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define i32 @bar() {
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%1 = call i32 (i32, ...) @foo(i32 0, i32 1, i32 2, double 3.000000e+00,
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double 4.000000e+00, i32 5, i32 6,
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double 7.000000e+00, i32 8, i32 9, i32 10, i32 11)
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ret i32 %1
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}
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; Save the incoming shadow value from the arguments in the __msan_va_arg_tls
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; array. General purpose registers are saved at positions from 0 to 64, Floating
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; point and SIMD are saved from 64 to 192, and the remaining from 192.
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; CHECK-LABEL: @bar
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 8
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 16
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 64
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 80
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 24
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 32
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 96
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 40
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 48
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 56
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; CHECK: store {{.*}} @__msan_va_arg_tls {{.*}} 192
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; CHECK: store {{.*}} 8, {{.*}} @__msan_va_arg_overflow_size_tls
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; Test that MSan doesn't generate code overflowing __msan_va_arg_tls when too many arguments are
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; passed to a variadic function.
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define dso_local i64 @many_args() {
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entry:
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%ret = call i64 (i64, ...) @sum(i64 120,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1,
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i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1
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)
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ret i64 %ret
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}
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; If the size of __msan_va_arg_tls changes the second argument of `add` must also be changed.
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; CHECK: i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 792)
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; CHECK-NOT: i64 add (i64 ptrtoint ([100 x i64]* @__msan_va_arg_tls to i64), i64 800)
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declare i64 @sum(i64 %n, ...)
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