525 lines
16 KiB
LLVM
525 lines
16 KiB
LLVM
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; Test that floating-point strict compares are omitted if CC already has the
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; right value.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
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; RUN: -enable-misched=0 -no-integrated-as | FileCheck %s
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;
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; We need -enable-misched=0 to make sure f12 and following routines really
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; test the compare elimination pass.
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declare float @llvm.fabs.f32(float %f)
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; Test addition followed by EQ, which can use the CC result of the addition.
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define float @f1(float %a, float %b, float *%dest) #0 {
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; CHECK-LABEL: f1:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: ber %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.experimental.constrained.fadd.f32(
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float %a, float %b,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"oeq",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; ...and again with LT.
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define float @f2(float %a, float %b, float *%dest) #0 {
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; CHECK-LABEL: f2:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.experimental.constrained.fadd.f32(
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float %a, float %b,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"olt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; ...and again with GT.
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define float @f3(float %a, float %b, float *%dest) #0 {
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; CHECK-LABEL: f3:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: bhr %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.experimental.constrained.fadd.f32(
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float %a, float %b,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"ogt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; ...and again with UEQ.
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define float @f4(float %a, float %b, float *%dest) #0 {
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; CHECK-LABEL: f4:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: bnlhr %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.experimental.constrained.fadd.f32(
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float %a, float %b,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"ueq",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Subtraction also provides a zero-based CC value.
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define float @f5(float %a, float %b, float *%dest) #0 {
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; CHECK-LABEL: f5:
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; CHECK: seb %f0, 0(%r2)
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; CHECK-NEXT: bnher %r14
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; CHECK: br %r14
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entry:
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%cur = load float, float *%dest
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%res = call float @llvm.experimental.constrained.fsub.f32(
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float %a, float %cur,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"ult",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD POSITIVE. We cannot omit the LTEBR.
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define float @f6(float %dummy, float %a, float *%dest) #0 {
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; CHECK-LABEL: f6:
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; CHECK: lpdfr %f0, %f2
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; CHECK-NEXT: ltebr %f0, %f0
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; CHECK-NEXT: bhr %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.fabs.f32(float %a) #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"ogt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD NEGATIVE. We cannot omit the LTEBR.
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define float @f7(float %dummy, float %a, float *%dest) #0 {
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; CHECK-LABEL: f7:
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; CHECK: lndfr %f0, %f2
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; CHECK-NEXT: ltebr %f0, %f0
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%abs = call float @llvm.fabs.f32(float %a) #0
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%res = fneg float %abs
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"olt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test the result of LOAD COMPLEMENT. We cannot omit the LTEBR.
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define float @f8(float %dummy, float %a, float *%dest) #0 {
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; CHECK-LABEL: f8:
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; CHECK: lcdfr %f0, %f2
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; CHECK-NEXT: ltebr %f0, %f0
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; CHECK-NEXT: bler %r14
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; CHECK: br %r14
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entry:
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%res = fneg float %a
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"ole",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %res, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Multiplication (for example) does not modify CC.
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define float @f9(float %a, float %b, float *%dest) #0 {
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; CHECK-LABEL: f9:
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; CHECK: meebr %f0, %f2
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; CHECK-NEXT: ltebr %f0, %f0
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; CHECK-NEXT: blhr %r14
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; CHECK: br %r14
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entry:
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%res = call float @llvm.experimental.constrained.fmul.f32(
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float %a, float %b,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"one",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test a combination involving a CC-setting instruction followed by
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; a non-CC-setting instruction.
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define float @f10(float %a, float %b, float %c, float *%dest) #0 {
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; CHECK-LABEL: f10:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: debr %f0, %f4
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; CHECK-NEXT: ltebr %f0, %f0
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; CHECK-NEXT: bner %r14
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; CHECK: br %r14
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entry:
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%add = call float @llvm.experimental.constrained.fadd.f32(
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float %a, float %b,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%res = call float @llvm.experimental.constrained.fdiv.f32(
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float %add, float %c,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %res, float 0.0,
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metadata !"une",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %b, float *%dest
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br label %exit
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exit:
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ret float %res
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}
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; Test a case where CC is set based on a different register from the
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; compare input.
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define float @f11(float %a, float %b, float %c, float *%dest1, float *%dest2) #0 {
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; CHECK-LABEL: f11:
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; CHECK: aebr %f0, %f2
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; CHECK-NEXT: sebr %f4, %f0
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; CHECK-DAG: ste %f4, 0(%r2)
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; CHECK-DAG: ltebr %f0, %f0
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; CHECK-NEXT: ber %r14
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; CHECK: br %r14
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entry:
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%add = call float @llvm.experimental.constrained.fadd.f32(
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float %a, float %b,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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%sub = call float @llvm.experimental.constrained.fsub.f32(
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float %c, float %add,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") #0
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store float %sub, float *%dest1
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %add, float 0.0,
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metadata !"oeq",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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store float %sub, float *%dest2
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br label %exit
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exit:
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ret float %add
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}
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; Test that LER gets converted to LTEBR where useful.
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define float @f12(float %dummy, float %val) #0 {
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; CHECK-LABEL: f12:
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; CHECK: ltebr %f0, %f2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%ret = call float asm "blah $1", "=f,{f0}"(float %val) #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
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float %val, float 0.0,
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metadata !"olt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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call void asm sideeffect "blah", ""() #0
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br label %exit
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exit:
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ret float %ret
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}
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; Test that LDR gets converted to LTDBR where useful.
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define double @f13(double %dummy, double %val) #0 {
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; CHECK-LABEL: f13:
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; CHECK: ltdbr %f0, %f2
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; CHECK-NEXT: #APP
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; CHECK-NEXT: blah %f0
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%ret = call double asm "blah $1", "=f,{f0}"(double %val) #0
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f64(
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double %val, double 0.0,
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metadata !"olt",
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metadata !"fpexcept.strict") #0
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br i1 %cmp, label %exit, label %store
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store:
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call void asm sideeffect "blah", ""() #0
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br label %exit
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exit:
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ret double %ret
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}
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; Test that LXR gets converted to LTXBR where useful.
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define void @f14(fp128 *%ptr1, fp128 *%ptr2) #0 {
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; CHECK-LABEL: f14:
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; CHECK: ltxbr
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; CHECK-NEXT: dxbr
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; CHECK-NEXT: std
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; CHECK-NEXT: std
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; CHECK-NEXT: mxbr
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; CHECK-NEXT: std
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; CHECK-NEXT: std
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; CHECK-NEXT: blr %r14
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; CHECK: br %r14
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entry:
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%val1 = load fp128, fp128 *%ptr1
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%val2 = load fp128, fp128 *%ptr2
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%div = fdiv fp128 %val1, %val2
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store fp128 %div, fp128 *%ptr1
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%mul = fmul fp128 %val1, %val2
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store fp128 %mul, fp128 *%ptr2
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%cmp = call i1 @llvm.experimental.constrained.fcmp.f128(
|
||
|
|
fp128 %val1, fp128 0xL00000000000000000000000000000000,
|
||
|
|
metadata !"olt",
|
||
|
|
metadata !"fpexcept.strict") #0
|
||
|
|
br i1 %cmp, label %exit, label %store
|
||
|
|
|
||
|
|
store:
|
||
|
|
call void asm sideeffect "blah", ""() #0
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; Test a case where it is the source rather than destination of LER that
|
||
|
|
; we need.
|
||
|
|
define float @f15(float %val, float %dummy) #0 {
|
||
|
|
; CHECK-LABEL: f15:
|
||
|
|
; CHECK: ltebr %f2, %f0
|
||
|
|
; CHECK-NEXT: #APP
|
||
|
|
; CHECK-NEXT: blah %f2
|
||
|
|
; CHECK-NEXT: #NO_APP
|
||
|
|
; CHECK-NEXT: blr %r14
|
||
|
|
; CHECK: br %r14
|
||
|
|
entry:
|
||
|
|
%ret = call float asm "blah $1", "=f,{f2}"(float %val) #0
|
||
|
|
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
|
||
|
|
float %val, float 0.0,
|
||
|
|
metadata !"olt",
|
||
|
|
metadata !"fpexcept.strict") #0
|
||
|
|
br i1 %cmp, label %exit, label %store
|
||
|
|
|
||
|
|
store:
|
||
|
|
call void asm sideeffect "blah", ""() #0
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
ret float %ret
|
||
|
|
}
|
||
|
|
|
||
|
|
; Test a case where it is the source rather than destination of LDR that
|
||
|
|
; we need.
|
||
|
|
define double @f16(double %val, double %dummy) #0 {
|
||
|
|
; CHECK-LABEL: f16:
|
||
|
|
; CHECK: ltdbr %f2, %f0
|
||
|
|
; CHECK-NEXT: #APP
|
||
|
|
; CHECK-NEXT: blah %f2
|
||
|
|
; CHECK-NEXT: #NO_APP
|
||
|
|
; CHECK-NEXT: blr %r14
|
||
|
|
; CHECK: br %r14
|
||
|
|
entry:
|
||
|
|
%ret = call double asm "blah $1", "=f,{f2}"(double %val) #0
|
||
|
|
%cmp = call i1 @llvm.experimental.constrained.fcmp.f64(
|
||
|
|
double %val, double 0.0,
|
||
|
|
metadata !"olt",
|
||
|
|
metadata !"fpexcept.strict") #0
|
||
|
|
br i1 %cmp, label %exit, label %store
|
||
|
|
|
||
|
|
store:
|
||
|
|
call void asm sideeffect "blah", ""() #0
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
ret double %ret
|
||
|
|
}
|
||
|
|
|
||
|
|
; Repeat f2 with a comparison against -0.
|
||
|
|
define float @f17(float %a, float %b, float *%dest) #0 {
|
||
|
|
; CHECK-LABEL: f17:
|
||
|
|
; CHECK: aebr %f0, %f2
|
||
|
|
; CHECK-NEXT: blr %r14
|
||
|
|
; CHECK: br %r14
|
||
|
|
entry:
|
||
|
|
%res = call float @llvm.experimental.constrained.fadd.f32(
|
||
|
|
float %a, float %b,
|
||
|
|
metadata !"round.dynamic",
|
||
|
|
metadata !"fpexcept.strict") #0
|
||
|
|
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
|
||
|
|
float %res, float -0.0,
|
||
|
|
metadata !"olt",
|
||
|
|
metadata !"fpexcept.strict") #0
|
||
|
|
br i1 %cmp, label %exit, label %store
|
||
|
|
|
||
|
|
store:
|
||
|
|
store float %b, float *%dest
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
ret float %res
|
||
|
|
}
|
||
|
|
|
||
|
|
; Verify that we cannot omit the compare if there may be an intervening
|
||
|
|
; change to the exception flags.
|
||
|
|
define float @f18(float %a, float %b, float *%dest) #0 {
|
||
|
|
; CHECK-LABEL: f18:
|
||
|
|
; CHECK: aebr %f0, %f2
|
||
|
|
; CHECK: ltebr %f0, %f0
|
||
|
|
; CHECK-NEXT: ber %r14
|
||
|
|
; CHECK: br %r14
|
||
|
|
entry:
|
||
|
|
%res = call float @llvm.experimental.constrained.fadd.f32(
|
||
|
|
float %a, float %b,
|
||
|
|
metadata !"round.dynamic",
|
||
|
|
metadata !"fpexcept.strict") #0
|
||
|
|
call void asm sideeffect "blah", ""() #0
|
||
|
|
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
|
||
|
|
float %res, float 0.0,
|
||
|
|
metadata !"oeq",
|
||
|
|
metadata !"fpexcept.strict") #0
|
||
|
|
br i1 %cmp, label %exit, label %store
|
||
|
|
|
||
|
|
store:
|
||
|
|
store float %b, float *%dest
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
ret float %res
|
||
|
|
}
|
||
|
|
|
||
|
|
; Verify that we cannot convert LER to LTEBR and omit the compare if
|
||
|
|
; there may be an intervening change to the exception flags.
|
||
|
|
define float @f19(float %dummy, float %val) #0 {
|
||
|
|
; CHECK-LABEL: f19:
|
||
|
|
; CHECK: ler %f0, %f2
|
||
|
|
; CHECK-NEXT: #APP
|
||
|
|
; CHECK-NEXT: blah %f0
|
||
|
|
; CHECK-NEXT: #NO_APP
|
||
|
|
; CHECK-NEXT: ltebr %f2, %f2
|
||
|
|
; CHECK-NEXT: blr %r14
|
||
|
|
; CHECK: br %r14
|
||
|
|
entry:
|
||
|
|
%ret = call float asm sideeffect "blah $1", "=f,{f0}"(float %val) #0
|
||
|
|
%cmp = call i1 @llvm.experimental.constrained.fcmp.f32(
|
||
|
|
float %val, float 0.0,
|
||
|
|
metadata !"olt",
|
||
|
|
metadata !"fpexcept.strict") #0
|
||
|
|
br i1 %cmp, label %exit, label %store
|
||
|
|
|
||
|
|
store:
|
||
|
|
call void asm sideeffect "blah", ""() #0
|
||
|
|
br label %exit
|
||
|
|
|
||
|
|
exit:
|
||
|
|
ret float %ret
|
||
|
|
}
|
||
|
|
|
||
|
|
attributes #0 = { strictfp }
|
||
|
|
|
||
|
|
declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
|
||
|
|
declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata)
|
||
|
|
declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata)
|
||
|
|
declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata)
|
||
|
|
declare i1 @llvm.experimental.constrained.fcmp.f32(float, float, metadata, metadata)
|
||
|
|
declare i1 @llvm.experimental.constrained.fcmp.f64(double, double, metadata, metadata)
|
||
|
|
declare i1 @llvm.experimental.constrained.fcmp.f128(fp128, fp128, metadata, metadata)
|