307 lines
14 KiB
LLVM
307 lines
14 KiB
LLVM
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefixes=ALL,THRPTALL,CIFASTF64,NOFP16 %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri < %s | FileCheck -check-prefixes=ALL,THRPTALL,CISLOWF64,NOFP16 %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=ALL,THRPTALL,SIFASTF64,NOFP16 %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-mesa-mesa3d -mcpu=verde < %s | FileCheck -check-prefixes=ALL,THRPTALL,SISLOWF64,NOFP16 %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=ALL,THRPTALL,FP16,CISLOWF64 %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefixes=ALL,SIZEALL,SIZECI,SIZENOF16 %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri < %s | FileCheck -check-prefixes=ALL,SIZEALL,SIZECI,SIZENOF16 %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti < %s | FileCheck -check-prefixes=ALL,SIZEALL,SIZESI,SIZENOF16 %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-mesa-mesa3d -mcpu=verde < %s | FileCheck -check-prefixes=ALL,SIZEALL,SIZESI,SIZENOF16 %s
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; RUN: opt -cost-model -cost-kind=code-size -analyze -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=ALL,SIZEALL,SIZECI,SIZEF16 %s
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; ALL-LABEL: 'fdiv_f32_ieee'
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; THRPTALL: estimated cost of 14 for {{.*}} fdiv float
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; SIZEALL: estimated cost of 12 for {{.*}} fdiv float
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define amdgpu_kernel void @fdiv_f32_ieee(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
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%vec = load float, float addrspace(1)* %vaddr
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%add = fdiv float %vec, %b
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store float %add, float addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_f32_ftzdaz'
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; THRPTALL: estimated cost of 16 for {{.*}} fdiv float
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; SIZEALL: estimated cost of 14 for {{.*}} fdiv float
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define amdgpu_kernel void @fdiv_f32_ftzdaz(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #1 {
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%vec = load float, float addrspace(1)* %vaddr
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%add = fdiv float %vec, %b
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store float %add, float addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v2f32_ieee'
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; THRPTALL: estimated cost of 28 for {{.*}} fdiv <2 x float>
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; SIZEALL: estimated cost of 24 for {{.*}} fdiv <2 x float>
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define amdgpu_kernel void @fdiv_v2f32_ieee(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #0 {
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%vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
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%add = fdiv <2 x float> %vec, %b
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store <2 x float> %add, <2 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v2f32_ftzdaz'
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; THRPTALL: estimated cost of 32 for {{.*}} fdiv <2 x float>
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; SIZEALL: estimated cost of 28 for {{.*}} fdiv <2 x float>
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define amdgpu_kernel void @fdiv_v2f32_ftzdaz(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #1 {
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%vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
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%add = fdiv <2 x float> %vec, %b
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store <2 x float> %add, <2 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v3f32_ieee'
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; THRPTALL: estimated cost of 42 for {{.*}} fdiv <3 x float>
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; SIZEALL: estimated cost of 36 for {{.*}} fdiv <3 x float>
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define amdgpu_kernel void @fdiv_v3f32_ieee(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #0 {
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%vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
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%add = fdiv <3 x float> %vec, %b
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store <3 x float> %add, <3 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v3f32_ftzdaz'
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; THRPTALL: estimated cost of 48 for {{.*}} fdiv <3 x float>
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; SIZEALL: estimated cost of 42 for {{.*}} fdiv <3 x float>
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define amdgpu_kernel void @fdiv_v3f32_ftzdaz(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #1 {
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%vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
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%add = fdiv <3 x float> %vec, %b
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store <3 x float> %add, <3 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v5f32_ieee'
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; THRPTALL: estimated cost of 70 for {{.*}} fdiv <5 x float>
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; SIZEALL: estimated cost of 60 for {{.*}} fdiv <5 x float>
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define amdgpu_kernel void @fdiv_v5f32_ieee(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr, <5 x float> %b) #0 {
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%vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
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%add = fdiv <5 x float> %vec, %b
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store <5 x float> %add, <5 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v5f32_ftzdaz'
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; THRPTALL: estimated cost of 80 for {{.*}} fdiv <5 x float>
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; SIZEALL: estimated cost of 70 for {{.*}} fdiv <5 x float>
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define amdgpu_kernel void @fdiv_v5f32_ftzdaz(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr, <5 x float> %b) #1 {
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%vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
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%add = fdiv <5 x float> %vec, %b
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store <5 x float> %add, <5 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_f64'
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; CIFASTF64: estimated cost of 24 for {{.*}} fdiv double
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; CISLOWF64: estimated cost of 38 for {{.*}} fdiv double
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; SIFASTF64: estimated cost of 27 for {{.*}} fdiv double
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; SISLOWF64: estimated cost of 41 for {{.*}} fdiv double
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; SIZECI: estimated cost of 22 for {{.*}} fdiv double
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; SIZESI: estimated cost of 25 for {{.*}} fdiv double
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define amdgpu_kernel void @fdiv_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
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%vec = load double, double addrspace(1)* %vaddr
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%add = fdiv double %vec, %b
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store double %add, double addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v2f64'
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; CIFASTF64: estimated cost of 48 for {{.*}} fdiv <2 x double>
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; CISLOWF64: estimated cost of 76 for {{.*}} fdiv <2 x double>
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; SIFASTF64: estimated cost of 54 for {{.*}} fdiv <2 x double>
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; SISLOWF64: estimated cost of 82 for {{.*}} fdiv <2 x double>
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; SIZECI: estimated cost of 44 for {{.*}} fdiv <2 x double>
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; SIZESI: estimated cost of 50 for {{.*}} fdiv <2 x double>
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define amdgpu_kernel void @fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x double> %b) #0 {
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%vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
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%add = fdiv <2 x double> %vec, %b
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store <2 x double> %add, <2 x double> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v3f64'
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; CIFASTF64: estimated cost of 72 for {{.*}} fdiv <3 x double>
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; CISLOWF64: estimated cost of 114 for {{.*}} fdiv <3 x double>
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; SIFASTF64: estimated cost of 81 for {{.*}} fdiv <3 x double>
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; SISLOWF64: estimated cost of 123 for {{.*}} fdiv <3 x double>
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; SIZECI: estimated cost of 66 for {{.*}} fdiv <3 x double>
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; SIZESI: estimated cost of 75 for {{.*}} fdiv <3 x double>
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define amdgpu_kernel void @fdiv_v3f64(<3 x double> addrspace(1)* %out, <3 x double> addrspace(1)* %vaddr, <3 x double> %b) #0 {
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%vec = load <3 x double>, <3 x double> addrspace(1)* %vaddr
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%add = fdiv <3 x double> %vec, %b
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store <3 x double> %add, <3 x double> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_f16_f32_ieee'
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; NOFP16: estimated cost of 14 for {{.*}} fdiv half
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; FP16: estimated cost of 12 for {{.*}} fdiv half
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; SIZENOF16: estimated cost of 12 for {{.*}} fdiv half
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; SIZEF16: estimated cost of 8 for {{.*}} fdiv half
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define amdgpu_kernel void @fdiv_f16_f32_ieee(half addrspace(1)* %out, half addrspace(1)* %vaddr, half %b) #0 {
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%vec = load half, half addrspace(1)* %vaddr
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%add = fdiv half %vec, %b
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store half %add, half addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_f16_f32_ftzdaz'
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; NOFP16: estimated cost of 16 for {{.*}} fdiv half
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; FP16: estimated cost of 12 for {{.*}} fdiv half
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; SIZENOF16: estimated cost of 14 for {{.*}} fdiv half
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; SIZEF16: estimated cost of 8 for {{.*}} fdiv half
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define amdgpu_kernel void @fdiv_f16_f32_ftzdaz(half addrspace(1)* %out, half addrspace(1)* %vaddr, half %b) #1 {
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%vec = load half, half addrspace(1)* %vaddr
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%add = fdiv half %vec, %b
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store half %add, half addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v2f16_f32_ieee'
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; NOFP16: estimated cost of 28 for {{.*}} fdiv <2 x half>
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; FP16: estimated cost of 24 for {{.*}} fdiv <2 x half>
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; SIZENOF16: estimated cost of 24 for {{.*}} fdiv <2 x half>
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; SIZEF16: estimated cost of 16 for {{.*}} fdiv <2 x half>
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define amdgpu_kernel void @fdiv_v2f16_f32_ieee(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr, <2 x half> %b) #0 {
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%vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
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%add = fdiv <2 x half> %vec, %b
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store <2 x half> %add, <2 x half> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v2f16_f32_ftzdaz'
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; NOFP16: estimated cost of 32 for {{.*}} fdiv <2 x half>
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; FP16: estimated cost of 24 for {{.*}} fdiv <2 x half>
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; SIZENOF16: estimated cost of 28 for {{.*}} fdiv <2 x half>
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; SIZEF16: estimated cost of 16 for {{.*}} fdiv <2 x half>
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define amdgpu_kernel void @fdiv_v2f16_f32_ftzdaz(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr, <2 x half> %b) #1 {
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%vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
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%add = fdiv <2 x half> %vec, %b
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store <2 x half> %add, <2 x half> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v4f16_f32_ieee'
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; NOFP16: estimated cost of 56 for {{.*}} fdiv <4 x half>
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; FP16: estimated cost of 48 for {{.*}} fdiv <4 x half>
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; SIZENOF16: estimated cost of 48 for {{.*}} fdiv <4 x half>
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; SIZEF16: estimated cost of 32 for {{.*}} fdiv <4 x half>
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define amdgpu_kernel void @fdiv_v4f16_f32_ieee(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %vaddr, <4 x half> %b) #0 {
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%vec = load <4 x half>, <4 x half> addrspace(1)* %vaddr
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%add = fdiv <4 x half> %vec, %b
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store <4 x half> %add, <4 x half> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'fdiv_v4f16_f32_ftzdaz'
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; NOFP16: estimated cost of 64 for {{.*}} fdiv <4 x half>
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; FP16: estimated cost of 48 for {{.*}} fdiv <4 x half>
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; SIZENOF16: estimated cost of 56 for {{.*}} fdiv <4 x half>
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; SIZEF16: estimated cost of 32 for {{.*}} fdiv <4 x half>
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define amdgpu_kernel void @fdiv_v4f16_f32_ftzdaz(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %vaddr, <4 x half> %b) #1 {
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%vec = load <4 x half>, <4 x half> addrspace(1)* %vaddr
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%add = fdiv <4 x half> %vec, %b
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store <4 x half> %add, <4 x half> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'rcp_f32_ieee'
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; THRPTALL: estimated cost of 14 for {{.*}} fdiv float
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; SIZEALL: estimated cost of 12 for {{.*}} fdiv float
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define amdgpu_kernel void @rcp_f32_ieee(float addrspace(1)* %out, float addrspace(1)* %vaddr) #0 {
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%vec = load float, float addrspace(1)* %vaddr
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%add = fdiv float 1.0, %vec
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store float %add, float addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'rcp_f32_ftzdaz'
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; THRPTALL: estimated cost of 4 for {{.*}} fdiv float
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; SIZEALL: estimated cost of 2 for {{.*}} fdiv float
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define amdgpu_kernel void @rcp_f32_ftzdaz(float addrspace(1)* %out, float addrspace(1)* %vaddr) #1 {
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%vec = load float, float addrspace(1)* %vaddr
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%add = fdiv float 1.0, %vec
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store float %add, float addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'rcp_f16_f32_ieee'
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; NOFP16: estimated cost of 14 for {{.*}} fdiv half
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; FP16: estimated cost of 4 for {{.*}} fdiv half
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; SIZENOF16: estimated cost of 12 for {{.*}} fdiv half
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; SIZEF16: estimated cost of 2 for {{.*}} fdiv half
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define amdgpu_kernel void @rcp_f16_f32_ieee(half addrspace(1)* %out, half addrspace(1)* %vaddr) #0 {
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%vec = load half, half addrspace(1)* %vaddr
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%add = fdiv half 1.0, %vec
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store half %add, half addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'rcp_f16_f32_ftzdaz'
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; THRPTALL: estimated cost of 4 for {{.*}} fdiv half
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; SIZEALL: estimated cost of 2 for {{.*}} fdiv half
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define amdgpu_kernel void @rcp_f16_f32_ftzdaz(half addrspace(1)* %out, half addrspace(1)* %vaddr) #1 {
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%vec = load half, half addrspace(1)* %vaddr
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%add = fdiv half 1.0, %vec
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store half %add, half addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'rcp_f64'
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; CIFASTF64: estimated cost of 24 for {{.*}} fdiv double
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; CISLOWF64: estimated cost of 38 for {{.*}} fdiv double
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; SIFASTF64: estimated cost of 27 for {{.*}} fdiv double
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; SISLOWF64: estimated cost of 41 for {{.*}} fdiv double
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; SIZECI: estimated cost of 22 for {{.*}} fdiv double
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; SIZESI: estimated cost of 25 for {{.*}} fdiv double
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define amdgpu_kernel void @rcp_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr) #0 {
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%vec = load double, double addrspace(1)* %vaddr
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%add = fdiv double 1.0, %vec
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store double %add, double addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'rcp_v2f32_ieee'
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; THRPTALL: estimated cost of 28 for {{.*}} fdiv <2 x float>
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; SIZEALL: estimated cost of 24 for {{.*}} fdiv <2 x float>
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define amdgpu_kernel void @rcp_v2f32_ieee(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) #0 {
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%vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
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%add = fdiv <2 x float> <float 1.0, float 1.0>, %vec
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store <2 x float> %add, <2 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'rcp_v2f32_ftzdaz'
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; THRPTALL: estimated cost of 8 for {{.*}} fdiv <2 x float>
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; SIZEALL: estimated cost of 4 for {{.*}} fdiv <2 x float>
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define amdgpu_kernel void @rcp_v2f32_ftzdaz(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr) #1 {
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%vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
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%add = fdiv <2 x float> <float 1.0, float 1.0>, %vec
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store <2 x float> %add, <2 x float> addrspace(1)* %out
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ret void
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}
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; ALL-LABEL: 'rcp_v2f16_f32_ieee'
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; NOFP16: estimated cost of 28 for {{.*}} fdiv <2 x half>
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; FP16: estimated cost of 8 for {{.*}} fdiv <2 x half>
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; SIZENOF16: estimated cost of 24 for {{.*}} fdiv <2 x half>
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; SIZEF16: estimated cost of 4 for {{.*}} fdiv <2 x half>
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define amdgpu_kernel void @rcp_v2f16_f32_ieee(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr) #0 {
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%vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
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%add = fdiv <2 x half> <half 1.0, half 1.0>, %vec
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||
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store <2 x half> %add, <2 x half> addrspace(1)* %out
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; ALL-LABEL: 'rcp_v2f16_f32_ftzdaz'
|
||
|
|
; THRPTALL: estimated cost of 8 for {{.*}} fdiv <2 x half>
|
||
|
|
; SIZEALL: estimated cost of 4 for {{.*}} fdiv <2 x half>
|
||
|
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define amdgpu_kernel void @rcp_v2f16_f32_ftzdaz(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr) #1 {
|
||
|
|
%vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
|
||
|
|
%add = fdiv <2 x half> <half 1.0, half 1.0>, %vec
|
||
|
|
store <2 x half> %add, <2 x half> addrspace(1)* %out
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
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attributes #0 = { nounwind "denormal-fp-math-f32"="ieee,ieee" }
|
||
|
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attributes #1 = { nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
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