From e407657da0a5e32c786b98dd2b6568ede1c2ef82 Mon Sep 17 00:00:00 2001 From: Andrea Fioraldi Date: Tue, 6 Jul 2021 14:29:56 +0200 Subject: [PATCH] fix read_reg --- cpu.c | 8 ++++---- qemu_libafl_bridge/Cargo.toml | 2 +- qemu_libafl_bridge/src/amd64.rs | 14 +++++++------- qemu_libafl_bridge/src/lib.rs | 1 + qemu_libafl_bridge/src/x86.rs | 15 +++++++++++++++ 5 files changed, 28 insertions(+), 12 deletions(-) create mode 100644 qemu_libafl_bridge/src/x86.rs diff --git a/cpu.c b/cpu.c index 3a1363cfb4..84162d05f8 100644 --- a/cpu.c +++ b/cpu.c @@ -63,10 +63,6 @@ int libafl_qemu_write_reg(int reg, uint8_t* val) return 0; } - if (libafl_qemu_mem_buf == NULL) { - libafl_qemu_mem_buf = g_byte_array_sized_new(64); - } - CPUClass *cc = CPU_GET_CLASS(cpu); if (reg < cc->gdb_num_core_regs) { return cc->gdb_write_register(cpu, val, reg); @@ -81,6 +77,10 @@ int libafl_qemu_read_reg(int reg, uint8_t* val) return 0; } + if (libafl_qemu_mem_buf == NULL) { + libafl_qemu_mem_buf = g_byte_array_sized_new(64); + } + CPUClass *cc = CPU_GET_CLASS(cpu); if (reg < cc->gdb_num_core_regs) { int len = cc->gdb_read_register(cpu, libafl_qemu_mem_buf, reg); diff --git a/qemu_libafl_bridge/Cargo.toml b/qemu_libafl_bridge/Cargo.toml index 1efda7b6af..999ecfb2a0 100644 --- a/qemu_libafl_bridge/Cargo.toml +++ b/qemu_libafl_bridge/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "qemu_libafl_bridge" -version = "0.2.1" +version = "0.2.2" authors = ["Andrea Fioraldi "] description = "QEMU and LibAFL bridge lib" repository = "https://github.com/AFLplusplus/qemu-libafl-bridge/" diff --git a/qemu_libafl_bridge/src/amd64.rs b/qemu_libafl_bridge/src/amd64.rs index b52dd4991a..a7cf27d2ab 100644 --- a/qemu_libafl_bridge/src/amd64.rs +++ b/qemu_libafl_bridge/src/amd64.rs @@ -5,13 +5,13 @@ use num_enum::{IntoPrimitive, TryFromPrimitive}; #[allow(clippy::pub_enum_variant_names)] pub enum Amd64Regs { Rax = 0, - Rcx = 1, - Rdx = 2, - Rbx = 3, - Rsp = 4, - Rbp = 5, - Rsi = 6, - Rdi = 7, + Rbx = 1, + Rcx = 2, + Rdx = 3, + Rsi = 4, + Rdi = 5, + Rbp = 6, + Rsp = 7, R8 = 8, R9 = 9, R10 = 10, diff --git a/qemu_libafl_bridge/src/lib.rs b/qemu_libafl_bridge/src/lib.rs index ce4589639f..c03ecfda11 100644 --- a/qemu_libafl_bridge/src/lib.rs +++ b/qemu_libafl_bridge/src/lib.rs @@ -2,6 +2,7 @@ use core::{mem::transmute, ptr::copy_nonoverlapping}; use num::Num; pub mod amd64; +pub mod x86; /* int libafl_qemu_write_reg(int reg, uint8_t* val); diff --git a/qemu_libafl_bridge/src/x86.rs b/qemu_libafl_bridge/src/x86.rs new file mode 100644 index 0000000000..610bde7edf --- /dev/null +++ b/qemu_libafl_bridge/src/x86.rs @@ -0,0 +1,15 @@ +use num_enum::{IntoPrimitive, TryFromPrimitive}; + +#[derive(IntoPrimitive, TryFromPrimitive, Clone, Copy)] +#[repr(i32)] +#[allow(clippy::pub_enum_variant_names)] +pub enum X86Regs { + Eax = 0, + Ebx = 1, + Ecx = 2, + Edx = 3, + Esi = 4, + Edi = 5, + Ebp = 6, + Esp = 7, +}