From 5384adef5d5ac27d57f684e3937592d2074ce8b9 Mon Sep 17 00:00:00 2001 From: Eric Auger Date: Thu, 14 Oct 2021 13:56:41 +0200 Subject: [PATCH 01/19] tests/acpi: Get prepared for IORT E.b revision upgrade Ignore IORT till reference blob for E.b spec revision gets added. Signed-off-by: Eric Auger Reviewed-by: Michael S. Tsirkin Message-Id: <20211014115643.756977-2-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..9a5a923d6b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/IORT", From 1c2cb7e0b3e6743b449a4ad28d70b77d2290e817 Mon Sep 17 00:00:00 2001 From: Eric Auger Date: Thu, 14 Oct 2021 13:56:42 +0200 Subject: [PATCH 02/19] hw/arm/virt-acpi-build: IORT upgrade up to revision E.b Upgrade the IORT table from B to E.b specification revision (ARM DEN 0049E.b). The SMMUv3 and root complex node have additional fields. Also unique IORT node identifiers are introduced: they are generated in sequential order. They are not cross-referenced though. Signed-off-by: Eric Auger Reviewed-by: Jean-Philippe Brucker Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Message-Id: <20211014115643.756977-3-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- hw/arm/virt-acpi-build.c | 48 ++++++++++++++++++++++++---------------- 1 file changed, 29 insertions(+), 19 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 6cec97352b..9c4730f4ab 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -241,19 +241,20 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms) #endif #define ID_MAPPING_ENTRY_SIZE 20 -#define SMMU_V3_ENTRY_SIZE 60 -#define ROOT_COMPLEX_ENTRY_SIZE 32 +#define SMMU_V3_ENTRY_SIZE 68 +#define ROOT_COMPLEX_ENTRY_SIZE 36 #define IORT_NODE_OFFSET 48 static void build_iort_id_mapping(GArray *table_data, uint32_t input_base, uint32_t id_count, uint32_t out_ref) { - /* Identity RID mapping covering the whole input RID range */ + /* Table 4 ID mapping format */ build_append_int_noprefix(table_data, input_base, 4); /* Input base */ build_append_int_noprefix(table_data, id_count, 4); /* Number of IDs */ build_append_int_noprefix(table_data, input_base, 4); /* Output base */ build_append_int_noprefix(table_data, out_ref, 4); /* Output Reference */ - build_append_int_noprefix(table_data, 0, 4); /* Flags */ + /* Flags */ + build_append_int_noprefix(table_data, 0 /* Single mapping (disabled) */, 4); } struct AcpiIortIdMapping { @@ -298,7 +299,7 @@ static int iort_idmap_compare(gconstpointer a, gconstpointer b) /* * Input Output Remapping Table (IORT) * Conforms to "IO Remapping Table System Software on ARM Platforms", - * Document number: ARM DEN 0049B, October 2015 + * Document number: ARM DEN 0049E.b, Feb 2021 */ static void build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) @@ -307,10 +308,11 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) const uint32_t iort_node_offset = IORT_NODE_OFFSET; size_t node_size, smmu_offset = 0; AcpiIortIdMapping *idmap; + uint32_t id = 0; GArray *smmu_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); GArray *its_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); - AcpiTable table = { .sig = "IORT", .rev = 0, .oem_id = vms->oem_id, + AcpiTable table = { .sig = "IORT", .rev = 3, .oem_id = vms->oem_id, .oem_table_id = vms->oem_table_id }; /* Table 2 The IORT */ acpi_table_begin(&table, table_data); @@ -358,12 +360,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, IORT_NODE_OFFSET, 4); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ - /* 3.1.1.3 ITS group node */ + /* Table 12 ITS Group Format */ build_append_int_noprefix(table_data, 0 /* ITS Group */, 1); /* Type */ node_size = 20 /* fixed header size */ + 4 /* 1 GIC ITS Identifier */; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 1, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ build_append_int_noprefix(table_data, 0, 4); /* Number of ID mappings */ build_append_int_noprefix(table_data, 0, 4); /* Reference to ID Array */ build_append_int_noprefix(table_data, 1, 4); /* Number of ITSs */ @@ -374,19 +376,19 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) int irq = vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE; smmu_offset = table_data->len - table.table_offset; - /* 3.1.1.2 SMMUv3 */ + /* Table 9 SMMUv3 Format */ build_append_int_noprefix(table_data, 4 /* SMMUv3 */, 1); /* Type */ node_size = SMMU_V3_ENTRY_SIZE + ID_MAPPING_ENTRY_SIZE; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 4, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ build_append_int_noprefix(table_data, 1, 4); /* Number of ID mappings */ /* Reference to ID Array */ build_append_int_noprefix(table_data, SMMU_V3_ENTRY_SIZE, 4); /* Base address */ build_append_int_noprefix(table_data, vms->memmap[VIRT_SMMU].base, 8); /* Flags */ - build_append_int_noprefix(table_data, 1 /* COHACC OverrideNote */, 4); + build_append_int_noprefix(table_data, 1 /* COHACC Override */, 4); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ build_append_int_noprefix(table_data, 0, 8); /* VATOS address */ /* Model */ @@ -395,35 +397,43 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, irq + 1, 4); /* PRI */ build_append_int_noprefix(table_data, irq + 3, 4); /* GERR */ build_append_int_noprefix(table_data, irq + 2, 4); /* Sync */ + build_append_int_noprefix(table_data, 0, 4); /* Proximity domain */ + /* DeviceID mapping index (ignored since interrupts are GSIV based) */ + build_append_int_noprefix(table_data, 0, 4); /* output IORT node is the ITS group node (the first node) */ build_iort_id_mapping(table_data, 0, 0xFFFF, IORT_NODE_OFFSET); } - /* Table 16 Root Complex Node */ + /* Table 17 Root Complex Node */ build_append_int_noprefix(table_data, 2 /* Root complex */, 1); /* Type */ node_size = ROOT_COMPLEX_ENTRY_SIZE + ID_MAPPING_ENTRY_SIZE * rc_mapping_count; build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 0, 1); /* Revision */ - build_append_int_noprefix(table_data, 0, 4); /* Reserved */ + build_append_int_noprefix(table_data, 3, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ /* Number of ID mappings */ build_append_int_noprefix(table_data, rc_mapping_count, 4); /* Reference to ID Array */ build_append_int_noprefix(table_data, ROOT_COMPLEX_ENTRY_SIZE, 4); - /* Table 13 Memory access properties */ + /* Table 14 Memory access properties */ /* CCA: Cache Coherent Attribute */ build_append_int_noprefix(table_data, 1 /* fully coherent */, 4); build_append_int_noprefix(table_data, 0, 1); /* AH: Note Allocation Hints */ build_append_int_noprefix(table_data, 0, 2); /* Reserved */ - /* MAF: Note Memory Access Flags */ - build_append_int_noprefix(table_data, 0x3 /* CCA = CPM = DCAS = 1 */, 1); + /* Table 15 Memory Access Flags */ + build_append_int_noprefix(table_data, 0x3 /* CCA = CPM = DACS = 1 */, 1); build_append_int_noprefix(table_data, 0, 4); /* ATS Attribute */ /* MCFG pci_segment */ build_append_int_noprefix(table_data, 0, 4); /* PCI Segment number */ + /* Memory address size limit */ + build_append_int_noprefix(table_data, 64, 1); + + build_append_int_noprefix(table_data, 0, 3); /* Reserved */ + /* Output Reference */ if (vms->iommu == VIRT_IOMMU_SMMUV3) { AcpiIortIdMapping *range; From 47432863ff1892870730e78630b5d0dbed7e72b2 Mon Sep 17 00:00:00 2001 From: Eric Auger Date: Thu, 14 Oct 2021 13:56:43 +0200 Subject: [PATCH 03/19] tests/acpi: Generate reference blob for IORT rev E.b Re-generate reference blobs with rebuild-expected-aml.sh. Differences reported by "make check V=1" are listed below (IORT.numamem). Differences for other variants are similar. /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20180629 (64-bit version) * Copyright (c) 2000 - 2018 Intel Corporation * - * Disassembly of tests/data/acpi/virt/IORT.numamem, Thu Oct 14 06:13:19 2021 + * Disassembly of /tmp/aml-K8L9A1, Thu Oct 14 06:13:19 2021 * * ACPI Data Table [IORT] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "IORT" [IO Remapping Table] -[004h 0004 4] Table Length : 0000007C -[008h 0008 1] Revision : 00 -[009h 0009 1] Checksum : 07 +[004h 0004 4] Table Length : 00000080 +[008h 0008 1] Revision : 03 +[009h 0009 1] Checksum : B3 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 4] Node Count : 00000002 [028h 0040 4] Node Offset : 00000030 [02Ch 0044 4] Reserved : 00000000 [030h 0048 1] Type : 00 [031h 0049 2] Length : 0018 -[033h 0051 1] Revision : 00 +[033h 0051 1] Revision : 01 [034h 0052 4] Reserved : 00000000 [038h 0056 4] Mapping Count : 00000000 [03Ch 0060 4] Mapping Offset : 00000000 [040h 0064 4] ItsCount : 00000001 [044h 0068 4] Identifiers : 00000000 [048h 0072 1] Type : 02 -[049h 0073 2] Length : 0034 -[04Bh 0075 1] Revision : 00 -[04Ch 0076 4] Reserved : 00000000 +[049h 0073 2] Length : 0038 +[04Bh 0075 1] Revision : 03 +[04Ch 0076 4] Reserved : 00000001 [050h 0080 4] Mapping Count : 00000001 -[054h 0084 4] Mapping Offset : 00000020 +[054h 0084 4] Mapping Offset : 00000024 [058h 0088 8] Memory Properties : [IORT Memory Access Properties] [058h 0088 4] Cache Coherency : 00000001 [05Ch 0092 1] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 [05Dh 0093 2] Reserved : 0000 [05Fh 0095 1] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 [060h 0096 4] ATS Attribute : 00000000 [064h 0100 4] PCI Segment Number : 00000000 -[068h 0104 1] Memory Size Limit : 00 +[068h 0104 1] Memory Size Limit : 40 [069h 0105 3] Reserved : 000000 -[068h 0104 4] Input base : 00000000 -[06Ch 0108 4] ID Count : 0000FFFF -[070h 0112 4] Output Base : 00000000 -[074h 0116 4] Output Reference : 00000030 -[078h 0120 4] Flags (decoded below) : 00000000 +[06Ch 0108 4] Input base : 00000000 +[070h 0112 4] ID Count : 0000FFFF +[074h 0116 4] Output Base : 00000000 +[078h 0120 4] Output Reference : 00000030 +[07Ch 0124 4] Flags (decoded below) : 00000000 Single Mapping : 0 -Raw Table Data: Length 124 (0x7C) +Raw Table Data: Length 128 (0x80) - 0000: 49 4F 52 54 7C 00 00 00 00 07 42 4F 43 48 53 20 // IORT|.....BOCHS + 0000: 49 4F 52 54 80 00 00 00 03 B3 42 4F 43 48 53 20 // IORT......BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 02 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 0030: 00 18 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0040: 01 00 00 00 00 00 00 00 02 34 00 00 00 00 00 00 // .........4...... - 0050: 01 00 00 00 20 00 00 00 01 00 00 00 00 00 00 03 // .... ........... - 0060: 00 00 00 00 00 00 00 00 00 00 00 00 FF FF 00 00 // ................ - 0070: 00 00 00 00 30 00 00 00 00 00 00 00 // ....0....... + 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 00 00 00 00 00 00 00 02 38 00 03 01 00 00 00 // .........8...... + 0050: 01 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$........... + 0060: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@....... + 0070: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0....... ** Signed-off-by: Eric Auger Reviewed-by: Michael S. Tsirkin Message-Id: <20211014115643.756977-4-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- tests/data/acpi/virt/IORT | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.memhp | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.numamem | Bin 124 -> 128 bytes tests/data/acpi/virt/IORT.pxb | Bin 124 -> 128 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 5 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/IORT b/tests/data/acpi/virt/IORT index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f688ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=e`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=p0RR91 diff --git a/tests/data/acpi/virt/IORT.memhp b/tests/data/acpi/virt/IORT.memhp index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f688ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=e`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=p0RR91 diff --git a/tests/data/acpi/virt/IORT.numamem b/tests/data/acpi/virt/IORT.numamem index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f688ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=e`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=p0RR91 diff --git a/tests/data/acpi/virt/IORT.pxb b/tests/data/acpi/virt/IORT.pxb index 521acefe9ba66706c5607321a82d330586f3f280..7efd0ce8a6b3928efa7e1373f688ab4c5f50543b 100644 GIT binary patch literal 128 zcmebD4+?2uU|?Y0?Bwt45v<@85#X!<1dKp25F11@0kHuPgMkDCNC*yK93~3}W)K^M VRiHGGVg_O`aDdYP|3ers^8jQz3IPBB literal 124 zcmebD4+^Pa00MR=e`k+i1*eDrX9XZ&1PX!JAesq?4S*O7Bw!2(4Uz`|CKCt^;wu0# QRGb+i3L*dhhtM#y0PN=p0RR91 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 9a5a923d6b..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/IORT", From 99abb72520cb27f2318908831abc6915e286158b Mon Sep 17 00:00:00 2001 From: Gavin Shan Date: Fri, 15 Oct 2021 20:42:46 +0800 Subject: [PATCH 04/19] hw/arm/virt: Don't create device-tree node for empty NUMA node The empty NUMA node, where no memory resides, are allowed. For example, the following command line specifies two empty NUMA nodes. With this, QEMU fails to boot because of the conflicting device-tree node names, as the following error message indicates. /home/gavin/sandbox/qemu.main/build/qemu-system-aarch64 \ -accel kvm -machine virt,gic-version=host \ -cpu host -smp 4,sockets=2,cores=2,threads=1 \ -m 1024M,slots=16,maxmem=64G \ -object memory-backend-ram,id=mem0,size=512M \ -object memory-backend-ram,id=mem1,size=512M \ -numa node,nodeid=0,cpus=0-1,memdev=mem0 \ -numa node,nodeid=1,cpus=2-3,memdev=mem1 \ -numa node,nodeid=2 \ -numa node,nodeid=3 : qemu-system-aarch64: FDT: Failed to create subnode /memory@80000000: FDT_ERR_EXISTS As specified by linux device-tree binding document, the device-tree nodes for these empty NUMA nodes shouldn't be generated. However, the corresponding NUMA node IDs should be included in the distance map. The memory hotplug through device-tree on ARM64 isn't existing so far and it's not necessary to require the user to provide a distance map. Furthermore, the default distance map Linux generates may even be sufficient. So this simply skips populating the device-tree nodes for these empty NUMA nodes to avoid the error, so that QEMU can be started successfully. Signed-off-by: Gavin Shan Reviewed-by: Andrew Jones Message-Id: <20211015124246.23073-1-gshan@redhat.com> Signed-off-by: Richard Henderson --- hw/arm/boot.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 57efb61ee4..74ad397b1f 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -599,10 +599,23 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo, } g_strfreev(node_path); + /* + * We drop all the memory nodes which correspond to empty NUMA nodes + * from the device tree, because the Linux NUMA binding document + * states they should not be generated. Linux will get the NUMA node + * IDs of the empty NUMA nodes from the distance map if they are needed. + * This means QEMU users may be obliged to provide command lines which + * configure distance maps when the empty NUMA node IDs are needed and + * Linux's default distance map isn't sufficient. + */ if (ms->numa_state != NULL && ms->numa_state->num_nodes > 0) { mem_base = binfo->loader_start; for (i = 0; i < ms->numa_state->num_nodes; i++) { mem_len = ms->numa_state->nodes[i].node_mem; + if (!mem_len) { + continue; + } + rc = fdt_add_memory_node(fdt, acells, mem_base, scells, mem_len, i); if (rc < 0) { From b152229697c8e3ef2655d29488eadacde6b2b309 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 18 Oct 2021 12:58:15 +0200 Subject: [PATCH 05/19] roms/edk2: Only init brotli submodule to build BaseTools MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since EDK2 BaseTools only require the brotli submodule, we don't need to initialize other submodules to build it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Gerd Hoffmann Message-Id: <20211018105816.2663195-2-philmd@redhat.com> Signed-off-by: Richard Henderson --- roms/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/roms/Makefile b/roms/Makefile index eeb5970348..b967b53bb7 100644 --- a/roms/Makefile +++ b/roms/Makefile @@ -143,7 +143,8 @@ build-efi-roms: build-pxe-roms # efirom # edk2-basetools: - cd edk2/BaseTools && git submodule update --init --force + cd edk2/BaseTools && git submodule update --init --force \ + Source/C/BrotliCompress/brotli $(MAKE) -C edk2/BaseTools \ PYTHON_COMMAND=$${EDK2_PYTHON_COMMAND:-python3} \ EXTRA_OPTFLAGS='$(EDK2_BASETOOLS_OPTFLAGS)' \ From bd0da3a3d4f5e51856b5716508df9a4fdbbd416c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Mon, 18 Oct 2021 12:58:16 +0200 Subject: [PATCH 06/19] roms/edk2: Only initialize required submodules MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The EDK2 firmware images built to test QEMU do not require the following submodules: - MdeModulePkg/Universal/RegularExpressionDxe/oniguruma - UnitTestFrameworkPkg/Library/CmockaLib/cmocka The only submodules required are: - ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 - BaseTools/Source/C/BrotliCompress/brotli - CryptoPkg/Library/OpensslLib/openssl - MdeModulePkg/Library/BrotliCustomDecompressLib/brotli Adapt the buildsys machinery to only initialize the required submodules. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Gerd Hoffmann Message-Id: <20211018105816.2663195-3-philmd@redhat.com> Signed-off-by: Richard Henderson --- .gitlab-ci.d/edk2.yml | 6 +++++- roms/Makefile.edk2 | 7 ++++++- scripts/make-release | 7 ++++++- 3 files changed, 17 insertions(+), 3 deletions(-) diff --git a/.gitlab-ci.d/edk2.yml b/.gitlab-ci.d/edk2.yml index 62497ba47f..13d0f8b019 100644 --- a/.gitlab-ci.d/edk2.yml +++ b/.gitlab-ci.d/edk2.yml @@ -50,7 +50,11 @@ build-edk2: GIT_DEPTH: 3 script: # Clone the required submodules and build EDK2 - git submodule update --init roms/edk2 - - git -C roms/edk2 submodule update --init + - git -C roms/edk2 submodule update --init -- + ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 + BaseTools/Source/C/BrotliCompress/brotli + CryptoPkg/Library/OpensslLib/openssl + MdeModulePkg/Library/BrotliCustomDecompressLib/brotli - export JOBS=$(($(getconf _NPROCESSORS_ONLN) + 1)) - echo "=== Using ${JOBS} simultaneous jobs ===" - make -j${JOBS} -C roms efi 2>&1 1>edk2-stdout.log | tee -a edk2-stderr.log >&2 diff --git a/roms/Makefile.edk2 b/roms/Makefile.edk2 index a8ed325575..fdae0b511f 100644 --- a/roms/Makefile.edk2 +++ b/roms/Makefile.edk2 @@ -51,7 +51,12 @@ all: $(foreach flashdev,$(flashdevs),../pc-bios/edk2-$(flashdev).fd.bz2) \ # make-release/tarball scripts. submodules: if test -d edk2/.git; then \ - cd edk2 && git submodule update --init --force; \ + cd edk2 && git submodule update --init --force -- \ + ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 \ + BaseTools/Source/C/BrotliCompress/brotli \ + CryptoPkg/Library/OpensslLib/openssl \ + MdeModulePkg/Library/BrotliCustomDecompressLib/brotli \ + ; \ fi # See notes on the ".NOTPARALLEL" target and the "+" indicator in diff --git a/scripts/make-release b/scripts/make-release index a2a8cda33c..05b14ecc95 100755 --- a/scripts/make-release +++ b/scripts/make-release @@ -27,7 +27,12 @@ git submodule update --init # don't necessarily have much control over how a submodule handles its # submodule dependencies, so we continue to handle these on a case-by-case # basis for now. -(cd roms/edk2 && git submodule update --init) +(cd roms/edk2 && \ + git submodule update --init -- \ + ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3 \ + BaseTools/Source/C/BrotliCompress/brotli \ + CryptoPkg/Library/OpensslLib/openssl \ + MdeModulePkg/Library/BrotliCustomDecompressLib/brotli) popd tar --exclude=.git -cjf ${destination}.tar.bz2 ${destination} rm -rf ${destination} From b84722cf4455b44a98b5a527067001dee58ace10 Mon Sep 17 00:00:00 2001 From: Shuuichirou Ishii Date: Fri, 8 Oct 2021 15:36:04 +0900 Subject: [PATCH 07/19] hw/arm/sbsa-ref: Fixed cpu type error message typo. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Shuuichirou Ishii Reviewed-by: Alex Bennée Reviewed-by: Yanan Wang Message-Id: <20211008063604.670699-1-ishii.shuuichir@fujitsu.com> Signed-off-by: Richard Henderson --- hw/arm/sbsa-ref.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 509c5f09b4..358714bd3e 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -670,7 +670,7 @@ static void sbsa_ref_init(MachineState *machine) int n, sbsa_max_cpus; if (!cpu_type_valid(machine->cpu_type)) { - error_report("mach-virt: CPU type %s not supported", machine->cpu_type); + error_report("sbsa-ref: CPU type %s not supported", machine->cpu_type); exit(1); } From 8975eb891fb6df56442763acf2bdb7c03b0933bf Mon Sep 17 00:00:00 2001 From: Luc Michel Date: Thu, 14 Oct 2021 21:43:25 +0200 Subject: [PATCH 08/19] hw/elf_ops.h: switch to ssize_t for elf loader return type MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Until now, int was used as the return type for all the ELF loader related functions. The returned value is the sum of all loaded program headers "MemSize" fields. Because of the overflow check in elf_ops.h, trying to load an ELF bigger than INT_MAX will fail. Switch to ssize_t to remove this limitation. Signed-off-by: Luc Michel Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Stefano Garzarella Message-Id: <20211014194325.19917-1-lmichel@kalray.eu> Signed-off-by: Richard Henderson --- hw/core/loader.c | 60 +++++++++++++++++++++++--------------------- include/hw/elf_ops.h | 27 ++++++++++---------- include/hw/loader.h | 58 +++++++++++++++++++++--------------------- 3 files changed, 74 insertions(+), 71 deletions(-) diff --git a/hw/core/loader.c b/hw/core/loader.c index c623318b73..c7f97fdce8 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -326,7 +326,7 @@ static void *load_at(int fd, off_t offset, size_t size) #define SZ 64 #include "hw/elf_ops.h" -const char *load_elf_strerror(int error) +const char *load_elf_strerror(ssize_t error) { switch (error) { case 0: @@ -402,12 +402,12 @@ fail: } /* return < 0 if error, otherwise the number of bytes loaded in memory */ -int load_elf(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab) +ssize_t load_elf(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, + uint64_t *highaddr, uint32_t *pflags, int big_endian, + int elf_machine, int clear_lsb, int data_swab) { return load_elf_as(filename, elf_note_fn, translate_fn, translate_opaque, pentry, lowaddr, highaddr, pflags, big_endian, @@ -415,12 +415,13 @@ int load_elf(const char *filename, } /* return < 0 if error, otherwise the number of bytes loaded in memory */ -int load_elf_as(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab, AddressSpace *as) +ssize_t load_elf_as(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, + uint64_t *highaddr, uint32_t *pflags, int big_endian, + int elf_machine, int clear_lsb, int data_swab, + AddressSpace *as) { return load_elf_ram(filename, elf_note_fn, translate_fn, translate_opaque, pentry, lowaddr, highaddr, pflags, big_endian, @@ -428,13 +429,13 @@ int load_elf_as(const char *filename, } /* return < 0 if error, otherwise the number of bytes loaded in memory */ -int load_elf_ram(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom) +ssize_t load_elf_ram(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, + int big_endian, int elf_machine, int clear_lsb, + int data_swab, AddressSpace *as, bool load_rom) { return load_elf_ram_sym(filename, elf_note_fn, translate_fn, translate_opaque, @@ -444,16 +445,17 @@ int load_elf_ram(const char *filename, } /* return < 0 if error, otherwise the number of bytes loaded in memory */ -int load_elf_ram_sym(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, - uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, - int big_endian, int elf_machine, - int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom, symbol_fn_t sym_cb) +ssize_t load_elf_ram_sym(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, + uint32_t *pflags, int big_endian, int elf_machine, + int clear_lsb, int data_swab, + AddressSpace *as, bool load_rom, symbol_fn_t sym_cb) { - int fd, data_order, target_data_order, must_swab, ret = ELF_LOAD_FAILED; + int fd, data_order, target_data_order, must_swab; + ssize_t ret = ELF_LOAD_FAILED; uint8_t e_ident[EI_NIDENT]; fd = open(filename, O_RDONLY | O_BINARY); diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h index 1c37cec4ae..995de8495c 100644 --- a/include/hw/elf_ops.h +++ b/include/hw/elf_ops.h @@ -312,25 +312,26 @@ static struct elf_note *glue(get_elf_note_type, SZ)(struct elf_note *nhdr, return nhdr; } -static int glue(load_elf, SZ)(const char *name, int fd, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, - int must_swab, uint64_t *pentry, - uint64_t *lowaddr, uint64_t *highaddr, - uint32_t *pflags, int elf_machine, - int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom, - symbol_fn_t sym_cb) +static ssize_t glue(load_elf, SZ)(const char *name, int fd, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, + int must_swab, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, + uint32_t *pflags, int elf_machine, + int clear_lsb, int data_swab, + AddressSpace *as, bool load_rom, + symbol_fn_t sym_cb) { struct elfhdr ehdr; struct elf_phdr *phdr = NULL, *ph; - int size, i, total_size; + int size, i; + ssize_t total_size; elf_word mem_size, file_size, data_offset; uint64_t addr, low = (uint64_t)-1, high = 0; GMappedFile *mapped_file = NULL; uint8_t *data = NULL; - int ret = ELF_LOAD_FAILED; + ssize_t ret = ELF_LOAD_FAILED; if (read(fd, &ehdr, sizeof(ehdr)) != sizeof(ehdr)) goto fail; @@ -482,7 +483,7 @@ static int glue(load_elf, SZ)(const char *name, int fd, } } - if (mem_size > INT_MAX - total_size) { + if (mem_size > SSIZE_MAX - total_size) { ret = ELF_LOAD_TOO_BIG; goto fail; } diff --git a/include/hw/loader.h b/include/hw/loader.h index 81104cb02f..4fa485bd61 100644 --- a/include/hw/loader.h +++ b/include/hw/loader.h @@ -90,7 +90,7 @@ int load_image_gzipped(const char *filename, hwaddr addr, uint64_t max_sz); #define ELF_LOAD_WRONG_ARCH -3 #define ELF_LOAD_WRONG_ENDIAN -4 #define ELF_LOAD_TOO_BIG -5 -const char *load_elf_strerror(int error); +const char *load_elf_strerror(ssize_t error); /** load_elf_ram_sym: * @filename: Path of ELF file @@ -128,48 +128,48 @@ const char *load_elf_strerror(int error); typedef void (*symbol_fn_t)(const char *st_name, int st_info, uint64_t st_value, uint64_t st_size); -int load_elf_ram_sym(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, - uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, - int big_endian, int elf_machine, - int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom, symbol_fn_t sym_cb); +ssize_t load_elf_ram_sym(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, + uint32_t *pflags, int big_endian, int elf_machine, + int clear_lsb, int data_swab, + AddressSpace *as, bool load_rom, symbol_fn_t sym_cb); /** load_elf_ram: * Same as load_elf_ram_sym(), but doesn't allow the caller to specify a * symbol callback function */ -int load_elf_ram(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab, - AddressSpace *as, bool load_rom); +ssize_t load_elf_ram(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, + uint64_t *lowaddr, uint64_t *highaddr, uint32_t *pflags, + int big_endian, int elf_machine, int clear_lsb, + int data_swab, AddressSpace *as, bool load_rom); /** load_elf_as: * Same as load_elf_ram(), but always loads the elf as ROM */ -int load_elf_as(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab, - AddressSpace *as); +ssize_t load_elf_as(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, + uint64_t *highaddr, uint32_t *pflags, int big_endian, + int elf_machine, int clear_lsb, int data_swab, + AddressSpace *as); /** load_elf: * Same as load_elf_as(), but doesn't allow the caller to specify an * AddressSpace. */ -int load_elf(const char *filename, - uint64_t (*elf_note_fn)(void *, void *, bool), - uint64_t (*translate_fn)(void *, uint64_t), - void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, - uint64_t *highaddr, uint32_t *pflags, int big_endian, - int elf_machine, int clear_lsb, int data_swab); +ssize_t load_elf(const char *filename, + uint64_t (*elf_note_fn)(void *, void *, bool), + uint64_t (*translate_fn)(void *, uint64_t), + void *translate_opaque, uint64_t *pentry, uint64_t *lowaddr, + uint64_t *highaddr, uint32_t *pflags, int big_endian, + int elf_machine, int clear_lsb, int data_swab); /** load_elf_hdr: * @filename: Path of ELF file From 3cc322f437b027d95aa96dd140b2b4fa9a5b6dfb Mon Sep 17 00:00:00 2001 From: Eric Auger Date: Tue, 19 Oct 2021 10:00:35 +0200 Subject: [PATCH 09/19] tests/acpi: Add void table for virt/DBG2 bios-tables-test Add placeholders for DBG2 reference table for virt tests and ignore till reference blob is added. Signed-off-by: Eric Auger Acked-by: Igor Mammedov Acked-by: Michael S. Tsirkin Message-Id: <20211019080037.930641-2-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- tests/data/acpi/virt/DBG2 | 0 tests/qtest/bios-tables-test-allowed-diff.h | 1 + 2 files changed, 1 insertion(+) create mode 100644 tests/data/acpi/virt/DBG2 diff --git a/tests/data/acpi/virt/DBG2 b/tests/data/acpi/virt/DBG2 new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..1910d154c2 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/DBG2", From f0dc9a5d8d556a42a3e614d041effc8854eac71e Mon Sep 17 00:00:00 2001 From: Eric Auger Date: Tue, 19 Oct 2021 10:00:36 +0200 Subject: [PATCH 10/19] hw/arm/virt_acpi_build: Generate DBG2 table ARM SBBR specification mandates DBG2 table (Debug Port Table 2) since v1.0 (ARM DEN0044F 8.3.1.7 DBG2). The DBG2 table allows to describe one or more debug ports. Generate an DBG2 table featuring a single debug port, the PL011. The DBG2 specification can be found at "Microsoft Debug Port Table 2 (DBG2)" https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table?redirectedfrom=MSDN Signed-off-by: Eric Auger Reviewed-by: Andrew Jones Reviewed-by: Igor Mammedov Acked-by: Michael S. Tsirkin Message-Id: <20211019080037.930641-3-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- hw/arm/virt-acpi-build.c | 63 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 62 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 9c4730f4ab..d3bb4cba3e 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -626,6 +626,64 @@ build_gtdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) acpi_table_end(linker, &table); } +/* Debug Port Table 2 (DBG2) */ +static void +build_dbg2(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) +{ + AcpiTable table = { .sig = "DBG2", .rev = 0, .oem_id = vms->oem_id, + .oem_table_id = vms->oem_table_id }; + int dbg2devicelength; + const char name[] = "COM0"; + const int namespace_length = sizeof(name); + + acpi_table_begin(&table, table_data); + + dbg2devicelength = 22 + /* BaseAddressRegister[] offset */ + 12 + /* BaseAddressRegister[] */ + 4 + /* AddressSize[] */ + namespace_length /* NamespaceString[] */; + + /* OffsetDbgDeviceInfo */ + build_append_int_noprefix(table_data, 44, 4); + /* NumberDbgDeviceInfo */ + build_append_int_noprefix(table_data, 1, 4); + + /* Table 2. Debug Device Information structure format */ + build_append_int_noprefix(table_data, 0, 1); /* Revision */ + build_append_int_noprefix(table_data, dbg2devicelength, 2); /* Length */ + /* NumberofGenericAddressRegisters */ + build_append_int_noprefix(table_data, 1, 1); + /* NameSpaceStringLength */ + build_append_int_noprefix(table_data, namespace_length, 2); + build_append_int_noprefix(table_data, 38, 2); /* NameSpaceStringOffset */ + build_append_int_noprefix(table_data, 0, 2); /* OemDataLength */ + /* OemDataOffset (0 means no OEM data) */ + build_append_int_noprefix(table_data, 0, 2); + + /* Port Type */ + build_append_int_noprefix(table_data, 0x8000 /* Serial */, 2); + /* Port Subtype */ + build_append_int_noprefix(table_data, 0x3 /* ARM PL011 UART */, 2); + build_append_int_noprefix(table_data, 0, 2); /* Reserved */ + /* BaseAddressRegisterOffset */ + build_append_int_noprefix(table_data, 22, 2); + /* AddressSizeOffset */ + build_append_int_noprefix(table_data, 34, 2); + + /* BaseAddressRegister[] */ + build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 8, 0, 1, + vms->memmap[VIRT_UART].base); + + /* AddressSize[] */ + build_append_int_noprefix(table_data, + vms->memmap[VIRT_UART].size, 4); + + /* NamespaceString[] */ + g_array_append_vals(table_data, name, namespace_length); + + acpi_table_end(linker, &table); +}; + /* * ACPI spec, Revision 5.1 Errata A * 5.2.12 Multiple APIC Description Table (MADT) @@ -885,7 +943,7 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) dsdt = tables_blob->len; build_dsdt(tables_blob, tables->linker, vms); - /* FADT MADT GTDT MCFG SPCR pointed to by RSDT */ + /* FADT MADT GTDT MCFG SPCR DBG2 pointed to by RSDT */ acpi_add_table(table_offsets, tables_blob); build_fadt_rev5(tables_blob, tables->linker, vms, dsdt); @@ -908,6 +966,9 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) acpi_add_table(table_offsets, tables_blob); build_spcr(tables_blob, tables->linker, vms); + acpi_add_table(table_offsets, tables_blob); + build_dbg2(tables_blob, tables->linker, vms); + if (vms->ras) { build_ghes_error_table(tables->hardware_errors, tables->linker); acpi_add_table(table_offsets, tables_blob); From 98f5c60fbda773ba5620941adf1cb96b3b2ff758 Mon Sep 17 00:00:00 2001 From: Eric Auger Date: Tue, 19 Oct 2021 10:00:37 +0200 Subject: [PATCH 11/19] bios-tables-test: Generate reference table for virt/DBG2 Add the DBG2 table generated with tests/data/acpi/rebuild-expected-aml.sh Signed-off-by: Eric Auger Acked-by: Michael S. Tsirkin Message-Id: <20211019080037.930641-4-eric.auger@redhat.com> Signed-off-by: Richard Henderson --- tests/data/acpi/virt/DBG2 | Bin 0 -> 87 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/DBG2 b/tests/data/acpi/virt/DBG2 index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..86e6314f7b0235ef8ed3e0221e09f996c41f5e98 100644 GIT binary patch literal 87 zcmZ>9ayJTR0D|*Q{>~o33QiFL&I&-l2owUbL9`AKgJ=eA21Zr}H4uw|p@A7lh%qQJ TFmQk+Il-a=3=Gcxz6J~c3~mVl literal 0 HcmV?d00001 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 1910d154c2..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/DBG2", From 31511b6fe0251806f425b5a671c6d211e030162d Mon Sep 17 00:00:00 2001 From: Yanan Wang Date: Wed, 20 Oct 2021 22:21:18 +0800 Subject: [PATCH 12/19] hw/arm/virt: Only describe cpu topology since virt-6.2 On existing older machine types, without cpu topology described in ACPI or DT, the guest will populate one by default. With the topology described, it will read the information and set up its topology as instructed, but that may not be the same as what was getting used by default. It's possible that an user application has a dependency on the default topology and if the default one gets changed it will probably behave differently. Based on above consideration we'd better only describe topology information to the guest on 6.2 and later machine types. Signed-off-by: Yanan Wang Reviewed-by: Andrew Jones Message-Id: <20211020142125.7516-2-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- hw/arm/virt.c | 1 + include/hw/arm/virt.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 4160d49688..15e8d8cf4a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2816,6 +2816,7 @@ static void virt_machine_6_1_options(MachineClass *mc) virt_machine_6_2_options(mc); compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len); mc->smp_props.prefer_sockets = true; + vmc->no_cpu_topology = true; /* qemu ITS was introduced with 6.2 */ vmc->no_tcg_its = true; diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index b461b8d261..dc6b66ffc8 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -125,11 +125,13 @@ struct VirtMachineClass { bool claim_edge_triggered_timers; bool smbios_old_sys_ver; bool no_highmem_ecam; - bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ + bool no_ged; /* Machines < 4.2 have no support for ACPI GED device */ bool kvm_no_adjvtime; bool no_kvm_steal_time; bool acpi_expose_flash; bool no_secure_gpio; + /* Machines < 6.2 have no support for describing cpu topology to guest */ + bool no_cpu_topology; }; struct VirtMachineState { From b863f0b75852dfd62b3f31b08eeddd3b03694fc2 Mon Sep 17 00:00:00 2001 From: Yanan Wang Date: Wed, 20 Oct 2021 22:21:19 +0800 Subject: [PATCH 13/19] device_tree: Add qemu_fdt_add_path qemu_fdt_add_path() works like qemu_fdt_add_subnode(), except it also adds all missing subnodes from the given path. We'll use it in a coming patch where we will add cpu-map to the device tree. And we also tweak an error message of qemu_fdt_add_subnode(). Co-developed-by: Andrew Jones Signed-off-by: Yanan Wang Reviewed-by: David Gibson Reviewed-by: Andrew Jones Cc: David Gibson Cc: Alistair Francis Message-Id: <20211020142125.7516-3-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- include/sysemu/device_tree.h | 1 + softmmu/device_tree.c | 44 ++++++++++++++++++++++++++++++++++-- 2 files changed, 43 insertions(+), 2 deletions(-) diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h index 8a2fe55622..ef060a9759 100644 --- a/include/sysemu/device_tree.h +++ b/include/sysemu/device_tree.h @@ -121,6 +121,7 @@ uint32_t qemu_fdt_get_phandle(void *fdt, const char *path); uint32_t qemu_fdt_alloc_phandle(void *fdt); int qemu_fdt_nop_node(void *fdt, const char *node_path); int qemu_fdt_add_subnode(void *fdt, const char *name); +int qemu_fdt_add_path(void *fdt, const char *path); #define qemu_fdt_setprop_cells(fdt, node_path, property, ...) \ do { \ diff --git a/softmmu/device_tree.c b/softmmu/device_tree.c index b621f63fba..3965c834ca 100644 --- a/softmmu/device_tree.c +++ b/softmmu/device_tree.c @@ -540,8 +540,8 @@ int qemu_fdt_add_subnode(void *fdt, const char *name) retval = fdt_add_subnode(fdt, parent, basename); if (retval < 0) { - error_report("FDT: Failed to create subnode %s: %s", name, - fdt_strerror(retval)); + error_report("%s: Failed to create subnode %s: %s", + __func__, name, fdt_strerror(retval)); exit(1); } @@ -549,6 +549,46 @@ int qemu_fdt_add_subnode(void *fdt, const char *name) return retval; } +/* + * qemu_fdt_add_path: Like qemu_fdt_add_subnode(), but will add + * all missing subnodes from the given path. + */ +int qemu_fdt_add_path(void *fdt, const char *path) +{ + const char *name; + const char *p = path; + int namelen, retval; + int parent = 0; + + if (path[0] != '/') { + return -1; + } + + while (p) { + name = p + 1; + p = strchr(name, '/'); + namelen = p != NULL ? p - name : strlen(name); + + retval = fdt_subnode_offset_namelen(fdt, parent, name, namelen); + if (retval < 0 && retval != -FDT_ERR_NOTFOUND) { + error_report("%s: Unexpected error in finding subnode %.*s: %s", + __func__, namelen, name, fdt_strerror(retval)); + exit(1); + } else if (retval == -FDT_ERR_NOTFOUND) { + retval = fdt_add_subnode_namelen(fdt, parent, name, namelen); + if (retval < 0) { + error_report("%s: Failed to create subnode %.*s: %s", + __func__, namelen, name, fdt_strerror(retval)); + exit(1); + } + } + + parent = retval; + } + + return retval; +} + void qemu_fdt_dumpdtb(void *fdt, int size) { const char *dumpdtb = current_machine->dumpdtb; From 72b0527ff6ab09502e0b320050eb086fc4d61d26 Mon Sep 17 00:00:00 2001 From: Andrew Jones Date: Wed, 20 Oct 2021 22:21:20 +0800 Subject: [PATCH 14/19] hw/arm/virt: Add cpu-map to device tree Support device tree CPU topology descriptions. In accordance with the Devicetree Specification, the Linux Doc "arm/cpus.yaml" requires that cpus and cpu nodes in the DT are present. And we have already met the requirement by generating /cpus/cpu@* nodes for members within ms->smp.cpus. Accordingly, we should also create subnodes in cpu-map for the present cpus, each of which relates to an unique cpu node. The Linux Doc "cpu/cpu-topology.txt" states that the hierarchy of CPUs in a SMP system is defined through four entities and they are socket/cluster/core/thread. It is also required that a socket node's child nodes must be one or more cluster nodes. Given that currently we are only provided with information of socket/core/thread, we assume there is one cluster child node in each socket node when creating cpu-map. Co-developed-by: Yanan Wang Signed-off-by: Andrew Jones Signed-off-by: Yanan Wang Message-Id: <20211020142125.7516-4-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- hw/arm/virt.c | 70 +++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 60 insertions(+), 10 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 15e8d8cf4a..ca433adb5b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -351,20 +351,21 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) int cpu; int addr_cells = 1; const MachineState *ms = MACHINE(vms); + const VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); int smp_cpus = ms->smp.cpus; /* - * From Documentation/devicetree/bindings/arm/cpus.txt - * On ARM v8 64-bit systems value should be set to 2, - * that corresponds to the MPIDR_EL1 register size. - * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs - * in the system, #address-cells can be set to 1, since - * MPIDR_EL1[63:32] bits are not used for CPUs - * identification. + * See Linux Documentation/devicetree/bindings/arm/cpus.yaml + * On ARM v8 64-bit systems value should be set to 2, + * that corresponds to the MPIDR_EL1 register size. + * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs + * in the system, #address-cells can be set to 1, since + * MPIDR_EL1[63:32] bits are not used for CPUs + * identification. * - * Here we actually don't know whether our system is 32- or 64-bit one. - * The simplest way to go is to examine affinity IDs of all our CPUs. If - * at least one of them has Aff3 populated, we set #address-cells to 2. + * Here we actually don't know whether our system is 32- or 64-bit one. + * The simplest way to go is to examine affinity IDs of all our CPUs. If + * at least one of them has Aff3 populated, we set #address-cells to 2. */ for (cpu = 0; cpu < smp_cpus; cpu++) { ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu)); @@ -407,8 +408,57 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) ms->possible_cpus->cpus[cs->cpu_index].props.node_id); } + if (!vmc->no_cpu_topology) { + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", + qemu_fdt_alloc_phandle(ms->fdt)); + } + g_free(nodename); } + + if (!vmc->no_cpu_topology) { + /* + * Add vCPU topology description through fdt node cpu-map. + * + * See Linux Documentation/devicetree/bindings/cpu/cpu-topology.txt + * In a SMP system, the hierarchy of CPUs can be defined through + * four entities that are used to describe the layout of CPUs in + * the system: socket/cluster/core/thread. + * + * A socket node represents the boundary of system physical package + * and its child nodes must be one or more cluster nodes. A system + * can contain several layers of clustering within a single physical + * package and cluster nodes can be contained in parent cluster nodes. + * + * Given that cluster is not yet supported in the vCPU topology, + * we currently generate one cluster node within each socket node + * by default. + */ + qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map"); + + for (cpu = smp_cpus - 1; cpu >= 0; cpu--) { + char *cpu_path = g_strdup_printf("/cpus/cpu@%d", cpu); + char *map_path; + + if (ms->smp.threads > 1) { + map_path = g_strdup_printf( + "/cpus/cpu-map/socket%d/cluster0/core%d/thread%d", + cpu / (ms->smp.cores * ms->smp.threads), + (cpu / ms->smp.threads) % ms->smp.cores, + cpu % ms->smp.threads); + } else { + map_path = g_strdup_printf( + "/cpus/cpu-map/socket%d/cluster0/core%d", + cpu / ms->smp.cores, + cpu % ms->smp.cores); + } + qemu_fdt_add_path(ms->fdt, map_path); + qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path); + + g_free(map_path); + g_free(cpu_path); + } + } } static void fdt_add_its_gic_node(VirtMachineState *vms) From 9de36ef87270b669219b973362a948347ab382f4 Mon Sep 17 00:00:00 2001 From: Yanan Wang Date: Wed, 20 Oct 2021 22:21:21 +0800 Subject: [PATCH 15/19] hw/acpi/aml-build: Add Processor hierarchy node structure Add a generic API to build Processor hierarchy node structure (Type 0), which is strictly consistent with descriptions in ACPI 6.3: 5.2.29.1. This function will be used to build ACPI PPTT table for cpu topology. Co-developed-by: Ying Fang Co-developed-by: Henglong Fan Co-developed-by: Yanan Wang Signed-off-by: Yanan Wang Reviewed-by: Andrew Jones Reviewed-by: Michael S. Tsirkin Reviewed-by: Eric Auger Message-Id: <20211020142125.7516-5-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- hw/acpi/aml-build.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 76af0ebaf9..5195324585 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1964,6 +1964,36 @@ void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, acpi_table_end(linker, &table); } +/* + * ACPI spec, Revision 6.3 + * 5.2.29.1 Processor hierarchy node structure (Type 0) + */ +static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, + uint32_t parent, uint32_t id, + uint32_t *priv_rsrc, + uint32_t priv_num) +{ + int i; + + build_append_byte(tbl, 0); /* Type 0 - processor */ + build_append_byte(tbl, 20 + priv_num * 4); /* Length */ + build_append_int_noprefix(tbl, 0, 2); /* Reserved */ + build_append_int_noprefix(tbl, flags, 4); /* Flags */ + build_append_int_noprefix(tbl, parent, 4); /* Parent */ + build_append_int_noprefix(tbl, id, 4); /* ACPI Processor ID */ + + /* Number of private resources */ + build_append_int_noprefix(tbl, priv_num, 4); + + /* Private resources[N] */ + if (priv_num > 0) { + assert(priv_rsrc); + for (i = 0; i < priv_num; i++) { + build_append_int_noprefix(tbl, priv_rsrc[i], 4); + } + } +} + /* build rev1/rev3/rev5.1 FADT */ void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id) From 099f2df2e6b0ec1b0f1d4e518f730594a66661a8 Mon Sep 17 00:00:00 2001 From: Andrew Jones Date: Wed, 20 Oct 2021 22:21:22 +0800 Subject: [PATCH 16/19] hw/acpi/aml-build: Add PPTT table Add the Processor Properties Topology Table (PPTT) used to describe CPU topology information to ACPI guests. Note, a DT-boot Linux guest with a non-flat CPU topology will see socket and core IDs being sequential integers starting from zero, which is different from ACPI-boot Linux guest, e.g. with -smp 4,sockets=2,cores=2,threads=1 a DT boot produces: cpu: 0 package_id: 0 core_id: 0 cpu: 1 package_id: 0 core_id: 1 cpu: 2 package_id: 1 core_id: 0 cpu: 3 package_id: 1 core_id: 1 an ACPI boot produces: cpu: 0 package_id: 36 core_id: 0 cpu: 1 package_id: 36 core_id: 1 cpu: 2 package_id: 96 core_id: 2 cpu: 3 package_id: 96 core_id: 3 This is due to several reasons: 1) DT cpu nodes do not have an equivalent field to what the PPTT ACPI Processor ID must be, i.e. something equal to the MADT CPU UID or equal to the UID of an ACPI processor container. In both ACPI cases those are platform dependant IDs assigned by the vendor. 2) While QEMU is the vendor for a guest, if the topology specifies SMT (> 1 thread), then, with ACPI, it is impossible to assign a core-id the same value as a package-id, thus it is not possible to have package-id=0 and core-id=0. This is because package and core containers must be in the same ACPI namespace and therefore must have unique UIDs. 3) ACPI processor containers are not mandatorily required for PPTT tables to be used and, due to the limitations of which IDs are selected described above in (2), they are not helpful for QEMU, so we don't build them with this patch. In the absence of them, Linux assigns its own unique IDs. The maintainers have chosen not to use counters from zero, but rather ACPI table offsets, which explains why the numbers are so much larger than with DT. 4) When there is no SMT (threads=1) the core IDs for ACPI boot guests match the logical CPU IDs, because these IDs must be equal to the MADT CPU UID (as no processor containers are present), and QEMU uses the logical CPU ID for these MADT IDs. So in summary, with QEMU as the vendor for the guests, we simply use sequential integers starting from zero for the non-leaf nodes but with ID-valid flag unset, so that guest will ignore them and use table offsets as unique container IDs. And we use logical CPU IDs for the leaf nodes with the ID-valid flag set, which will be consistent with MADT. Currently the implementation of PPTT generation complies with ACPI specification 5.2.29 (Revision 6.3). The 6.3 spec can be found at: https://uefi.org/sites/default/files/resources/ACPI_6_3_May16.pdf Reviewed-by: Eric Auger Co-developed-by: Yanan Wang Signed-off-by: Andrew Jones Signed-off-by: Yanan Wang Reviewed-by: Michael S. Tsirkin Message-Id: <20211020142125.7516-6-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- hw/acpi/aml-build.c | 59 +++++++++++++++++++++++++++++++++++++ include/hw/acpi/aml-build.h | 3 ++ 2 files changed, 62 insertions(+) diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index 5195324585..b3b3310df3 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1994,6 +1994,65 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, } } +/* + * ACPI spec, Revision 6.3 + * 5.2.29 Processor Properties Topology Table (PPTT) + */ +void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms, + const char *oem_id, const char *oem_table_id) +{ + int pptt_start = table_data->len; + int uid = 0; + int socket; + AcpiTable table = { .sig = "PPTT", .rev = 2, + .oem_id = oem_id, .oem_table_id = oem_table_id }; + + acpi_table_begin(&table, table_data); + + for (socket = 0; socket < ms->smp.sockets; socket++) { + uint32_t socket_offset = table_data->len - pptt_start; + int core; + + build_processor_hierarchy_node( + table_data, + /* + * Physical package - represents the boundary + * of a physical package + */ + (1 << 0), + 0, socket, NULL, 0); + + for (core = 0; core < ms->smp.cores; core++) { + uint32_t core_offset = table_data->len - pptt_start; + int thread; + + if (ms->smp.threads > 1) { + build_processor_hierarchy_node( + table_data, + (0 << 0), /* not a physical package */ + socket_offset, core, NULL, 0); + + for (thread = 0; thread < ms->smp.threads; thread++) { + build_processor_hierarchy_node( + table_data, + (1 << 1) | /* ACPI Processor ID valid */ + (1 << 2) | /* Processor is a Thread */ + (1 << 3), /* Node is a Leaf */ + core_offset, uid++, NULL, 0); + } + } else { + build_processor_hierarchy_node( + table_data, + (1 << 1) | /* ACPI Processor ID valid */ + (1 << 3), /* Node is a Leaf */ + socket_offset, uid++, NULL, 0); + } + } + } + + acpi_table_end(linker, &table); +} + /* build rev1/rev3/rev5.1 FADT */ void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id) diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 3cf6f2c1b9..8346003a22 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -489,6 +489,9 @@ void build_srat_memory(GArray *table_data, uint64_t base, void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, const char *oem_id, const char *oem_table_id); +void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms, + const char *oem_id, const char *oem_table_id); + void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id); From 4ebd52b92a560094f5127fa9478044084636cbdf Mon Sep 17 00:00:00 2001 From: Yanan Wang Date: Wed, 20 Oct 2021 22:21:23 +0800 Subject: [PATCH 17/19] tests/data/acpi/virt: Add an empty expected file for PPTT Add a generic empty binary file for the new introduced PPTT table under tests/data/acpi/virt, and list it as files to be changed in tests/qtest/bios-tables-test-allowed-diff.h Signed-off-by: Yanan Wang Reviewed-by: Eric Auger Message-Id: <20211020142125.7516-7-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- tests/data/acpi/virt/PPTT | 0 tests/qtest/bios-tables-test-allowed-diff.h | 1 + 2 files changed, 1 insertion(+) create mode 100644 tests/data/acpi/virt/PPTT diff --git a/tests/data/acpi/virt/PPTT b/tests/data/acpi/virt/PPTT new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..cb143a55a6 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/PPTT", From 70d23ed534efa038bb10af9f1c537d4eeb0db137 Mon Sep 17 00:00:00 2001 From: Yanan Wang Date: Wed, 20 Oct 2021 22:21:24 +0800 Subject: [PATCH 18/19] hw/arm/virt-acpi-build: Generate PPTT table Generate the Processor Properties Topology Table (PPTT) for ARM virt machines supporting it (>= 6.2). Signed-off-by: Yanan Wang Reviewed-by: Andrew Jones Reviewed-by: Eric Auger Message-Id: <20211020142125.7516-8-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- hw/arm/virt-acpi-build.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index d3bb4cba3e..674f902652 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -943,13 +943,19 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) dsdt = tables_blob->len; build_dsdt(tables_blob, tables->linker, vms); - /* FADT MADT GTDT MCFG SPCR DBG2 pointed to by RSDT */ + /* FADT MADT PPTT GTDT MCFG SPCR DBG2 pointed to by RSDT */ acpi_add_table(table_offsets, tables_blob); build_fadt_rev5(tables_blob, tables->linker, vms, dsdt); acpi_add_table(table_offsets, tables_blob); build_madt(tables_blob, tables->linker, vms); + if (!vmc->no_cpu_topology) { + acpi_add_table(table_offsets, tables_blob); + build_pptt(tables_blob, tables->linker, ms, + vms->oem_id, vms->oem_table_id); + } + acpi_add_table(table_offsets, tables_blob); build_gtdt(tables_blob, tables->linker, vms); From f801789ff00f457044dcd91323316dbde42578d1 Mon Sep 17 00:00:00 2001 From: Yanan Wang Date: Wed, 20 Oct 2021 22:21:25 +0800 Subject: [PATCH 19/19] tests/data/acpi/virt: Update the empty expected file for PPTT Run ./tests/data/acpi/rebuild-expected-aml.sh from build directory to update PPTT binary. Also empty bios-tables-test-allowed-diff.h. Disassembled output of the updated new file: /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20180810 (64-bit version) * Copyright (c) 2000 - 2018 Intel Corporation * * Disassembly of tests/data/acpi/virt/PPTT, Fri Oct 8 10:12:32 2021 * * ACPI Data Table [PPTT] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */ [000h 0000 4] Signature : "PPTT" [Processor Properties Topology Table] [004h 0004 4] Table Length : 0000004C [008h 0008 1] Revision : 02 [009h 0009 1] Checksum : A8 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 1] Subtable Type : 00 [Processor Hierarchy Node] [025h 0037 1] Length : 14 [026h 0038 2] Reserved : 0000 [028h 0040 4] Flags (decoded below) : 00000001 Physical package : 1 ACPI Processor ID valid : 0 [02Ch 0044 4] Parent : 00000000 [030h 0048 4] ACPI Processor ID : 00000000 [034h 0052 4] Private Resource Number : 00000000 [038h 0056 1] Subtable Type : 00 [Processor Hierarchy Node] [039h 0057 1] Length : 14 [03Ah 0058 2] Reserved : 0000 [03Ch 0060 4] Flags (decoded below) : 0000000A Physical package : 0 ACPI Processor ID valid : 1 [040h 0064 4] Parent : 00000024 [044h 0068 4] ACPI Processor ID : 00000000 [048h 0072 4] Private Resource Number : 00000000 Raw Table Data: Length 76 (0x4C) 0000: 50 50 54 54 4C 00 00 00 02 A8 42 4F 43 48 53 20 // PPTTL.....BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 00 14 00 00 01 00 00 00 00 00 00 00 // ................ 0030: 00 00 00 00 00 00 00 00 00 14 00 00 0A 00 00 00 // ................ 0040: 24 00 00 00 00 00 00 00 00 00 00 00 // $........... Reviewed-by: Eric Auger Signed-off-by: Yanan Wang Message-Id: <20211020142125.7516-9-wangyanan55@huawei.com> Signed-off-by: Richard Henderson --- tests/data/acpi/virt/PPTT | Bin 0 -> 76 bytes tests/qtest/bios-tables-test-allowed-diff.h | 1 - 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/PPTT b/tests/data/acpi/virt/PPTT index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..7a1258ecf123555b24462c98ccbb76b4ac1d0c2b 100644 GIT binary patch literal 76 zcmWFt2nq3FU|?Wc;pFe^5v<@85#X!<1dKp25F11@h%hjKX%HI*fMQ%gwhD|7qyeJ> B2LS*8 literal 0 HcmV?d00001 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index cb143a55a6..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/PPTT",