From 97a8e4c294a6090a98485441409c4fcd90214648 Mon Sep 17 00:00:00 2001 From: Yufei Li <96868335+nine-point-eight-p@users.noreply.github.com> Date: Mon, 4 Nov 2024 18:10:25 +0800 Subject: [PATCH] Add RISCV support in `libafl_qemu.h` (#2380) * Add riscv support in libafl qemu header --------- Co-authored-by: Romain Malmain --- libafl_qemu/runtime/libafl_qemu_arch.h | 47 ++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/libafl_qemu/runtime/libafl_qemu_arch.h b/libafl_qemu/runtime/libafl_qemu_arch.h index 1d4ba21200..cedba1e448 100644 --- a/libafl_qemu/runtime/libafl_qemu_arch.h +++ b/libafl_qemu/runtime/libafl_qemu_arch.h @@ -230,9 +230,56 @@ : "=r"(ret) \ : "r"(action), "r"(arg1), "r"(arg2) \ : "x0", "x1", "x2" \ + ); \ + return ret; \ + } \ + #elif defined(__riscv) \ + #define LIBAFL_DEFINE_FUNCTIONS(name, opcode) \ + libafl_word LIBAFL_CALLING_CONVENTION _libafl_##name##_call0( \ + libafl_word action) { \ + libafl_word ret; \ + __asm__ volatile ( \ + "mv a0, %1\n" \ + ".word " XSTRINGIFY(opcode) "\n" \ + "mv a0, a0\n" \ + : "=r"(ret) \ + : "r"(action) \ + : "a0" \ + ); \ + return ret; \ + } \ + \ + libafl_word LIBAFL_CALLING_CONVENTION _libafl_##name##_call1( \ + libafl_word action, libafl_word arg1) { \ + libafl_word ret; \ + __asm__ volatile ( \ + "mv a0, %1\n" \ + "mv a1, %2\n" \ + ".word " XSTRINGIFY(opcode) "\n" \ + "mv %0, a0\n" \ + : "=r"(ret) \ + : "r"(action), "r"(arg1) \ + : "a0", "a1" \ + ); \ + return ret; \ + } \ + \ + libafl_word LIBAFL_CALLING_CONVENTION _libafl_##name##_call2( \ + libafl_word action, libafl_word arg1, libafl_word arg2) { \ + libafl_word ret; \ + __asm__ volatile ( \ + "mv a0, %1\n" \ + "mv a1, %2\n" \ + "mv a2, %3\n" \ + ".word " XSTRINGIFY(opcode) "\n" \ + "mv %0, a0\n" \ + : "=r"(ret) \ + : "r"(action), "r"(arg1), "r"(arg2) \ + : "a0", "a1", "a2" \ ); \ return ret; \ } + #else #warning "LibAFL QEMU Runtime does not support your architecture yet, please leave an issue." #endif