From 8b2e86e7e6b8029c876e64237fff9ba6cf8264eb Mon Sep 17 00:00:00 2001
From: Omree <you@example.com>
Date: Sun, 9 May 2021 18:12:13 +0300
Subject: [PATCH] fix compile error

---
 libafl_frida/src/helper.rs | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/libafl_frida/src/helper.rs b/libafl_frida/src/helper.rs
index daf44cdaab..0a7b658371 100644
--- a/libafl_frida/src/helper.rs
+++ b/libafl_frida/src/helper.rs
@@ -424,7 +424,7 @@ impl<'a> FridaInstrumentationHelper<'a> {
                 writer.put_ldr_reg_u64(Aarch64Register::X0, value);
             }
             CmplogOperandType::Regid(reg) => {
-                let reg = self.get_writer_register(reg);
+                let reg = self.writer_register(reg);
                 match reg {
                     Aarch64Register::X0 | Aarch64Register::W0 => {}
                     Aarch64Register::X1 | Aarch64Register::W1 => {
@@ -438,9 +438,9 @@ impl<'a> FridaInstrumentationHelper<'a> {
                 }
             }
             CmplogOperandType::Mem(basereg, indexreg, displacement, width) => {
-                let basereg = self.get_writer_register(basereg);
+                let basereg = self.writer_register(basereg);
                 let indexreg = if indexreg.0 != 0 {
-                    Some(self.get_writer_register(indexreg))
+                    Some(self.writer_register(indexreg))
                 } else {
                     None
                 };
@@ -489,7 +489,7 @@ impl<'a> FridaInstrumentationHelper<'a> {
                 writer.put_ldr_reg_u64(Aarch64Register::X1, value);
             }
             CmplogOperandType::Regid(reg) => {
-                let reg = self.get_writer_register(reg);
+                let reg = self.writer_register(reg);
                 match reg {
                     Aarch64Register::X1 | Aarch64Register::W1 => {}
                     Aarch64Register::X0 | Aarch64Register::W0 => {
@@ -507,9 +507,9 @@ impl<'a> FridaInstrumentationHelper<'a> {
                 }
             }
             CmplogOperandType::Mem(basereg, indexreg, displacement, width) => {
-                let basereg = self.get_writer_register(basereg);
+                let basereg = self.writer_register(basereg);
                 let indexreg = if indexreg.0 != 0 {
-                    Some(self.get_writer_register(indexreg))
+                    Some(self.writer_register(indexreg))
                 } else {
                     None
                 };
@@ -1059,7 +1059,7 @@ impl<'a> FridaInstrumentationHelper<'a> {
                     opmem.base(),
                     opmem.index(),
                     opmem.disp(),
-                    self.get_instruction_width(instr, &operands),
+                    self.instruction_width(instr, &operands),
                 )),
                 Arm64OperandType::Cimm(val) => Some(CmplogOperandType::Cimm(val as u64)),
                 _ => return Err(()),
@@ -1076,7 +1076,7 @@ impl<'a> FridaInstrumentationHelper<'a> {
                     opmem.base(),
                     opmem.index(),
                     opmem.disp(),
-                    self.get_instruction_width(instr, &operands),
+                    self.instruction_width(instr, &operands),
                 )),
                 Arm64OperandType::Cimm(val) => Some(CmplogOperandType::Cimm(val as u64)),
                 _ => return Err(()),