From 58607dc333ff61c270b8cd0f5e4a21cf53eeab17 Mon Sep 17 00:00:00 2001 From: Romain Malmain Date: Tue, 25 Mar 2025 14:34:44 +0100 Subject: [PATCH] Update QEMU to v9.2.2 (#3088) * update qemu to v9.2.2 * alignment field has been removed --- libafl_qemu/libafl_qemu_build/src/build.rs | 4 +- .../src/bindings/x86_64_stub_bindings.rs | 914 ++++++++++-------- .../runtime/libafl_qemu_stub_bindings.rs | 2 +- libafl_qemu/runtime/nyx_stub_bindings.rs | 2 +- libafl_qemu/src/qemu/usermode.rs | 2 - 5 files changed, 509 insertions(+), 415 deletions(-) diff --git a/libafl_qemu/libafl_qemu_build/src/build.rs b/libafl_qemu/libafl_qemu_build/src/build.rs index a53facb483..acd4bd83cc 100644 --- a/libafl_qemu/libafl_qemu_build/src/build.rs +++ b/libafl_qemu/libafl_qemu_build/src/build.rs @@ -11,7 +11,7 @@ use crate::cargo_add_rpath; pub const QEMU_URL: &str = "https://github.com/AFLplusplus/qemu-libafl-bridge"; pub const QEMU_DIRNAME: &str = "qemu-libafl-bridge"; -pub const QEMU_REVISION: &str = "4df4d2dcfa0d2eecfb267cddf5ebfb8ef9f58d87"; +pub const QEMU_REVISION: &str = "2a676d9cd8c474b5c0db1d77d2769e56e2ed8524"; pub struct BuildResult { pub qemu_path: PathBuf, @@ -100,7 +100,7 @@ fn configure_qemu( } if cfg!(feature = "qemu_sanitizers") { - cmd.arg("--enable-sanitizers"); + cmd.arg("--enable-asan"); } if is_usermode { diff --git a/libafl_qemu/libafl_qemu_sys/src/bindings/x86_64_stub_bindings.rs b/libafl_qemu/libafl_qemu_sys/src/bindings/x86_64_stub_bindings.rs index 720c856dc8..98c2a0489b 100644 --- a/libafl_qemu/libafl_qemu_sys/src/bindings/x86_64_stub_bindings.rs +++ b/libafl_qemu/libafl_qemu_sys/src/bindings/x86_64_stub_bindings.rs @@ -1,5 +1,5 @@ /* 1.87.0-nightly */ -/* qemu git hash: fea68856b9410ca6f0076a6bf9ccc4b4b11aa09c */ +/* qemu git hash: 2a676d9cd8c474b5c0db1d77d2769e56e2ed8524 */ /* automatically generated by rust-bindgen 0.71.1 */ use libc::siginfo_t; @@ -1119,6 +1119,9 @@ impl Default for QEnumLookup { unsafe extern "C" { pub fn qemu_target_page_size() -> usize; } +unsafe extern "C" { + pub fn qemu_target_page_mask() -> ::std::os::raw::c_int; +} #[repr(C)] #[derive(Copy, Clone)] pub struct QemuMutex { @@ -1206,22 +1209,11 @@ const _: () = { ["Offset of field: QemuSpin::value"][::std::mem::offset_of!(QemuSpin, value) - 0usize]; }; #[repr(C)] -#[derive(Debug, Default, Copy, Clone)] -pub struct QemuLockCnt { - pub count: ::std::os::raw::c_uint, -} -#[allow(clippy::unnecessary_operation, clippy::identity_op)] -const _: () = { - ["Size of QemuLockCnt"][::std::mem::size_of::() - 4usize]; - ["Alignment of QemuLockCnt"][::std::mem::align_of::() - 4usize]; - ["Offset of field: QemuLockCnt::count"][::std::mem::offset_of!(QemuLockCnt, count) - 0usize]; -}; -#[repr(C)] #[repr(align(4))] #[derive(Debug, Default, Copy, Clone)] pub struct MemTxAttrs { pub _bitfield_align_1: [u16; 0], - pub _bitfield_1: __BindgenBitfieldUnit<[u8; 3usize]>, + pub _bitfield_1: __BindgenBitfieldUnit<[u8; 4usize]>, } #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { @@ -1243,7 +1235,7 @@ impl MemTxAttrs { #[inline] pub unsafe fn unspecified_raw(this: *const Self) -> ::std::os::raw::c_uint { unsafe { - ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 3usize]>>::raw_get( + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get( ::std::ptr::addr_of!((*this)._bitfield_1), 0usize, 1u8, @@ -1254,7 +1246,7 @@ impl MemTxAttrs { pub unsafe fn set_unspecified_raw(this: *mut Self, val: ::std::os::raw::c_uint) { unsafe { let val: u32 = ::std::mem::transmute(val); - <__BindgenBitfieldUnit<[u8; 3usize]>>::raw_set( + <__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set( ::std::ptr::addr_of_mut!((*this)._bitfield_1), 0usize, 1u8, @@ -1276,7 +1268,7 @@ impl MemTxAttrs { #[inline] pub unsafe fn secure_raw(this: *const Self) -> ::std::os::raw::c_uint { unsafe { - ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 3usize]>>::raw_get( + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get( ::std::ptr::addr_of!((*this)._bitfield_1), 1usize, 1u8, @@ -1287,7 +1279,7 @@ impl MemTxAttrs { pub unsafe fn set_secure_raw(this: *mut Self, val: ::std::os::raw::c_uint) { unsafe { let val: u32 = ::std::mem::transmute(val); - <__BindgenBitfieldUnit<[u8; 3usize]>>::raw_set( + <__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set( ::std::ptr::addr_of_mut!((*this)._bitfield_1), 1usize, 1u8, @@ -1309,7 +1301,7 @@ impl MemTxAttrs { #[inline] pub unsafe fn space_raw(this: *const Self) -> ::std::os::raw::c_uint { unsafe { - ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 3usize]>>::raw_get( + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get( ::std::ptr::addr_of!((*this)._bitfield_1), 2usize, 2u8, @@ -1320,7 +1312,7 @@ impl MemTxAttrs { pub unsafe fn set_space_raw(this: *mut Self, val: ::std::os::raw::c_uint) { unsafe { let val: u32 = ::std::mem::transmute(val); - <__BindgenBitfieldUnit<[u8; 3usize]>>::raw_set( + <__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set( ::std::ptr::addr_of_mut!((*this)._bitfield_1), 2usize, 2u8, @@ -1342,7 +1334,7 @@ impl MemTxAttrs { #[inline] pub unsafe fn user_raw(this: *const Self) -> ::std::os::raw::c_uint { unsafe { - ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 3usize]>>::raw_get( + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get( ::std::ptr::addr_of!((*this)._bitfield_1), 4usize, 1u8, @@ -1353,7 +1345,7 @@ impl MemTxAttrs { pub unsafe fn set_user_raw(this: *mut Self, val: ::std::os::raw::c_uint) { unsafe { let val: u32 = ::std::mem::transmute(val); - <__BindgenBitfieldUnit<[u8; 3usize]>>::raw_set( + <__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set( ::std::ptr::addr_of_mut!((*this)._bitfield_1), 4usize, 1u8, @@ -1375,7 +1367,7 @@ impl MemTxAttrs { #[inline] pub unsafe fn memory_raw(this: *const Self) -> ::std::os::raw::c_uint { unsafe { - ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 3usize]>>::raw_get( + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get( ::std::ptr::addr_of!((*this)._bitfield_1), 5usize, 1u8, @@ -1386,7 +1378,7 @@ impl MemTxAttrs { pub unsafe fn set_memory_raw(this: *mut Self, val: ::std::os::raw::c_uint) { unsafe { let val: u32 = ::std::mem::transmute(val); - <__BindgenBitfieldUnit<[u8; 3usize]>>::raw_set( + <__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set( ::std::ptr::addr_of_mut!((*this)._bitfield_1), 5usize, 1u8, @@ -1408,7 +1400,7 @@ impl MemTxAttrs { #[inline] pub unsafe fn requester_id_raw(this: *const Self) -> ::std::os::raw::c_uint { unsafe { - ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 3usize]>>::raw_get( + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get( ::std::ptr::addr_of!((*this)._bitfield_1), 6usize, 16u8, @@ -1419,7 +1411,7 @@ impl MemTxAttrs { pub unsafe fn set_requester_id_raw(this: *mut Self, val: ::std::os::raw::c_uint) { unsafe { let val: u32 = ::std::mem::transmute(val); - <__BindgenBitfieldUnit<[u8; 3usize]>>::raw_set( + <__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set( ::std::ptr::addr_of_mut!((*this)._bitfield_1), 6usize, 16u8, @@ -1428,6 +1420,39 @@ impl MemTxAttrs { } } #[inline] + pub fn pid(&self) -> ::std::os::raw::c_uint { + unsafe { ::std::mem::transmute(self._bitfield_1.get(22usize, 8u8) as u32) } + } + #[inline] + pub fn set_pid(&mut self, val: ::std::os::raw::c_uint) { + unsafe { + let val: u32 = ::std::mem::transmute(val); + self._bitfield_1.set(22usize, 8u8, val as u64) + } + } + #[inline] + pub unsafe fn pid_raw(this: *const Self) -> ::std::os::raw::c_uint { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 4usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 22usize, + 8u8, + ) as u32) + } + } + #[inline] + pub unsafe fn set_pid_raw(this: *mut Self, val: ::std::os::raw::c_uint) { + unsafe { + let val: u32 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 4usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 22usize, + 8u8, + val as u64, + ) + } + } + #[inline] pub fn new_bitfield_1( unspecified: ::std::os::raw::c_uint, secure: ::std::os::raw::c_uint, @@ -1435,8 +1460,9 @@ impl MemTxAttrs { user: ::std::os::raw::c_uint, memory: ::std::os::raw::c_uint, requester_id: ::std::os::raw::c_uint, - ) -> __BindgenBitfieldUnit<[u8; 3usize]> { - let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 3usize]> = Default::default(); + pid: ::std::os::raw::c_uint, + ) -> __BindgenBitfieldUnit<[u8; 4usize]> { + let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 4usize]> = Default::default(); __bindgen_bitfield_unit.set(0usize, 1u8, { let unspecified: u32 = unsafe { ::std::mem::transmute(unspecified) }; unspecified as u64 @@ -1461,6 +1487,10 @@ impl MemTxAttrs { let requester_id: u32 = unsafe { ::std::mem::transmute(requester_id) }; requester_id as u64 }); + __bindgen_bitfield_unit.set(22usize, 8u8, { + let pid: u32 = unsafe { ::std::mem::transmute(pid) }; + pid as u64 + }); __bindgen_bitfield_unit } } @@ -1738,7 +1768,10 @@ pub type DeviceRealize = ::std::option::Option; pub type DeviceUnrealize = ::std::option::Option; pub type DeviceReset = ::std::option::Option; -#[doc = " struct DeviceClass - The base class for all devices.\n @props: Properties accessing state fields.\n @realize: Callback function invoked when the #DeviceState:realized\n property is changed to %true.\n @unrealize: Callback function invoked when the #DeviceState:realized\n property is changed to %false.\n @hotpluggable: indicates if #DeviceClass is hotpluggable, available\n as readonly \"hotpluggable\" property of #DeviceState instance\n"] +pub type DeviceSyncConfig = ::std::option::Option< + unsafe extern "C" fn(dev: *mut DeviceState, errp: *mut *mut Error) -> ::std::os::raw::c_int, +>; +#[doc = " struct DeviceClass - The base class for all devices.\n @props: Properties accessing state fields.\n @realize: Callback function invoked when the #DeviceState:realized\n property is changed to %true.\n @unrealize: Callback function invoked when the #DeviceState:realized\n property is changed to %false.\n @sync_config: Callback function invoked when QMP command device-sync-config\n is called. Should synchronize device configuration from host to guest part\n and notify the guest about the change.\n @hotpluggable: indicates if #DeviceClass is hotpluggable, available\n as readonly \"hotpluggable\" property of #DeviceState instance\n"] #[repr(C)] #[derive(Debug, Copy, Clone)] pub struct DeviceClass { @@ -1750,14 +1783,15 @@ pub struct DeviceClass { #[doc = " @desc: human readable description of device"] pub desc: *const ::std::os::raw::c_char, #[doc = " @props_: properties associated with device, should only be\n assigned by using device_class_set_props(). The underscore\n ensures a compile-time error if someone attempts to assign\n dc->props directly."] - pub props_: *mut Property, + pub props_: *const Property, #[doc = " @user_creatable: Can user instantiate with -device / device_add?\n\n All devices should support instantiation with device_add, and\n this flag should not exist. But we're not there, yet. Some\n devices fail to instantiate with cryptic error messages.\n Others instantiate, but don't work. Exposing users to such\n behavior would be cruel; clearing this flag will protect them.\n It should never be cleared without a comment explaining why it\n is cleared.\n\n TODO remove once we're there"] pub user_creatable: bool, pub hotpluggable: bool, - #[doc = " @reset: deprecated device reset method pointer\n\n Modern code should use the ResettableClass interface to\n implement a multi-phase reset.\n\n TODO: remove once every reset callback is unused"] - pub reset: DeviceReset, + #[doc = " @legacy_reset: deprecated device reset method pointer\n\n Modern code should use the ResettableClass interface to\n implement a multi-phase reset.\n\n TODO: remove once every reset callback is unused"] + pub legacy_reset: DeviceReset, pub realize: DeviceRealize, pub unrealize: DeviceUnrealize, + pub sync_config: DeviceSyncConfig, #[doc = " @vmsd: device state serialisation description for\n migration/save/restore"] pub vmsd: *const VMStateDescription, #[doc = " @bus_type: bus type\n private: to qdev / bus."] @@ -1765,7 +1799,7 @@ pub struct DeviceClass { } #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { - ["Size of DeviceClass"][::std::mem::size_of::() - 176usize]; + ["Size of DeviceClass"][::std::mem::size_of::() - 184usize]; ["Alignment of DeviceClass"][::std::mem::align_of::() - 8usize]; ["Offset of field: DeviceClass::parent_class"] [::std::mem::offset_of!(DeviceClass, parent_class) - 0usize]; @@ -1780,14 +1814,17 @@ const _: () = { [::std::mem::offset_of!(DeviceClass, user_creatable) - 128usize]; ["Offset of field: DeviceClass::hotpluggable"] [::std::mem::offset_of!(DeviceClass, hotpluggable) - 129usize]; - ["Offset of field: DeviceClass::reset"][::std::mem::offset_of!(DeviceClass, reset) - 136usize]; + ["Offset of field: DeviceClass::legacy_reset"] + [::std::mem::offset_of!(DeviceClass, legacy_reset) - 136usize]; ["Offset of field: DeviceClass::realize"] [::std::mem::offset_of!(DeviceClass, realize) - 144usize]; ["Offset of field: DeviceClass::unrealize"] [::std::mem::offset_of!(DeviceClass, unrealize) - 152usize]; - ["Offset of field: DeviceClass::vmsd"][::std::mem::offset_of!(DeviceClass, vmsd) - 160usize]; + ["Offset of field: DeviceClass::sync_config"] + [::std::mem::offset_of!(DeviceClass, sync_config) - 160usize]; + ["Offset of field: DeviceClass::vmsd"][::std::mem::offset_of!(DeviceClass, vmsd) - 168usize]; ["Offset of field: DeviceClass::bus_type"] - [::std::mem::offset_of!(DeviceClass, bus_type) - 168usize]; + [::std::mem::offset_of!(DeviceClass, bus_type) - 176usize]; }; impl Default for DeviceClass { fn default() -> Self { @@ -2377,13 +2414,12 @@ pub const bfd_architecture_bfd_arch_m32r: bfd_architecture = bfd_architecture(32 pub const bfd_architecture_bfd_arch_mn10200: bfd_architecture = bfd_architecture(33); pub const bfd_architecture_bfd_arch_mn10300: bfd_architecture = bfd_architecture(34); pub const bfd_architecture_bfd_arch_avr: bfd_architecture = bfd_architecture(35); -pub const bfd_architecture_bfd_arch_cris: bfd_architecture = bfd_architecture(36); -pub const bfd_architecture_bfd_arch_microblaze: bfd_architecture = bfd_architecture(37); -pub const bfd_architecture_bfd_arch_moxie: bfd_architecture = bfd_architecture(38); -pub const bfd_architecture_bfd_arch_ia64: bfd_architecture = bfd_architecture(39); -pub const bfd_architecture_bfd_arch_rx: bfd_architecture = bfd_architecture(40); -pub const bfd_architecture_bfd_arch_loongarch: bfd_architecture = bfd_architecture(41); -pub const bfd_architecture_bfd_arch_last: bfd_architecture = bfd_architecture(42); +pub const bfd_architecture_bfd_arch_microblaze: bfd_architecture = bfd_architecture(36); +pub const bfd_architecture_bfd_arch_moxie: bfd_architecture = bfd_architecture(37); +pub const bfd_architecture_bfd_arch_ia64: bfd_architecture = bfd_architecture(38); +pub const bfd_architecture_bfd_arch_rx: bfd_architecture = bfd_architecture(39); +pub const bfd_architecture_bfd_arch_loongarch: bfd_architecture = bfd_architecture(40); +pub const bfd_architecture_bfd_arch_last: bfd_architecture = bfd_architecture(41); impl ::std::ops::BitOr for bfd_architecture { type Output = Self; #[inline] @@ -2914,72 +2950,110 @@ impl ::std::ops::BitAndAssign for OnOffAuto { #[repr(transparent)] #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] pub struct OnOffAuto(pub ::std::os::raw::c_uint); -pub const CpuS390Entitlement_S390_CPU_ENTITLEMENT_AUTO: CpuS390Entitlement = CpuS390Entitlement(0); -pub const CpuS390Entitlement_S390_CPU_ENTITLEMENT_LOW: CpuS390Entitlement = CpuS390Entitlement(1); -pub const CpuS390Entitlement_S390_CPU_ENTITLEMENT_MEDIUM: CpuS390Entitlement = - CpuS390Entitlement(2); -pub const CpuS390Entitlement_S390_CPU_ENTITLEMENT_HIGH: CpuS390Entitlement = CpuS390Entitlement(3); -pub const CpuS390Entitlement_S390_CPU_ENTITLEMENT__MAX: CpuS390Entitlement = CpuS390Entitlement(4); -impl ::std::ops::BitOr for CpuS390Entitlement { +pub const S390CpuEntitlement_S390_CPU_ENTITLEMENT_AUTO: S390CpuEntitlement = S390CpuEntitlement(0); +pub const S390CpuEntitlement_S390_CPU_ENTITLEMENT_LOW: S390CpuEntitlement = S390CpuEntitlement(1); +pub const S390CpuEntitlement_S390_CPU_ENTITLEMENT_MEDIUM: S390CpuEntitlement = + S390CpuEntitlement(2); +pub const S390CpuEntitlement_S390_CPU_ENTITLEMENT_HIGH: S390CpuEntitlement = S390CpuEntitlement(3); +pub const S390CpuEntitlement_S390_CPU_ENTITLEMENT__MAX: S390CpuEntitlement = S390CpuEntitlement(4); +impl ::std::ops::BitOr for S390CpuEntitlement { type Output = Self; #[inline] fn bitor(self, other: Self) -> Self { - CpuS390Entitlement(self.0 | other.0) + S390CpuEntitlement(self.0 | other.0) } } -impl ::std::ops::BitOrAssign for CpuS390Entitlement { +impl ::std::ops::BitOrAssign for S390CpuEntitlement { #[inline] - fn bitor_assign(&mut self, rhs: CpuS390Entitlement) { + fn bitor_assign(&mut self, rhs: S390CpuEntitlement) { self.0 |= rhs.0; } } -impl ::std::ops::BitAnd for CpuS390Entitlement { +impl ::std::ops::BitAnd for S390CpuEntitlement { type Output = Self; #[inline] fn bitand(self, other: Self) -> Self { - CpuS390Entitlement(self.0 & other.0) + S390CpuEntitlement(self.0 & other.0) } } -impl ::std::ops::BitAndAssign for CpuS390Entitlement { +impl ::std::ops::BitAndAssign for S390CpuEntitlement { #[inline] - fn bitand_assign(&mut self, rhs: CpuS390Entitlement) { + fn bitand_assign(&mut self, rhs: S390CpuEntitlement) { self.0 &= rhs.0; } } #[repr(transparent)] #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] -pub struct CpuS390Entitlement(pub ::std::os::raw::c_uint); +pub struct S390CpuEntitlement(pub ::std::os::raw::c_uint); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_THREAD: CpuTopologyLevel = CpuTopologyLevel(0); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_CORE: CpuTopologyLevel = CpuTopologyLevel(1); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_MODULE: CpuTopologyLevel = CpuTopologyLevel(2); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_CLUSTER: CpuTopologyLevel = CpuTopologyLevel(3); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_DIE: CpuTopologyLevel = CpuTopologyLevel(4); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_SOCKET: CpuTopologyLevel = CpuTopologyLevel(5); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_BOOK: CpuTopologyLevel = CpuTopologyLevel(6); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_DRAWER: CpuTopologyLevel = CpuTopologyLevel(7); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL_DEFAULT: CpuTopologyLevel = CpuTopologyLevel(8); +pub const CpuTopologyLevel_CPU_TOPOLOGY_LEVEL__MAX: CpuTopologyLevel = CpuTopologyLevel(9); +impl ::std::ops::BitOr for CpuTopologyLevel { + type Output = Self; + #[inline] + fn bitor(self, other: Self) -> Self { + CpuTopologyLevel(self.0 | other.0) + } +} +impl ::std::ops::BitOrAssign for CpuTopologyLevel { + #[inline] + fn bitor_assign(&mut self, rhs: CpuTopologyLevel) { + self.0 |= rhs.0; + } +} +impl ::std::ops::BitAnd for CpuTopologyLevel { + type Output = Self; + #[inline] + fn bitand(self, other: Self) -> Self { + CpuTopologyLevel(self.0 & other.0) + } +} +impl ::std::ops::BitAndAssign for CpuTopologyLevel { + #[inline] + fn bitand_assign(&mut self, rhs: CpuTopologyLevel) { + self.0 &= rhs.0; + } +} +#[repr(transparent)] +#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] +pub struct CpuTopologyLevel(pub ::std::os::raw::c_uint); pub const SysEmuTarget_SYS_EMU_TARGET_AARCH64: SysEmuTarget = SysEmuTarget(0); pub const SysEmuTarget_SYS_EMU_TARGET_ALPHA: SysEmuTarget = SysEmuTarget(1); pub const SysEmuTarget_SYS_EMU_TARGET_ARM: SysEmuTarget = SysEmuTarget(2); pub const SysEmuTarget_SYS_EMU_TARGET_AVR: SysEmuTarget = SysEmuTarget(3); -pub const SysEmuTarget_SYS_EMU_TARGET_CRIS: SysEmuTarget = SysEmuTarget(4); -pub const SysEmuTarget_SYS_EMU_TARGET_HPPA: SysEmuTarget = SysEmuTarget(5); -pub const SysEmuTarget_SYS_EMU_TARGET_I386: SysEmuTarget = SysEmuTarget(6); -pub const SysEmuTarget_SYS_EMU_TARGET_LOONGARCH64: SysEmuTarget = SysEmuTarget(7); -pub const SysEmuTarget_SYS_EMU_TARGET_M68K: SysEmuTarget = SysEmuTarget(8); -pub const SysEmuTarget_SYS_EMU_TARGET_MICROBLAZE: SysEmuTarget = SysEmuTarget(9); -pub const SysEmuTarget_SYS_EMU_TARGET_MICROBLAZEEL: SysEmuTarget = SysEmuTarget(10); -pub const SysEmuTarget_SYS_EMU_TARGET_MIPS: SysEmuTarget = SysEmuTarget(11); -pub const SysEmuTarget_SYS_EMU_TARGET_MIPS64: SysEmuTarget = SysEmuTarget(12); -pub const SysEmuTarget_SYS_EMU_TARGET_MIPS64EL: SysEmuTarget = SysEmuTarget(13); -pub const SysEmuTarget_SYS_EMU_TARGET_MIPSEL: SysEmuTarget = SysEmuTarget(14); -pub const SysEmuTarget_SYS_EMU_TARGET_OR1K: SysEmuTarget = SysEmuTarget(15); -pub const SysEmuTarget_SYS_EMU_TARGET_PPC: SysEmuTarget = SysEmuTarget(16); -pub const SysEmuTarget_SYS_EMU_TARGET_PPC64: SysEmuTarget = SysEmuTarget(17); -pub const SysEmuTarget_SYS_EMU_TARGET_RISCV32: SysEmuTarget = SysEmuTarget(18); -pub const SysEmuTarget_SYS_EMU_TARGET_RISCV64: SysEmuTarget = SysEmuTarget(19); -pub const SysEmuTarget_SYS_EMU_TARGET_RX: SysEmuTarget = SysEmuTarget(20); -pub const SysEmuTarget_SYS_EMU_TARGET_S390X: SysEmuTarget = SysEmuTarget(21); -pub const SysEmuTarget_SYS_EMU_TARGET_SH4: SysEmuTarget = SysEmuTarget(22); -pub const SysEmuTarget_SYS_EMU_TARGET_SH4EB: SysEmuTarget = SysEmuTarget(23); -pub const SysEmuTarget_SYS_EMU_TARGET_SPARC: SysEmuTarget = SysEmuTarget(24); -pub const SysEmuTarget_SYS_EMU_TARGET_SPARC64: SysEmuTarget = SysEmuTarget(25); -pub const SysEmuTarget_SYS_EMU_TARGET_TRICORE: SysEmuTarget = SysEmuTarget(26); -pub const SysEmuTarget_SYS_EMU_TARGET_X86_64: SysEmuTarget = SysEmuTarget(27); -pub const SysEmuTarget_SYS_EMU_TARGET_XTENSA: SysEmuTarget = SysEmuTarget(28); -pub const SysEmuTarget_SYS_EMU_TARGET_XTENSAEB: SysEmuTarget = SysEmuTarget(29); -pub const SysEmuTarget_SYS_EMU_TARGET__MAX: SysEmuTarget = SysEmuTarget(30); +pub const SysEmuTarget_SYS_EMU_TARGET_HPPA: SysEmuTarget = SysEmuTarget(4); +pub const SysEmuTarget_SYS_EMU_TARGET_I386: SysEmuTarget = SysEmuTarget(5); +pub const SysEmuTarget_SYS_EMU_TARGET_LOONGARCH64: SysEmuTarget = SysEmuTarget(6); +pub const SysEmuTarget_SYS_EMU_TARGET_M68K: SysEmuTarget = SysEmuTarget(7); +pub const SysEmuTarget_SYS_EMU_TARGET_MICROBLAZE: SysEmuTarget = SysEmuTarget(8); +pub const SysEmuTarget_SYS_EMU_TARGET_MICROBLAZEEL: SysEmuTarget = SysEmuTarget(9); +pub const SysEmuTarget_SYS_EMU_TARGET_MIPS: SysEmuTarget = SysEmuTarget(10); +pub const SysEmuTarget_SYS_EMU_TARGET_MIPS64: SysEmuTarget = SysEmuTarget(11); +pub const SysEmuTarget_SYS_EMU_TARGET_MIPS64EL: SysEmuTarget = SysEmuTarget(12); +pub const SysEmuTarget_SYS_EMU_TARGET_MIPSEL: SysEmuTarget = SysEmuTarget(13); +pub const SysEmuTarget_SYS_EMU_TARGET_OR1K: SysEmuTarget = SysEmuTarget(14); +pub const SysEmuTarget_SYS_EMU_TARGET_PPC: SysEmuTarget = SysEmuTarget(15); +pub const SysEmuTarget_SYS_EMU_TARGET_PPC64: SysEmuTarget = SysEmuTarget(16); +pub const SysEmuTarget_SYS_EMU_TARGET_RISCV32: SysEmuTarget = SysEmuTarget(17); +pub const SysEmuTarget_SYS_EMU_TARGET_RISCV64: SysEmuTarget = SysEmuTarget(18); +pub const SysEmuTarget_SYS_EMU_TARGET_RX: SysEmuTarget = SysEmuTarget(19); +pub const SysEmuTarget_SYS_EMU_TARGET_S390X: SysEmuTarget = SysEmuTarget(20); +pub const SysEmuTarget_SYS_EMU_TARGET_SH4: SysEmuTarget = SysEmuTarget(21); +pub const SysEmuTarget_SYS_EMU_TARGET_SH4EB: SysEmuTarget = SysEmuTarget(22); +pub const SysEmuTarget_SYS_EMU_TARGET_SPARC: SysEmuTarget = SysEmuTarget(23); +pub const SysEmuTarget_SYS_EMU_TARGET_SPARC64: SysEmuTarget = SysEmuTarget(24); +pub const SysEmuTarget_SYS_EMU_TARGET_TRICORE: SysEmuTarget = SysEmuTarget(25); +pub const SysEmuTarget_SYS_EMU_TARGET_X86_64: SysEmuTarget = SysEmuTarget(26); +pub const SysEmuTarget_SYS_EMU_TARGET_XTENSA: SysEmuTarget = SysEmuTarget(27); +pub const SysEmuTarget_SYS_EMU_TARGET_XTENSAEB: SysEmuTarget = SysEmuTarget(28); +pub const SysEmuTarget_SYS_EMU_TARGET__MAX: SysEmuTarget = SysEmuTarget(29); impl ::std::ops::BitOr for SysEmuTarget { type Output = Self; #[inline] @@ -3009,49 +3083,49 @@ impl ::std::ops::BitAndAssign for SysEmuTarget { #[repr(transparent)] #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] pub struct SysEmuTarget(pub ::std::os::raw::c_uint); -pub const CpuS390State_S390_CPU_STATE_UNINITIALIZED: CpuS390State = CpuS390State(0); -pub const CpuS390State_S390_CPU_STATE_STOPPED: CpuS390State = CpuS390State(1); -pub const CpuS390State_S390_CPU_STATE_CHECK_STOP: CpuS390State = CpuS390State(2); -pub const CpuS390State_S390_CPU_STATE_OPERATING: CpuS390State = CpuS390State(3); -pub const CpuS390State_S390_CPU_STATE_LOAD: CpuS390State = CpuS390State(4); -pub const CpuS390State_S390_CPU_STATE__MAX: CpuS390State = CpuS390State(5); -impl ::std::ops::BitOr for CpuS390State { +pub const S390CpuState_S390_CPU_STATE_UNINITIALIZED: S390CpuState = S390CpuState(0); +pub const S390CpuState_S390_CPU_STATE_STOPPED: S390CpuState = S390CpuState(1); +pub const S390CpuState_S390_CPU_STATE_CHECK_STOP: S390CpuState = S390CpuState(2); +pub const S390CpuState_S390_CPU_STATE_OPERATING: S390CpuState = S390CpuState(3); +pub const S390CpuState_S390_CPU_STATE_LOAD: S390CpuState = S390CpuState(4); +pub const S390CpuState_S390_CPU_STATE__MAX: S390CpuState = S390CpuState(5); +impl ::std::ops::BitOr for S390CpuState { type Output = Self; #[inline] fn bitor(self, other: Self) -> Self { - CpuS390State(self.0 | other.0) + S390CpuState(self.0 | other.0) } } -impl ::std::ops::BitOrAssign for CpuS390State { +impl ::std::ops::BitOrAssign for S390CpuState { #[inline] - fn bitor_assign(&mut self, rhs: CpuS390State) { + fn bitor_assign(&mut self, rhs: S390CpuState) { self.0 |= rhs.0; } } -impl ::std::ops::BitAnd for CpuS390State { +impl ::std::ops::BitAnd for S390CpuState { type Output = Self; #[inline] fn bitand(self, other: Self) -> Self { - CpuS390State(self.0 & other.0) + S390CpuState(self.0 & other.0) } } -impl ::std::ops::BitAndAssign for CpuS390State { +impl ::std::ops::BitAndAssign for S390CpuState { #[inline] - fn bitand_assign(&mut self, rhs: CpuS390State) { + fn bitand_assign(&mut self, rhs: S390CpuState) { self.0 &= rhs.0; } } #[repr(transparent)] #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] -pub struct CpuS390State(pub ::std::os::raw::c_uint); +pub struct S390CpuState(pub ::std::os::raw::c_uint); #[repr(C)] #[derive(Debug, Copy, Clone)] pub struct CpuInfoS390 { - pub cpu_state: CpuS390State, + pub cpu_state: S390CpuState, pub has_dedicated: bool, pub dedicated: bool, pub has_entitlement: bool, - pub entitlement: CpuS390Entitlement, + pub entitlement: S390CpuEntitlement, } #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { @@ -3253,6 +3327,17 @@ impl ::std::ops::BitAndAssign for ShutdownCause { #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] pub struct ShutdownCause(pub ::std::os::raw::c_uint); #[repr(C)] +#[derive(Debug, Default, Copy, Clone)] +pub struct QemuLockCnt { + pub count: ::std::os::raw::c_uint, +} +#[allow(clippy::unnecessary_operation, clippy::identity_op)] +const _: () = { + ["Size of QemuLockCnt"][::std::mem::size_of::() - 4usize]; + ["Alignment of QemuLockCnt"][::std::mem::align_of::() - 4usize]; + ["Offset of field: QemuLockCnt::count"][::std::mem::offset_of!(QemuLockCnt, count) - 0usize]; +}; +#[repr(C)] #[derive(Debug, Copy, Clone)] pub struct CPUAddressSpace { _unused: [u8; 0], @@ -3338,54 +3423,54 @@ pub struct CPUClass { } #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { - ["Size of CPUClass"][::std::mem::size_of::() - 360usize]; + ["Size of CPUClass"][::std::mem::size_of::() - 368usize]; ["Alignment of CPUClass"][::std::mem::align_of::() - 8usize]; ["Offset of field: CPUClass::parent_class"] [::std::mem::offset_of!(CPUClass, parent_class) - 0usize]; ["Offset of field: CPUClass::class_by_name"] - [::std::mem::offset_of!(CPUClass, class_by_name) - 176usize]; + [::std::mem::offset_of!(CPUClass, class_by_name) - 184usize]; ["Offset of field: CPUClass::parse_features"] - [::std::mem::offset_of!(CPUClass, parse_features) - 184usize]; - ["Offset of field: CPUClass::has_work"][::std::mem::offset_of!(CPUClass, has_work) - 192usize]; + [::std::mem::offset_of!(CPUClass, parse_features) - 192usize]; + ["Offset of field: CPUClass::has_work"][::std::mem::offset_of!(CPUClass, has_work) - 200usize]; ["Offset of field: CPUClass::mmu_index"] - [::std::mem::offset_of!(CPUClass, mmu_index) - 200usize]; + [::std::mem::offset_of!(CPUClass, mmu_index) - 208usize]; ["Offset of field: CPUClass::memory_rw_debug"] - [::std::mem::offset_of!(CPUClass, memory_rw_debug) - 208usize]; + [::std::mem::offset_of!(CPUClass, memory_rw_debug) - 216usize]; ["Offset of field: CPUClass::dump_state"] - [::std::mem::offset_of!(CPUClass, dump_state) - 216usize]; + [::std::mem::offset_of!(CPUClass, dump_state) - 224usize]; ["Offset of field: CPUClass::query_cpu_fast"] - [::std::mem::offset_of!(CPUClass, query_cpu_fast) - 224usize]; + [::std::mem::offset_of!(CPUClass, query_cpu_fast) - 232usize]; ["Offset of field: CPUClass::get_arch_id"] - [::std::mem::offset_of!(CPUClass, get_arch_id) - 232usize]; - ["Offset of field: CPUClass::set_pc"][::std::mem::offset_of!(CPUClass, set_pc) - 240usize]; - ["Offset of field: CPUClass::get_pc"][::std::mem::offset_of!(CPUClass, get_pc) - 248usize]; + [::std::mem::offset_of!(CPUClass, get_arch_id) - 240usize]; + ["Offset of field: CPUClass::set_pc"][::std::mem::offset_of!(CPUClass, set_pc) - 248usize]; + ["Offset of field: CPUClass::get_pc"][::std::mem::offset_of!(CPUClass, get_pc) - 256usize]; ["Offset of field: CPUClass::gdb_read_register"] - [::std::mem::offset_of!(CPUClass, gdb_read_register) - 256usize]; + [::std::mem::offset_of!(CPUClass, gdb_read_register) - 264usize]; ["Offset of field: CPUClass::gdb_write_register"] - [::std::mem::offset_of!(CPUClass, gdb_write_register) - 264usize]; + [::std::mem::offset_of!(CPUClass, gdb_write_register) - 272usize]; ["Offset of field: CPUClass::gdb_adjust_breakpoint"] - [::std::mem::offset_of!(CPUClass, gdb_adjust_breakpoint) - 272usize]; + [::std::mem::offset_of!(CPUClass, gdb_adjust_breakpoint) - 280usize]; ["Offset of field: CPUClass::gdb_core_xml_file"] - [::std::mem::offset_of!(CPUClass, gdb_core_xml_file) - 280usize]; + [::std::mem::offset_of!(CPUClass, gdb_core_xml_file) - 288usize]; ["Offset of field: CPUClass::gdb_arch_name"] - [::std::mem::offset_of!(CPUClass, gdb_arch_name) - 288usize]; + [::std::mem::offset_of!(CPUClass, gdb_arch_name) - 296usize]; ["Offset of field: CPUClass::disas_set_info"] - [::std::mem::offset_of!(CPUClass, disas_set_info) - 296usize]; + [::std::mem::offset_of!(CPUClass, disas_set_info) - 304usize]; ["Offset of field: CPUClass::deprecation_note"] - [::std::mem::offset_of!(CPUClass, deprecation_note) - 304usize]; + [::std::mem::offset_of!(CPUClass, deprecation_note) - 312usize]; ["Offset of field: CPUClass::accel_cpu"] - [::std::mem::offset_of!(CPUClass, accel_cpu) - 312usize]; + [::std::mem::offset_of!(CPUClass, accel_cpu) - 320usize]; ["Offset of field: CPUClass::sysemu_ops"] - [::std::mem::offset_of!(CPUClass, sysemu_ops) - 320usize]; - ["Offset of field: CPUClass::tcg_ops"][::std::mem::offset_of!(CPUClass, tcg_ops) - 328usize]; + [::std::mem::offset_of!(CPUClass, sysemu_ops) - 328usize]; + ["Offset of field: CPUClass::tcg_ops"][::std::mem::offset_of!(CPUClass, tcg_ops) - 336usize]; ["Offset of field: CPUClass::init_accel_cpu"] - [::std::mem::offset_of!(CPUClass, init_accel_cpu) - 336usize]; + [::std::mem::offset_of!(CPUClass, init_accel_cpu) - 344usize]; ["Offset of field: CPUClass::reset_dump_flags"] - [::std::mem::offset_of!(CPUClass, reset_dump_flags) - 344usize]; + [::std::mem::offset_of!(CPUClass, reset_dump_flags) - 352usize]; ["Offset of field: CPUClass::gdb_num_core_regs"] - [::std::mem::offset_of!(CPUClass, gdb_num_core_regs) - 348usize]; + [::std::mem::offset_of!(CPUClass, gdb_num_core_regs) - 356usize]; ["Offset of field: CPUClass::gdb_stop_before_watchpoint"] - [::std::mem::offset_of!(CPUClass, gdb_stop_before_watchpoint) - 352usize]; + [::std::mem::offset_of!(CPUClass, gdb_stop_before_watchpoint) - 360usize]; }; impl Default for CPUClass { fn default() -> Self { @@ -3649,29 +3734,35 @@ impl ::std::fmt::Debug for IcountDecr { write!(f, "IcountDecr {{ union }}") } } -#[doc = " CPUNegativeOffsetState: Elements of CPUState most efficiently accessed\n from CPUArchState, via small negative offsets.\n @can_do_io: True if memory-mapped IO is allowed.\n @plugin_mem_cbs: active plugin memory callbacks"] +#[doc = " CPUNegativeOffsetState: Elements of CPUState most efficiently accessed\n from CPUArchState, via small negative offsets.\n @can_do_io: True if memory-mapped IO is allowed.\n @plugin_mem_cbs: active plugin memory callbacks\n @plugin_mem_value_low: 64 lower bits of latest accessed mem value.\n @plugin_mem_value_high: 64 higher bits of latest accessed mem value."] #[repr(C)] #[repr(align(16))] #[derive(Copy, Clone)] pub struct CPUNegativeOffsetState { pub tlb: CPUTLB, pub plugin_mem_cbs: *mut GArray, + pub plugin_mem_value_low: u64, + pub plugin_mem_value_high: u64, pub icount_decr: IcountDecr, pub can_do_io: bool, } #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { - ["Size of CPUNegativeOffsetState"][::std::mem::size_of::() - 9392usize]; + ["Size of CPUNegativeOffsetState"][::std::mem::size_of::() - 9408usize]; ["Alignment of CPUNegativeOffsetState"] [::std::mem::align_of::() - 16usize]; ["Offset of field: CPUNegativeOffsetState::tlb"] [::std::mem::offset_of!(CPUNegativeOffsetState, tlb) - 0usize]; ["Offset of field: CPUNegativeOffsetState::plugin_mem_cbs"] [::std::mem::offset_of!(CPUNegativeOffsetState, plugin_mem_cbs) - 9376usize]; + ["Offset of field: CPUNegativeOffsetState::plugin_mem_value_low"] + [::std::mem::offset_of!(CPUNegativeOffsetState, plugin_mem_value_low) - 9384usize]; + ["Offset of field: CPUNegativeOffsetState::plugin_mem_value_high"] + [::std::mem::offset_of!(CPUNegativeOffsetState, plugin_mem_value_high) - 9392usize]; ["Offset of field: CPUNegativeOffsetState::icount_decr"] - [::std::mem::offset_of!(CPUNegativeOffsetState, icount_decr) - 9384usize]; + [::std::mem::offset_of!(CPUNegativeOffsetState, icount_decr) - 9400usize]; ["Offset of field: CPUNegativeOffsetState::can_do_io"] - [::std::mem::offset_of!(CPUNegativeOffsetState, can_do_io) - 9388usize]; + [::std::mem::offset_of!(CPUNegativeOffsetState, can_do_io) - 9404usize]; }; impl Default for CPUNegativeOffsetState { fn default() -> Self { @@ -3894,7 +3985,7 @@ impl ::std::fmt::Debug for CPUState__bindgen_ty_4 { } #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { - ["Size of CPUState"][::std::mem::size_of::() - 10176usize]; + ["Size of CPUState"][::std::mem::size_of::() - 10192usize]; ["Alignment of CPUState"][::std::mem::align_of::() - 16usize]; ["Offset of field: CPUState::parent_obj"] [::std::mem::offset_of!(CPUState, parent_obj) - 0usize]; @@ -4193,7 +4284,7 @@ pub struct PropertyInfo { unsafe extern "C" fn( oc: *mut ObjectClass, name: *const ::std::os::raw::c_char, - prop: *mut Property, + prop: *const Property, ) -> *mut ObjectProperty, >, pub get: ObjectPropertyAccessor, @@ -4232,42 +4323,97 @@ impl Default for PropertyInfo { } #[doc = " X86CPU:\n @env: #CPUX86State\n @migratable: If set, only migratable flags will be accepted when \"enforce\"\n mode is used, and only migratable flags will be included in the \"host\"\n CPU model.\n\n An x86 CPU."] pub type X86CPU = ArchCPU; -pub const CPUTopoLevel_CPU_TOPO_LEVEL_INVALID: CPUTopoLevel = CPUTopoLevel(0); -pub const CPUTopoLevel_CPU_TOPO_LEVEL_SMT: CPUTopoLevel = CPUTopoLevel(1); -pub const CPUTopoLevel_CPU_TOPO_LEVEL_CORE: CPUTopoLevel = CPUTopoLevel(2); -pub const CPUTopoLevel_CPU_TOPO_LEVEL_MODULE: CPUTopoLevel = CPUTopoLevel(3); -pub const CPUTopoLevel_CPU_TOPO_LEVEL_DIE: CPUTopoLevel = CPUTopoLevel(4); -pub const CPUTopoLevel_CPU_TOPO_LEVEL_PACKAGE: CPUTopoLevel = CPUTopoLevel(5); -pub const CPUTopoLevel_CPU_TOPO_LEVEL_MAX: CPUTopoLevel = CPUTopoLevel(6); -impl ::std::ops::BitOr for CPUTopoLevel { +pub const MemOp_MO_8: MemOp = MemOp(0); +pub const MemOp_MO_16: MemOp = MemOp(1); +pub const MemOp_MO_32: MemOp = MemOp(2); +pub const MemOp_MO_64: MemOp = MemOp(3); +pub const MemOp_MO_128: MemOp = MemOp(4); +pub const MemOp_MO_256: MemOp = MemOp(5); +pub const MemOp_MO_512: MemOp = MemOp(6); +pub const MemOp_MO_1024: MemOp = MemOp(7); +pub const MemOp_MO_SIZE: MemOp = MemOp(7); +pub const MemOp_MO_SIGN: MemOp = MemOp(8); +pub const MemOp_MO_BSWAP: MemOp = MemOp(16); +pub const MemOp_MO_LE: MemOp = MemOp(0); +pub const MemOp_MO_BE: MemOp = MemOp(16); +pub const MemOp_MO_TE: MemOp = MemOp(0); +pub const MemOp_MO_ASHIFT: MemOp = MemOp(5); +pub const MemOp_MO_AMASK: MemOp = MemOp(224); +pub const MemOp_MO_UNALN: MemOp = MemOp(0); +pub const MemOp_MO_ALIGN_2: MemOp = MemOp(32); +pub const MemOp_MO_ALIGN_4: MemOp = MemOp(64); +pub const MemOp_MO_ALIGN_8: MemOp = MemOp(96); +pub const MemOp_MO_ALIGN_16: MemOp = MemOp(128); +pub const MemOp_MO_ALIGN_32: MemOp = MemOp(160); +pub const MemOp_MO_ALIGN_64: MemOp = MemOp(192); +pub const MemOp_MO_ALIGN: MemOp = MemOp(224); +pub const MemOp_MO_ATOM_SHIFT: MemOp = MemOp(8); +pub const MemOp_MO_ATOM_IFALIGN: MemOp = MemOp(0); +pub const MemOp_MO_ATOM_IFALIGN_PAIR: MemOp = MemOp(256); +pub const MemOp_MO_ATOM_WITHIN16: MemOp = MemOp(512); +pub const MemOp_MO_ATOM_WITHIN16_PAIR: MemOp = MemOp(768); +pub const MemOp_MO_ATOM_SUBALIGN: MemOp = MemOp(1024); +pub const MemOp_MO_ATOM_NONE: MemOp = MemOp(1280); +pub const MemOp_MO_ATOM_MASK: MemOp = MemOp(1792); +pub const MemOp_MO_UB: MemOp = MemOp(0); +pub const MemOp_MO_UW: MemOp = MemOp(1); +pub const MemOp_MO_UL: MemOp = MemOp(2); +pub const MemOp_MO_UQ: MemOp = MemOp(3); +pub const MemOp_MO_UO: MemOp = MemOp(4); +pub const MemOp_MO_SB: MemOp = MemOp(8); +pub const MemOp_MO_SW: MemOp = MemOp(9); +pub const MemOp_MO_SL: MemOp = MemOp(10); +pub const MemOp_MO_SQ: MemOp = MemOp(11); +pub const MemOp_MO_SO: MemOp = MemOp(12); +pub const MemOp_MO_LEUW: MemOp = MemOp(1); +pub const MemOp_MO_LEUL: MemOp = MemOp(2); +pub const MemOp_MO_LEUQ: MemOp = MemOp(3); +pub const MemOp_MO_LESW: MemOp = MemOp(9); +pub const MemOp_MO_LESL: MemOp = MemOp(10); +pub const MemOp_MO_LESQ: MemOp = MemOp(11); +pub const MemOp_MO_BEUW: MemOp = MemOp(17); +pub const MemOp_MO_BEUL: MemOp = MemOp(18); +pub const MemOp_MO_BEUQ: MemOp = MemOp(19); +pub const MemOp_MO_BESW: MemOp = MemOp(25); +pub const MemOp_MO_BESL: MemOp = MemOp(26); +pub const MemOp_MO_BESQ: MemOp = MemOp(27); +pub const MemOp_MO_TEUW: MemOp = MemOp(1); +pub const MemOp_MO_TEUL: MemOp = MemOp(2); +pub const MemOp_MO_TEUQ: MemOp = MemOp(3); +pub const MemOp_MO_TEUO: MemOp = MemOp(4); +pub const MemOp_MO_TESW: MemOp = MemOp(9); +pub const MemOp_MO_TESL: MemOp = MemOp(10); +pub const MemOp_MO_TESQ: MemOp = MemOp(11); +pub const MemOp_MO_SSIZE: MemOp = MemOp(15); +impl ::std::ops::BitOr for MemOp { type Output = Self; #[inline] fn bitor(self, other: Self) -> Self { - CPUTopoLevel(self.0 | other.0) + MemOp(self.0 | other.0) } } -impl ::std::ops::BitOrAssign for CPUTopoLevel { +impl ::std::ops::BitOrAssign for MemOp { #[inline] - fn bitor_assign(&mut self, rhs: CPUTopoLevel) { + fn bitor_assign(&mut self, rhs: MemOp) { self.0 |= rhs.0; } } -impl ::std::ops::BitAnd for CPUTopoLevel { +impl ::std::ops::BitAnd for MemOp { type Output = Self; #[inline] fn bitand(self, other: Self) -> Self { - CPUTopoLevel(self.0 & other.0) + MemOp(self.0 & other.0) } } -impl ::std::ops::BitAndAssign for CPUTopoLevel { +impl ::std::ops::BitAndAssign for MemOp { #[inline] - fn bitand_assign(&mut self, rhs: CPUTopoLevel) { + fn bitand_assign(&mut self, rhs: MemOp) { self.0 &= rhs.0; } } #[repr(transparent)] #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] -pub struct CPUTopoLevel(pub ::std::os::raw::c_uint); +pub struct MemOp(pub ::std::os::raw::c_uint); pub type float16 = u16; pub type float32 = u32; pub type float64 = u64; @@ -4352,12 +4498,48 @@ impl ::std::ops::BitAndAssign for FloatX80RoundPrec { #[repr(transparent)] #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] pub struct FloatX80RoundPrec(pub ::std::os::raw::c_uchar); +pub const Float2NaNPropRule_float_2nan_prop_none: Float2NaNPropRule = Float2NaNPropRule(0); +pub const Float2NaNPropRule_float_2nan_prop_s_ab: Float2NaNPropRule = Float2NaNPropRule(1); +pub const Float2NaNPropRule_float_2nan_prop_s_ba: Float2NaNPropRule = Float2NaNPropRule(2); +pub const Float2NaNPropRule_float_2nan_prop_ab: Float2NaNPropRule = Float2NaNPropRule(3); +pub const Float2NaNPropRule_float_2nan_prop_ba: Float2NaNPropRule = Float2NaNPropRule(4); +pub const Float2NaNPropRule_float_2nan_prop_x87: Float2NaNPropRule = Float2NaNPropRule(5); +impl ::std::ops::BitOr for Float2NaNPropRule { + type Output = Self; + #[inline] + fn bitor(self, other: Self) -> Self { + Float2NaNPropRule(self.0 | other.0) + } +} +impl ::std::ops::BitOrAssign for Float2NaNPropRule { + #[inline] + fn bitor_assign(&mut self, rhs: Float2NaNPropRule) { + self.0 |= rhs.0; + } +} +impl ::std::ops::BitAnd for Float2NaNPropRule { + type Output = Self; + #[inline] + fn bitand(self, other: Self) -> Self { + Float2NaNPropRule(self.0 & other.0) + } +} +impl ::std::ops::BitAndAssign for Float2NaNPropRule { + #[inline] + fn bitand_assign(&mut self, rhs: Float2NaNPropRule) { + self.0 &= rhs.0; + } +} +#[repr(transparent)] +#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] +pub struct Float2NaNPropRule(pub ::std::os::raw::c_uchar); #[repr(C)] #[derive(Debug, Copy, Clone)] pub struct float_status { pub float_exception_flags: u16, pub float_rounding_mode: FloatRoundMode, pub floatx80_rounding_precision: FloatX80RoundPrec, + pub float_2nan_prop_rule: Float2NaNPropRule, pub tininess_before_rounding: bool, pub flush_to_zero: bool, pub flush_inputs_to_zero: bool, @@ -4378,24 +4560,26 @@ const _: () = { [::std::mem::offset_of!(float_status, float_rounding_mode) - 2usize]; ["Offset of field: float_status::floatx80_rounding_precision"] [::std::mem::offset_of!(float_status, floatx80_rounding_precision) - 3usize]; + ["Offset of field: float_status::float_2nan_prop_rule"] + [::std::mem::offset_of!(float_status, float_2nan_prop_rule) - 4usize]; ["Offset of field: float_status::tininess_before_rounding"] - [::std::mem::offset_of!(float_status, tininess_before_rounding) - 4usize]; + [::std::mem::offset_of!(float_status, tininess_before_rounding) - 5usize]; ["Offset of field: float_status::flush_to_zero"] - [::std::mem::offset_of!(float_status, flush_to_zero) - 5usize]; + [::std::mem::offset_of!(float_status, flush_to_zero) - 6usize]; ["Offset of field: float_status::flush_inputs_to_zero"] - [::std::mem::offset_of!(float_status, flush_inputs_to_zero) - 6usize]; + [::std::mem::offset_of!(float_status, flush_inputs_to_zero) - 7usize]; ["Offset of field: float_status::default_nan_mode"] - [::std::mem::offset_of!(float_status, default_nan_mode) - 7usize]; + [::std::mem::offset_of!(float_status, default_nan_mode) - 8usize]; ["Offset of field: float_status::snan_bit_is_one"] - [::std::mem::offset_of!(float_status, snan_bit_is_one) - 8usize]; + [::std::mem::offset_of!(float_status, snan_bit_is_one) - 9usize]; ["Offset of field: float_status::use_first_nan"] - [::std::mem::offset_of!(float_status, use_first_nan) - 9usize]; + [::std::mem::offset_of!(float_status, use_first_nan) - 10usize]; ["Offset of field: float_status::no_signaling_nans"] - [::std::mem::offset_of!(float_status, no_signaling_nans) - 10usize]; + [::std::mem::offset_of!(float_status, no_signaling_nans) - 11usize]; ["Offset of field: float_status::rebias_overflow"] - [::std::mem::offset_of!(float_status, rebias_overflow) - 11usize]; + [::std::mem::offset_of!(float_status, rebias_overflow) - 12usize]; ["Offset of field: float_status::rebias_underflow"] - [::std::mem::offset_of!(float_status, rebias_underflow) - 12usize]; + [::std::mem::offset_of!(float_status, rebias_underflow) - 13usize]; }; impl Default for float_status { fn default() -> Self { @@ -4406,7 +4590,7 @@ impl Default for float_status { } } } -pub type FeatureWordArray = [u64; 40usize]; +pub type FeatureWordArray = [u64; 43usize]; #[repr(C)] #[derive(Debug, Default, Copy, Clone)] pub struct SegmentCache { @@ -4713,7 +4897,7 @@ pub struct CPUCacheInfo { pub no_invd_sharing: bool, pub inclusive: bool, pub complex_indexing: bool, - pub share_level: CPUTopoLevel, + pub share_level: CpuTopologyLevel, } #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { @@ -4911,6 +5095,7 @@ pub struct CPUArchState { pub msr_lbr_ctl: u64, pub msr_lbr_depth: u64, pub lbr_records: [LBREntry; 32usize], + pub msr_hwcr: u64, pub error_code: ::std::os::raw::c_int, pub exception_is_int: ::std::os::raw::c_int, pub exception_next_eip: target_ulong, @@ -4951,6 +5136,7 @@ pub struct CPUArchState { pub cpuid_vendor3: u32, pub cpuid_version: u32, pub features: FeatureWordArray, + pub avx10_version: u8, pub user_features: FeatureWordArray, pub cpuid_model: [u32; 12usize], pub cache_info_cpuid2: CPUCaches, @@ -5054,7 +5240,7 @@ const _: () = { }; #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { - ["Size of CPUArchState"][::std::mem::size_of::() - 15008usize]; + ["Size of CPUArchState"][::std::mem::size_of::() - 15072usize]; ["Alignment of CPUArchState"][::std::mem::align_of::() - 16usize]; ["Offset of field: CPUArchState::regs"][::std::mem::offset_of!(CPUArchState, regs) - 0usize]; ["Offset of field: CPUArchState::eip"][::std::mem::offset_of!(CPUArchState, eip) - 128usize]; @@ -5291,159 +5477,163 @@ const _: () = { [::std::mem::offset_of!(CPUArchState, msr_lbr_depth) - 12480usize]; ["Offset of field: CPUArchState::lbr_records"] [::std::mem::offset_of!(CPUArchState, lbr_records) - 12488usize]; + ["Offset of field: CPUArchState::msr_hwcr"] + [::std::mem::offset_of!(CPUArchState, msr_hwcr) - 13256usize]; ["Offset of field: CPUArchState::error_code"] - [::std::mem::offset_of!(CPUArchState, error_code) - 13256usize]; + [::std::mem::offset_of!(CPUArchState, error_code) - 13264usize]; ["Offset of field: CPUArchState::exception_is_int"] - [::std::mem::offset_of!(CPUArchState, exception_is_int) - 13260usize]; + [::std::mem::offset_of!(CPUArchState, exception_is_int) - 13268usize]; ["Offset of field: CPUArchState::exception_next_eip"] - [::std::mem::offset_of!(CPUArchState, exception_next_eip) - 13264usize]; - ["Offset of field: CPUArchState::dr"][::std::mem::offset_of!(CPUArchState, dr) - 13272usize]; + [::std::mem::offset_of!(CPUArchState, exception_next_eip) - 13272usize]; + ["Offset of field: CPUArchState::dr"][::std::mem::offset_of!(CPUArchState, dr) - 13280usize]; ["Offset of field: CPUArchState::old_exception"] - [::std::mem::offset_of!(CPUArchState, old_exception) - 13368usize]; + [::std::mem::offset_of!(CPUArchState, old_exception) - 13376usize]; ["Offset of field: CPUArchState::vm_vmcb"] - [::std::mem::offset_of!(CPUArchState, vm_vmcb) - 13376usize]; + [::std::mem::offset_of!(CPUArchState, vm_vmcb) - 13384usize]; ["Offset of field: CPUArchState::tsc_offset"] - [::std::mem::offset_of!(CPUArchState, tsc_offset) - 13384usize]; + [::std::mem::offset_of!(CPUArchState, tsc_offset) - 13392usize]; ["Offset of field: CPUArchState::intercept"] - [::std::mem::offset_of!(CPUArchState, intercept) - 13392usize]; + [::std::mem::offset_of!(CPUArchState, intercept) - 13400usize]; ["Offset of field: CPUArchState::intercept_cr_read"] - [::std::mem::offset_of!(CPUArchState, intercept_cr_read) - 13400usize]; + [::std::mem::offset_of!(CPUArchState, intercept_cr_read) - 13408usize]; ["Offset of field: CPUArchState::intercept_cr_write"] - [::std::mem::offset_of!(CPUArchState, intercept_cr_write) - 13402usize]; + [::std::mem::offset_of!(CPUArchState, intercept_cr_write) - 13410usize]; ["Offset of field: CPUArchState::intercept_dr_read"] - [::std::mem::offset_of!(CPUArchState, intercept_dr_read) - 13404usize]; + [::std::mem::offset_of!(CPUArchState, intercept_dr_read) - 13412usize]; ["Offset of field: CPUArchState::intercept_dr_write"] - [::std::mem::offset_of!(CPUArchState, intercept_dr_write) - 13406usize]; + [::std::mem::offset_of!(CPUArchState, intercept_dr_write) - 13414usize]; ["Offset of field: CPUArchState::intercept_exceptions"] - [::std::mem::offset_of!(CPUArchState, intercept_exceptions) - 13408usize]; + [::std::mem::offset_of!(CPUArchState, intercept_exceptions) - 13416usize]; ["Offset of field: CPUArchState::nested_cr3"] - [::std::mem::offset_of!(CPUArchState, nested_cr3) - 13416usize]; + [::std::mem::offset_of!(CPUArchState, nested_cr3) - 13424usize]; ["Offset of field: CPUArchState::nested_pg_mode"] - [::std::mem::offset_of!(CPUArchState, nested_pg_mode) - 13424usize]; + [::std::mem::offset_of!(CPUArchState, nested_pg_mode) - 13432usize]; ["Offset of field: CPUArchState::v_tpr"] - [::std::mem::offset_of!(CPUArchState, v_tpr) - 13428usize]; + [::std::mem::offset_of!(CPUArchState, v_tpr) - 13436usize]; ["Offset of field: CPUArchState::int_ctl"] - [::std::mem::offset_of!(CPUArchState, int_ctl) - 13432usize]; + [::std::mem::offset_of!(CPUArchState, int_ctl) - 13440usize]; ["Offset of field: CPUArchState::nmi_injected"] - [::std::mem::offset_of!(CPUArchState, nmi_injected) - 13436usize]; + [::std::mem::offset_of!(CPUArchState, nmi_injected) - 13444usize]; ["Offset of field: CPUArchState::nmi_pending"] - [::std::mem::offset_of!(CPUArchState, nmi_pending) - 13437usize]; + [::std::mem::offset_of!(CPUArchState, nmi_pending) - 13445usize]; ["Offset of field: CPUArchState::retaddr"] - [::std::mem::offset_of!(CPUArchState, retaddr) - 13440usize]; + [::std::mem::offset_of!(CPUArchState, retaddr) - 13448usize]; ["Offset of field: CPUArchState::msr_rapl_power_unit"] - [::std::mem::offset_of!(CPUArchState, msr_rapl_power_unit) - 13448usize]; + [::std::mem::offset_of!(CPUArchState, msr_rapl_power_unit) - 13456usize]; ["Offset of field: CPUArchState::msr_pkg_energy_status"] - [::std::mem::offset_of!(CPUArchState, msr_pkg_energy_status) - 13456usize]; + [::std::mem::offset_of!(CPUArchState, msr_pkg_energy_status) - 13464usize]; ["Offset of field: CPUArchState::end_reset_fields"] - [::std::mem::offset_of!(CPUArchState, end_reset_fields) - 13464usize]; + [::std::mem::offset_of!(CPUArchState, end_reset_fields) - 13472usize]; ["Offset of field: CPUArchState::cpuid_level_func7"] - [::std::mem::offset_of!(CPUArchState, cpuid_level_func7) - 13464usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_level_func7) - 13472usize]; ["Offset of field: CPUArchState::cpuid_min_level_func7"] - [::std::mem::offset_of!(CPUArchState, cpuid_min_level_func7) - 13468usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_min_level_func7) - 13476usize]; ["Offset of field: CPUArchState::cpuid_min_level"] - [::std::mem::offset_of!(CPUArchState, cpuid_min_level) - 13472usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_min_level) - 13480usize]; ["Offset of field: CPUArchState::cpuid_min_xlevel"] - [::std::mem::offset_of!(CPUArchState, cpuid_min_xlevel) - 13476usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_min_xlevel) - 13484usize]; ["Offset of field: CPUArchState::cpuid_min_xlevel2"] - [::std::mem::offset_of!(CPUArchState, cpuid_min_xlevel2) - 13480usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_min_xlevel2) - 13488usize]; ["Offset of field: CPUArchState::cpuid_max_level"] - [::std::mem::offset_of!(CPUArchState, cpuid_max_level) - 13484usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_max_level) - 13492usize]; ["Offset of field: CPUArchState::cpuid_max_xlevel"] - [::std::mem::offset_of!(CPUArchState, cpuid_max_xlevel) - 13488usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_max_xlevel) - 13496usize]; ["Offset of field: CPUArchState::cpuid_max_xlevel2"] - [::std::mem::offset_of!(CPUArchState, cpuid_max_xlevel2) - 13492usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_max_xlevel2) - 13500usize]; ["Offset of field: CPUArchState::cpuid_level"] - [::std::mem::offset_of!(CPUArchState, cpuid_level) - 13496usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_level) - 13504usize]; ["Offset of field: CPUArchState::cpuid_xlevel"] - [::std::mem::offset_of!(CPUArchState, cpuid_xlevel) - 13500usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_xlevel) - 13508usize]; ["Offset of field: CPUArchState::cpuid_xlevel2"] - [::std::mem::offset_of!(CPUArchState, cpuid_xlevel2) - 13504usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_xlevel2) - 13512usize]; ["Offset of field: CPUArchState::cpuid_vendor1"] - [::std::mem::offset_of!(CPUArchState, cpuid_vendor1) - 13508usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_vendor1) - 13516usize]; ["Offset of field: CPUArchState::cpuid_vendor2"] - [::std::mem::offset_of!(CPUArchState, cpuid_vendor2) - 13512usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_vendor2) - 13520usize]; ["Offset of field: CPUArchState::cpuid_vendor3"] - [::std::mem::offset_of!(CPUArchState, cpuid_vendor3) - 13516usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_vendor3) - 13524usize]; ["Offset of field: CPUArchState::cpuid_version"] - [::std::mem::offset_of!(CPUArchState, cpuid_version) - 13520usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_version) - 13528usize]; ["Offset of field: CPUArchState::features"] - [::std::mem::offset_of!(CPUArchState, features) - 13528usize]; + [::std::mem::offset_of!(CPUArchState, features) - 13536usize]; + ["Offset of field: CPUArchState::avx10_version"] + [::std::mem::offset_of!(CPUArchState, avx10_version) - 13880usize]; ["Offset of field: CPUArchState::user_features"] - [::std::mem::offset_of!(CPUArchState, user_features) - 13848usize]; + [::std::mem::offset_of!(CPUArchState, user_features) - 13888usize]; ["Offset of field: CPUArchState::cpuid_model"] - [::std::mem::offset_of!(CPUArchState, cpuid_model) - 14168usize]; + [::std::mem::offset_of!(CPUArchState, cpuid_model) - 14232usize]; ["Offset of field: CPUArchState::cache_info_cpuid2"] - [::std::mem::offset_of!(CPUArchState, cache_info_cpuid2) - 14216usize]; + [::std::mem::offset_of!(CPUArchState, cache_info_cpuid2) - 14280usize]; ["Offset of field: CPUArchState::cache_info_cpuid4"] - [::std::mem::offset_of!(CPUArchState, cache_info_cpuid4) - 14248usize]; + [::std::mem::offset_of!(CPUArchState, cache_info_cpuid4) - 14312usize]; ["Offset of field: CPUArchState::cache_info_amd"] - [::std::mem::offset_of!(CPUArchState, cache_info_amd) - 14280usize]; + [::std::mem::offset_of!(CPUArchState, cache_info_amd) - 14344usize]; ["Offset of field: CPUArchState::mtrr_fixed"] - [::std::mem::offset_of!(CPUArchState, mtrr_fixed) - 14312usize]; + [::std::mem::offset_of!(CPUArchState, mtrr_fixed) - 14376usize]; ["Offset of field: CPUArchState::mtrr_deftype"] - [::std::mem::offset_of!(CPUArchState, mtrr_deftype) - 14400usize]; + [::std::mem::offset_of!(CPUArchState, mtrr_deftype) - 14464usize]; ["Offset of field: CPUArchState::mtrr_var"] - [::std::mem::offset_of!(CPUArchState, mtrr_var) - 14408usize]; + [::std::mem::offset_of!(CPUArchState, mtrr_var) - 14472usize]; ["Offset of field: CPUArchState::mp_state"] - [::std::mem::offset_of!(CPUArchState, mp_state) - 14536usize]; + [::std::mem::offset_of!(CPUArchState, mp_state) - 14600usize]; ["Offset of field: CPUArchState::exception_nr"] - [::std::mem::offset_of!(CPUArchState, exception_nr) - 14540usize]; + [::std::mem::offset_of!(CPUArchState, exception_nr) - 14604usize]; ["Offset of field: CPUArchState::interrupt_injected"] - [::std::mem::offset_of!(CPUArchState, interrupt_injected) - 14544usize]; + [::std::mem::offset_of!(CPUArchState, interrupt_injected) - 14608usize]; ["Offset of field: CPUArchState::soft_interrupt"] - [::std::mem::offset_of!(CPUArchState, soft_interrupt) - 14548usize]; + [::std::mem::offset_of!(CPUArchState, soft_interrupt) - 14612usize]; ["Offset of field: CPUArchState::exception_pending"] - [::std::mem::offset_of!(CPUArchState, exception_pending) - 14549usize]; + [::std::mem::offset_of!(CPUArchState, exception_pending) - 14613usize]; ["Offset of field: CPUArchState::exception_injected"] - [::std::mem::offset_of!(CPUArchState, exception_injected) - 14550usize]; + [::std::mem::offset_of!(CPUArchState, exception_injected) - 14614usize]; ["Offset of field: CPUArchState::has_error_code"] - [::std::mem::offset_of!(CPUArchState, has_error_code) - 14551usize]; + [::std::mem::offset_of!(CPUArchState, has_error_code) - 14615usize]; ["Offset of field: CPUArchState::exception_has_payload"] - [::std::mem::offset_of!(CPUArchState, exception_has_payload) - 14552usize]; + [::std::mem::offset_of!(CPUArchState, exception_has_payload) - 14616usize]; ["Offset of field: CPUArchState::exception_payload"] - [::std::mem::offset_of!(CPUArchState, exception_payload) - 14560usize]; + [::std::mem::offset_of!(CPUArchState, exception_payload) - 14624usize]; ["Offset of field: CPUArchState::triple_fault_pending"] - [::std::mem::offset_of!(CPUArchState, triple_fault_pending) - 14568usize]; + [::std::mem::offset_of!(CPUArchState, triple_fault_pending) - 14632usize]; ["Offset of field: CPUArchState::ins_len"] - [::std::mem::offset_of!(CPUArchState, ins_len) - 14572usize]; + [::std::mem::offset_of!(CPUArchState, ins_len) - 14636usize]; ["Offset of field: CPUArchState::sipi_vector"] - [::std::mem::offset_of!(CPUArchState, sipi_vector) - 14576usize]; + [::std::mem::offset_of!(CPUArchState, sipi_vector) - 14640usize]; ["Offset of field: CPUArchState::tsc_valid"] - [::std::mem::offset_of!(CPUArchState, tsc_valid) - 14580usize]; + [::std::mem::offset_of!(CPUArchState, tsc_valid) - 14644usize]; ["Offset of field: CPUArchState::tsc_khz"] - [::std::mem::offset_of!(CPUArchState, tsc_khz) - 14584usize]; + [::std::mem::offset_of!(CPUArchState, tsc_khz) - 14648usize]; ["Offset of field: CPUArchState::user_tsc_khz"] - [::std::mem::offset_of!(CPUArchState, user_tsc_khz) - 14592usize]; + [::std::mem::offset_of!(CPUArchState, user_tsc_khz) - 14656usize]; ["Offset of field: CPUArchState::apic_bus_freq"] - [::std::mem::offset_of!(CPUArchState, apic_bus_freq) - 14600usize]; - ["Offset of field: CPUArchState::tsc"][::std::mem::offset_of!(CPUArchState, tsc) - 14608usize]; + [::std::mem::offset_of!(CPUArchState, apic_bus_freq) - 14664usize]; + ["Offset of field: CPUArchState::tsc"][::std::mem::offset_of!(CPUArchState, tsc) - 14672usize]; ["Offset of field: CPUArchState::mcg_cap"] - [::std::mem::offset_of!(CPUArchState, mcg_cap) - 14616usize]; + [::std::mem::offset_of!(CPUArchState, mcg_cap) - 14680usize]; ["Offset of field: CPUArchState::mcg_ctl"] - [::std::mem::offset_of!(CPUArchState, mcg_ctl) - 14624usize]; + [::std::mem::offset_of!(CPUArchState, mcg_ctl) - 14688usize]; ["Offset of field: CPUArchState::mcg_ext_ctl"] - [::std::mem::offset_of!(CPUArchState, mcg_ext_ctl) - 14632usize]; + [::std::mem::offset_of!(CPUArchState, mcg_ext_ctl) - 14696usize]; ["Offset of field: CPUArchState::mce_banks"] - [::std::mem::offset_of!(CPUArchState, mce_banks) - 14640usize]; + [::std::mem::offset_of!(CPUArchState, mce_banks) - 14704usize]; ["Offset of field: CPUArchState::xstate_bv"] - [::std::mem::offset_of!(CPUArchState, xstate_bv) - 14960usize]; + [::std::mem::offset_of!(CPUArchState, xstate_bv) - 15024usize]; ["Offset of field: CPUArchState::fpus_vmstate"] - [::std::mem::offset_of!(CPUArchState, fpus_vmstate) - 14968usize]; + [::std::mem::offset_of!(CPUArchState, fpus_vmstate) - 15032usize]; ["Offset of field: CPUArchState::fptag_vmstate"] - [::std::mem::offset_of!(CPUArchState, fptag_vmstate) - 14970usize]; + [::std::mem::offset_of!(CPUArchState, fptag_vmstate) - 15034usize]; ["Offset of field: CPUArchState::fpregs_format_vmstate"] - [::std::mem::offset_of!(CPUArchState, fpregs_format_vmstate) - 14972usize]; - ["Offset of field: CPUArchState::xss"][::std::mem::offset_of!(CPUArchState, xss) - 14976usize]; + [::std::mem::offset_of!(CPUArchState, fpregs_format_vmstate) - 15036usize]; + ["Offset of field: CPUArchState::xss"][::std::mem::offset_of!(CPUArchState, xss) - 15040usize]; ["Offset of field: CPUArchState::umwait"] - [::std::mem::offset_of!(CPUArchState, umwait) - 14984usize]; + [::std::mem::offset_of!(CPUArchState, umwait) - 15048usize]; ["Offset of field: CPUArchState::tpr_access_type"] - [::std::mem::offset_of!(CPUArchState, tpr_access_type) - 14988usize]; + [::std::mem::offset_of!(CPUArchState, tpr_access_type) - 15052usize]; ["Offset of field: CPUArchState::nr_dies"] - [::std::mem::offset_of!(CPUArchState, nr_dies) - 14992usize]; + [::std::mem::offset_of!(CPUArchState, nr_dies) - 15056usize]; ["Offset of field: CPUArchState::nr_modules"] - [::std::mem::offset_of!(CPUArchState, nr_modules) - 14996usize]; + [::std::mem::offset_of!(CPUArchState, nr_modules) - 15060usize]; ["Offset of field: CPUArchState::avail_cpu_topo"] - [::std::mem::offset_of!(CPUArchState, avail_cpu_topo) - 15000usize]; + [::std::mem::offset_of!(CPUArchState, avail_cpu_topo) - 15064usize]; }; impl Default for CPUArchState { fn default() -> Self { @@ -5618,128 +5808,128 @@ const _: () = { }; #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { - ["Size of ArchCPU"][::std::mem::size_of::() - 25792usize]; + ["Size of ArchCPU"][::std::mem::size_of::() - 25904usize]; ["Alignment of ArchCPU"][::std::mem::align_of::() - 16usize]; ["Offset of field: ArchCPU::parent_obj"][::std::mem::offset_of!(ArchCPU, parent_obj) - 0usize]; - ["Offset of field: ArchCPU::env"][::std::mem::offset_of!(ArchCPU, env) - 10176usize]; - ["Offset of field: ArchCPU::vmsentry"][::std::mem::offset_of!(ArchCPU, vmsentry) - 25184usize]; + ["Offset of field: ArchCPU::env"][::std::mem::offset_of!(ArchCPU, env) - 10192usize]; + ["Offset of field: ArchCPU::vmsentry"][::std::mem::offset_of!(ArchCPU, vmsentry) - 25264usize]; ["Offset of field: ArchCPU::ucode_rev"] - [::std::mem::offset_of!(ArchCPU, ucode_rev) - 25192usize]; + [::std::mem::offset_of!(ArchCPU, ucode_rev) - 25272usize]; ["Offset of field: ArchCPU::hyperv_spinlock_attempts"] - [::std::mem::offset_of!(ArchCPU, hyperv_spinlock_attempts) - 25200usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_spinlock_attempts) - 25280usize]; ["Offset of field: ArchCPU::hyperv_vendor"] - [::std::mem::offset_of!(ArchCPU, hyperv_vendor) - 25208usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_vendor) - 25288usize]; ["Offset of field: ArchCPU::hyperv_synic_kvm_only"] - [::std::mem::offset_of!(ArchCPU, hyperv_synic_kvm_only) - 25216usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_synic_kvm_only) - 25296usize]; ["Offset of field: ArchCPU::hyperv_features"] - [::std::mem::offset_of!(ArchCPU, hyperv_features) - 25224usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_features) - 25304usize]; ["Offset of field: ArchCPU::hyperv_passthrough"] - [::std::mem::offset_of!(ArchCPU, hyperv_passthrough) - 25232usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_passthrough) - 25312usize]; ["Offset of field: ArchCPU::hyperv_no_nonarch_cs"] - [::std::mem::offset_of!(ArchCPU, hyperv_no_nonarch_cs) - 25236usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_no_nonarch_cs) - 25316usize]; ["Offset of field: ArchCPU::hyperv_vendor_id"] - [::std::mem::offset_of!(ArchCPU, hyperv_vendor_id) - 25240usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_vendor_id) - 25320usize]; ["Offset of field: ArchCPU::hyperv_interface_id"] - [::std::mem::offset_of!(ArchCPU, hyperv_interface_id) - 25252usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_interface_id) - 25332usize]; ["Offset of field: ArchCPU::hyperv_limits"] - [::std::mem::offset_of!(ArchCPU, hyperv_limits) - 25268usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_limits) - 25348usize]; ["Offset of field: ArchCPU::hyperv_enforce_cpuid"] - [::std::mem::offset_of!(ArchCPU, hyperv_enforce_cpuid) - 25280usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_enforce_cpuid) - 25360usize]; ["Offset of field: ArchCPU::hyperv_ver_id_build"] - [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_build) - 25284usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_build) - 25364usize]; ["Offset of field: ArchCPU::hyperv_ver_id_major"] - [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_major) - 25288usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_major) - 25368usize]; ["Offset of field: ArchCPU::hyperv_ver_id_minor"] - [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_minor) - 25290usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_minor) - 25370usize]; ["Offset of field: ArchCPU::hyperv_ver_id_sp"] - [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_sp) - 25292usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_sp) - 25372usize]; ["Offset of field: ArchCPU::hyperv_ver_id_sb"] - [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_sb) - 25296usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_sb) - 25376usize]; ["Offset of field: ArchCPU::hyperv_ver_id_sn"] - [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_sn) - 25300usize]; + [::std::mem::offset_of!(ArchCPU, hyperv_ver_id_sn) - 25380usize]; ["Offset of field: ArchCPU::check_cpuid"] - [::std::mem::offset_of!(ArchCPU, check_cpuid) - 25304usize]; + [::std::mem::offset_of!(ArchCPU, check_cpuid) - 25384usize]; ["Offset of field: ArchCPU::enforce_cpuid"] - [::std::mem::offset_of!(ArchCPU, enforce_cpuid) - 25305usize]; + [::std::mem::offset_of!(ArchCPU, enforce_cpuid) - 25385usize]; ["Offset of field: ArchCPU::force_features"] - [::std::mem::offset_of!(ArchCPU, force_features) - 25306usize]; + [::std::mem::offset_of!(ArchCPU, force_features) - 25386usize]; ["Offset of field: ArchCPU::expose_kvm"] - [::std::mem::offset_of!(ArchCPU, expose_kvm) - 25307usize]; + [::std::mem::offset_of!(ArchCPU, expose_kvm) - 25387usize]; ["Offset of field: ArchCPU::expose_tcg"] - [::std::mem::offset_of!(ArchCPU, expose_tcg) - 25308usize]; + [::std::mem::offset_of!(ArchCPU, expose_tcg) - 25388usize]; ["Offset of field: ArchCPU::migratable"] - [::std::mem::offset_of!(ArchCPU, migratable) - 25309usize]; + [::std::mem::offset_of!(ArchCPU, migratable) - 25389usize]; ["Offset of field: ArchCPU::migrate_smi_count"] - [::std::mem::offset_of!(ArchCPU, migrate_smi_count) - 25310usize]; + [::std::mem::offset_of!(ArchCPU, migrate_smi_count) - 25390usize]; ["Offset of field: ArchCPU::max_features"] - [::std::mem::offset_of!(ArchCPU, max_features) - 25311usize]; - ["Offset of field: ArchCPU::apic_id"][::std::mem::offset_of!(ArchCPU, apic_id) - 25312usize]; + [::std::mem::offset_of!(ArchCPU, max_features) - 25391usize]; + ["Offset of field: ArchCPU::apic_id"][::std::mem::offset_of!(ArchCPU, apic_id) - 25392usize]; ["Offset of field: ArchCPU::vmware_cpuid_freq"] - [::std::mem::offset_of!(ArchCPU, vmware_cpuid_freq) - 25316usize]; + [::std::mem::offset_of!(ArchCPU, vmware_cpuid_freq) - 25396usize]; ["Offset of field: ArchCPU::cache_info_passthrough"] - [::std::mem::offset_of!(ArchCPU, cache_info_passthrough) - 25317usize]; - ["Offset of field: ArchCPU::mwait"][::std::mem::offset_of!(ArchCPU, mwait) - 25320usize]; + [::std::mem::offset_of!(ArchCPU, cache_info_passthrough) - 25397usize]; + ["Offset of field: ArchCPU::mwait"][::std::mem::offset_of!(ArchCPU, mwait) - 25400usize]; ["Offset of field: ArchCPU::filtered_features"] - [::std::mem::offset_of!(ArchCPU, filtered_features) - 25336usize]; + [::std::mem::offset_of!(ArchCPU, filtered_features) - 25416usize]; ["Offset of field: ArchCPU::enable_pmu"] - [::std::mem::offset_of!(ArchCPU, enable_pmu) - 25656usize]; - ["Offset of field: ArchCPU::lbr_fmt"][::std::mem::offset_of!(ArchCPU, lbr_fmt) - 25664usize]; + [::std::mem::offset_of!(ArchCPU, enable_pmu) - 25760usize]; + ["Offset of field: ArchCPU::lbr_fmt"][::std::mem::offset_of!(ArchCPU, lbr_fmt) - 25768usize]; ["Offset of field: ArchCPU::enable_lmce"] - [::std::mem::offset_of!(ArchCPU, enable_lmce) - 25672usize]; + [::std::mem::offset_of!(ArchCPU, enable_lmce) - 25776usize]; ["Offset of field: ArchCPU::enable_l3_cache"] - [::std::mem::offset_of!(ArchCPU, enable_l3_cache) - 25673usize]; + [::std::mem::offset_of!(ArchCPU, enable_l3_cache) - 25777usize]; ["Offset of field: ArchCPU::l1_cache_per_core"] - [::std::mem::offset_of!(ArchCPU, l1_cache_per_core) - 25674usize]; + [::std::mem::offset_of!(ArchCPU, l1_cache_per_core) - 25778usize]; ["Offset of field: ArchCPU::legacy_cache"] - [::std::mem::offset_of!(ArchCPU, legacy_cache) - 25675usize]; + [::std::mem::offset_of!(ArchCPU, legacy_cache) - 25779usize]; ["Offset of field: ArchCPU::legacy_multi_node"] - [::std::mem::offset_of!(ArchCPU, legacy_multi_node) - 25676usize]; + [::std::mem::offset_of!(ArchCPU, legacy_multi_node) - 25780usize]; ["Offset of field: ArchCPU::enable_cpuid_0xb"] - [::std::mem::offset_of!(ArchCPU, enable_cpuid_0xb) - 25677usize]; + [::std::mem::offset_of!(ArchCPU, enable_cpuid_0xb) - 25781usize]; ["Offset of field: ArchCPU::full_cpuid_auto_level"] - [::std::mem::offset_of!(ArchCPU, full_cpuid_auto_level) - 25678usize]; + [::std::mem::offset_of!(ArchCPU, full_cpuid_auto_level) - 25782usize]; ["Offset of field: ArchCPU::vendor_cpuid_only"] - [::std::mem::offset_of!(ArchCPU, vendor_cpuid_only) - 25679usize]; + [::std::mem::offset_of!(ArchCPU, vendor_cpuid_only) - 25783usize]; ["Offset of field: ArchCPU::amd_topoext_features_only"] - [::std::mem::offset_of!(ArchCPU, amd_topoext_features_only) - 25680usize]; + [::std::mem::offset_of!(ArchCPU, amd_topoext_features_only) - 25784usize]; ["Offset of field: ArchCPU::intel_pt_auto_level"] - [::std::mem::offset_of!(ArchCPU, intel_pt_auto_level) - 25681usize]; + [::std::mem::offset_of!(ArchCPU, intel_pt_auto_level) - 25785usize]; ["Offset of field: ArchCPU::fill_mtrr_mask"] - [::std::mem::offset_of!(ArchCPU, fill_mtrr_mask) - 25682usize]; + [::std::mem::offset_of!(ArchCPU, fill_mtrr_mask) - 25786usize]; ["Offset of field: ArchCPU::host_phys_bits"] - [::std::mem::offset_of!(ArchCPU, host_phys_bits) - 25683usize]; + [::std::mem::offset_of!(ArchCPU, host_phys_bits) - 25787usize]; ["Offset of field: ArchCPU::host_phys_bits_limit"] - [::std::mem::offset_of!(ArchCPU, host_phys_bits_limit) - 25684usize]; + [::std::mem::offset_of!(ArchCPU, host_phys_bits_limit) - 25788usize]; ["Offset of field: ArchCPU::kvm_pv_enforce_cpuid"] - [::std::mem::offset_of!(ArchCPU, kvm_pv_enforce_cpuid) - 25685usize]; + [::std::mem::offset_of!(ArchCPU, kvm_pv_enforce_cpuid) - 25789usize]; ["Offset of field: ArchCPU::phys_bits"] - [::std::mem::offset_of!(ArchCPU, phys_bits) - 25688usize]; + [::std::mem::offset_of!(ArchCPU, phys_bits) - 25792usize]; ["Offset of field: ArchCPU::guest_phys_bits"] - [::std::mem::offset_of!(ArchCPU, guest_phys_bits) - 25692usize]; + [::std::mem::offset_of!(ArchCPU, guest_phys_bits) - 25796usize]; ["Offset of field: ArchCPU::apic_state"] - [::std::mem::offset_of!(ArchCPU, apic_state) - 25696usize]; + [::std::mem::offset_of!(ArchCPU, apic_state) - 25800usize]; ["Offset of field: ArchCPU::cpu_as_root"] - [::std::mem::offset_of!(ArchCPU, cpu_as_root) - 25704usize]; + [::std::mem::offset_of!(ArchCPU, cpu_as_root) - 25808usize]; ["Offset of field: ArchCPU::cpu_as_mem"] - [::std::mem::offset_of!(ArchCPU, cpu_as_mem) - 25712usize]; - ["Offset of field: ArchCPU::smram"][::std::mem::offset_of!(ArchCPU, smram) - 25720usize]; + [::std::mem::offset_of!(ArchCPU, cpu_as_mem) - 25816usize]; + ["Offset of field: ArchCPU::smram"][::std::mem::offset_of!(ArchCPU, smram) - 25824usize]; ["Offset of field: ArchCPU::machine_done"] - [::std::mem::offset_of!(ArchCPU, machine_done) - 25728usize]; + [::std::mem::offset_of!(ArchCPU, machine_done) - 25832usize]; ["Offset of field: ArchCPU::kvm_msr_buf"] - [::std::mem::offset_of!(ArchCPU, kvm_msr_buf) - 25752usize]; - ["Offset of field: ArchCPU::node_id"][::std::mem::offset_of!(ArchCPU, node_id) - 25760usize]; + [::std::mem::offset_of!(ArchCPU, kvm_msr_buf) - 25856usize]; + ["Offset of field: ArchCPU::node_id"][::std::mem::offset_of!(ArchCPU, node_id) - 25864usize]; ["Offset of field: ArchCPU::socket_id"] - [::std::mem::offset_of!(ArchCPU, socket_id) - 25764usize]; - ["Offset of field: ArchCPU::die_id"][::std::mem::offset_of!(ArchCPU, die_id) - 25768usize]; + [::std::mem::offset_of!(ArchCPU, socket_id) - 25868usize]; + ["Offset of field: ArchCPU::die_id"][::std::mem::offset_of!(ArchCPU, die_id) - 25872usize]; ["Offset of field: ArchCPU::module_id"] - [::std::mem::offset_of!(ArchCPU, module_id) - 25772usize]; - ["Offset of field: ArchCPU::core_id"][::std::mem::offset_of!(ArchCPU, core_id) - 25776usize]; + [::std::mem::offset_of!(ArchCPU, module_id) - 25876usize]; + ["Offset of field: ArchCPU::core_id"][::std::mem::offset_of!(ArchCPU, core_id) - 25880usize]; ["Offset of field: ArchCPU::thread_id"] - [::std::mem::offset_of!(ArchCPU, thread_id) - 25780usize]; + [::std::mem::offset_of!(ArchCPU, thread_id) - 25884usize]; ["Offset of field: ArchCPU::hv_max_vps"] - [::std::mem::offset_of!(ArchCPU, hv_max_vps) - 25784usize]; + [::std::mem::offset_of!(ArchCPU, hv_max_vps) - 25888usize]; ["Offset of field: ArchCPU::xen_vapic"] - [::std::mem::offset_of!(ArchCPU, xen_vapic) - 25788usize]; + [::std::mem::offset_of!(ArchCPU, xen_vapic) - 25892usize]; }; impl Default for ArchCPU { fn default() -> Self { @@ -5925,97 +6115,6 @@ unsafe extern "C" { flags: ::std::os::raw::c_int, ) -> bool; } -pub const MemOp_MO_8: MemOp = MemOp(0); -pub const MemOp_MO_16: MemOp = MemOp(1); -pub const MemOp_MO_32: MemOp = MemOp(2); -pub const MemOp_MO_64: MemOp = MemOp(3); -pub const MemOp_MO_128: MemOp = MemOp(4); -pub const MemOp_MO_256: MemOp = MemOp(5); -pub const MemOp_MO_512: MemOp = MemOp(6); -pub const MemOp_MO_1024: MemOp = MemOp(7); -pub const MemOp_MO_SIZE: MemOp = MemOp(7); -pub const MemOp_MO_SIGN: MemOp = MemOp(8); -pub const MemOp_MO_BSWAP: MemOp = MemOp(16); -pub const MemOp_MO_LE: MemOp = MemOp(0); -pub const MemOp_MO_BE: MemOp = MemOp(16); -pub const MemOp_MO_TE: MemOp = MemOp(0); -pub const MemOp_MO_ASHIFT: MemOp = MemOp(5); -pub const MemOp_MO_AMASK: MemOp = MemOp(224); -pub const MemOp_MO_UNALN: MemOp = MemOp(0); -pub const MemOp_MO_ALIGN_2: MemOp = MemOp(32); -pub const MemOp_MO_ALIGN_4: MemOp = MemOp(64); -pub const MemOp_MO_ALIGN_8: MemOp = MemOp(96); -pub const MemOp_MO_ALIGN_16: MemOp = MemOp(128); -pub const MemOp_MO_ALIGN_32: MemOp = MemOp(160); -pub const MemOp_MO_ALIGN_64: MemOp = MemOp(192); -pub const MemOp_MO_ALIGN: MemOp = MemOp(224); -pub const MemOp_MO_ATOM_SHIFT: MemOp = MemOp(8); -pub const MemOp_MO_ATOM_IFALIGN: MemOp = MemOp(0); -pub const MemOp_MO_ATOM_IFALIGN_PAIR: MemOp = MemOp(256); -pub const MemOp_MO_ATOM_WITHIN16: MemOp = MemOp(512); -pub const MemOp_MO_ATOM_WITHIN16_PAIR: MemOp = MemOp(768); -pub const MemOp_MO_ATOM_SUBALIGN: MemOp = MemOp(1024); -pub const MemOp_MO_ATOM_NONE: MemOp = MemOp(1280); -pub const MemOp_MO_ATOM_MASK: MemOp = MemOp(1792); -pub const MemOp_MO_UB: MemOp = MemOp(0); -pub const MemOp_MO_UW: MemOp = MemOp(1); -pub const MemOp_MO_UL: MemOp = MemOp(2); -pub const MemOp_MO_UQ: MemOp = MemOp(3); -pub const MemOp_MO_UO: MemOp = MemOp(4); -pub const MemOp_MO_SB: MemOp = MemOp(8); -pub const MemOp_MO_SW: MemOp = MemOp(9); -pub const MemOp_MO_SL: MemOp = MemOp(10); -pub const MemOp_MO_SQ: MemOp = MemOp(11); -pub const MemOp_MO_SO: MemOp = MemOp(12); -pub const MemOp_MO_LEUW: MemOp = MemOp(1); -pub const MemOp_MO_LEUL: MemOp = MemOp(2); -pub const MemOp_MO_LEUQ: MemOp = MemOp(3); -pub const MemOp_MO_LESW: MemOp = MemOp(9); -pub const MemOp_MO_LESL: MemOp = MemOp(10); -pub const MemOp_MO_LESQ: MemOp = MemOp(11); -pub const MemOp_MO_BEUW: MemOp = MemOp(17); -pub const MemOp_MO_BEUL: MemOp = MemOp(18); -pub const MemOp_MO_BEUQ: MemOp = MemOp(19); -pub const MemOp_MO_BESW: MemOp = MemOp(25); -pub const MemOp_MO_BESL: MemOp = MemOp(26); -pub const MemOp_MO_BESQ: MemOp = MemOp(27); -pub const MemOp_MO_TEUW: MemOp = MemOp(1); -pub const MemOp_MO_TEUL: MemOp = MemOp(2); -pub const MemOp_MO_TEUQ: MemOp = MemOp(3); -pub const MemOp_MO_TEUO: MemOp = MemOp(4); -pub const MemOp_MO_TESW: MemOp = MemOp(9); -pub const MemOp_MO_TESL: MemOp = MemOp(10); -pub const MemOp_MO_TESQ: MemOp = MemOp(11); -pub const MemOp_MO_SSIZE: MemOp = MemOp(15); -impl ::std::ops::BitOr for MemOp { - type Output = Self; - #[inline] - fn bitor(self, other: Self) -> Self { - MemOp(self.0 | other.0) - } -} -impl ::std::ops::BitOrAssign for MemOp { - #[inline] - fn bitor_assign(&mut self, rhs: MemOp) { - self.0 |= rhs.0; - } -} -impl ::std::ops::BitAnd for MemOp { - type Output = Self; - #[inline] - fn bitand(self, other: Self) -> Self { - MemOp(self.0 & other.0) - } -} -impl ::std::ops::BitAndAssign for MemOp { - #[inline] - fn bitand_assign(&mut self, rhs: MemOp) { - self.0 &= rhs.0; - } -} -#[repr(transparent)] -#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] -pub struct MemOp(pub ::std::os::raw::c_uint); pub type MemOpIdx = u32; unsafe extern "C" { pub static mut guest_base: usize; @@ -6045,7 +6144,6 @@ pub struct image_info { pub file_string: abi_ulong, pub elf_flags: u32, pub personality: ::std::os::raw::c_int, - pub alignment: abi_ulong, pub exec_stack: bool, pub arg_strings: abi_ulong, pub env_strings: abi_ulong, @@ -6060,7 +6158,7 @@ pub struct image_info { } #[allow(clippy::unnecessary_operation, clippy::identity_op)] const _: () = { - ["Size of image_info"][::std::mem::size_of::() - 264usize]; + ["Size of image_info"][::std::mem::size_of::() - 256usize]; ["Alignment of image_info"][::std::mem::align_of::() - 8usize]; ["Offset of field: image_info::load_bias"] [::std::mem::offset_of!(image_info, load_bias) - 0usize]; @@ -6099,29 +6197,27 @@ const _: () = { [::std::mem::offset_of!(image_info, elf_flags) - 160usize]; ["Offset of field: image_info::personality"] [::std::mem::offset_of!(image_info, personality) - 164usize]; - ["Offset of field: image_info::alignment"] - [::std::mem::offset_of!(image_info, alignment) - 168usize]; ["Offset of field: image_info::exec_stack"] - [::std::mem::offset_of!(image_info, exec_stack) - 176usize]; + [::std::mem::offset_of!(image_info, exec_stack) - 168usize]; ["Offset of field: image_info::arg_strings"] - [::std::mem::offset_of!(image_info, arg_strings) - 184usize]; + [::std::mem::offset_of!(image_info, arg_strings) - 176usize]; ["Offset of field: image_info::env_strings"] - [::std::mem::offset_of!(image_info, env_strings) - 192usize]; + [::std::mem::offset_of!(image_info, env_strings) - 184usize]; ["Offset of field: image_info::loadmap_addr"] - [::std::mem::offset_of!(image_info, loadmap_addr) - 200usize]; - ["Offset of field: image_info::nsegs"][::std::mem::offset_of!(image_info, nsegs) - 208usize]; + [::std::mem::offset_of!(image_info, loadmap_addr) - 192usize]; + ["Offset of field: image_info::nsegs"][::std::mem::offset_of!(image_info, nsegs) - 200usize]; ["Offset of field: image_info::loadsegs"] - [::std::mem::offset_of!(image_info, loadsegs) - 216usize]; + [::std::mem::offset_of!(image_info, loadsegs) - 208usize]; ["Offset of field: image_info::pt_dynamic_addr"] - [::std::mem::offset_of!(image_info, pt_dynamic_addr) - 224usize]; + [::std::mem::offset_of!(image_info, pt_dynamic_addr) - 216usize]; ["Offset of field: image_info::interpreter_loadmap_addr"] - [::std::mem::offset_of!(image_info, interpreter_loadmap_addr) - 232usize]; + [::std::mem::offset_of!(image_info, interpreter_loadmap_addr) - 224usize]; ["Offset of field: image_info::interpreter_pt_dynamic_addr"] - [::std::mem::offset_of!(image_info, interpreter_pt_dynamic_addr) - 240usize]; + [::std::mem::offset_of!(image_info, interpreter_pt_dynamic_addr) - 232usize]; ["Offset of field: image_info::other_info"] - [::std::mem::offset_of!(image_info, other_info) - 248usize]; + [::std::mem::offset_of!(image_info, other_info) - 240usize]; ["Offset of field: image_info::note_flags"] - [::std::mem::offset_of!(image_info, note_flags) - 256usize]; + [::std::mem::offset_of!(image_info, note_flags) - 248usize]; }; impl Default for image_info { fn default() -> Self { diff --git a/libafl_qemu/runtime/libafl_qemu_stub_bindings.rs b/libafl_qemu/runtime/libafl_qemu_stub_bindings.rs index d499131ef9..3b1381bf1a 100644 --- a/libafl_qemu/runtime/libafl_qemu_stub_bindings.rs +++ b/libafl_qemu/runtime/libafl_qemu_stub_bindings.rs @@ -1,5 +1,5 @@ /* 1.87.0-nightly */ -/* qemu git hash: fea68856b9410ca6f0076a6bf9ccc4b4b11aa09c */ +/* qemu git hash: 2a676d9cd8c474b5c0db1d77d2769e56e2ed8524 */ /* automatically generated by rust-bindgen 0.71.1 */ #[repr(C)] diff --git a/libafl_qemu/runtime/nyx_stub_bindings.rs b/libafl_qemu/runtime/nyx_stub_bindings.rs index edb8d84417..f0c853aaed 100644 --- a/libafl_qemu/runtime/nyx_stub_bindings.rs +++ b/libafl_qemu/runtime/nyx_stub_bindings.rs @@ -1,5 +1,5 @@ /* 1.87.0-nightly */ -/* qemu git hash: fea68856b9410ca6f0076a6bf9ccc4b4b11aa09c */ +/* qemu git hash: 2a676d9cd8c474b5c0db1d77d2769e56e2ed8524 */ /* automatically generated by rust-bindgen 0.71.1 */ #[repr(C)] diff --git a/libafl_qemu/src/qemu/usermode.rs b/libafl_qemu/src/qemu/usermode.rs index d8b1b5b206..a41c563927 100644 --- a/libafl_qemu/src/qemu/usermode.rs +++ b/libafl_qemu/src/qemu/usermode.rs @@ -108,7 +108,6 @@ pub struct ImageInfo { pub vdso: GuestAddr, pub entry: GuestAddr, pub brk: GuestAddr, - pub alignment: GuestAddr, pub exec_stack: bool, } @@ -251,7 +250,6 @@ impl Qemu { vdso: image_info.vdso, entry: image_info.entry, brk: image_info.brk, - alignment: image_info.alignment, exec_stack: image_info.exec_stack, } }