From 44d844e1e2fe7b57a221bd3dcff02025da98e862 Mon Sep 17 00:00:00 2001
From: Dominik Maier <domenukk@gmail.com>
Date: Mon, 11 Oct 2021 22:20:19 +0200
Subject: [PATCH] 32 bit arm regs (#315)

* aarch and arm regs

* fix arm, remove aarch64

* remove aarch64 mod
---
 libafl_qemu/src/amd64.rs |  7 ++++++
 libafl_qemu/src/arm.rs   | 47 ++++++++++++++++++++++++++++++++++++++++
 libafl_qemu/src/lib.rs   |  1 +
 libafl_qemu/src/x86.rs   |  7 ++++++
 4 files changed, 62 insertions(+)
 create mode 100644 libafl_qemu/src/arm.rs

diff --git a/libafl_qemu/src/amd64.rs b/libafl_qemu/src/amd64.rs
index fcd7911e60..229db0464f 100644
--- a/libafl_qemu/src/amd64.rs
+++ b/libafl_qemu/src/amd64.rs
@@ -27,6 +27,13 @@ pub enum Amd64Regs {
     Rflags = 17,
 }
 
+/// alias registers
+#[allow(non_upper_case_globals)]
+impl Amd64Regs {
+    pub const Sp: Amd64Regs = Amd64Regs::Rsp;
+    pub const Pc: Amd64Regs = Amd64Regs::Rip;
+}
+
 #[cfg(feature = "python")]
 impl IntoPy<PyObject> for Amd64Regs {
     fn into_py(self, py: Python) -> PyObject {
diff --git a/libafl_qemu/src/arm.rs b/libafl_qemu/src/arm.rs
new file mode 100644
index 0000000000..d15f716a47
--- /dev/null
+++ b/libafl_qemu/src/arm.rs
@@ -0,0 +1,47 @@
+use num_enum::{IntoPrimitive, TryFromPrimitive};
+use strum_macros::EnumIter;
+
+#[cfg(feature = "python")]
+use pyo3::prelude::*;
+
+/// Registers for the ARM instruction set.
+#[derive(IntoPrimitive, TryFromPrimitive, Debug, Clone, Copy, EnumIter)]
+#[repr(i32)]
+pub enum ArmRegs {
+    R0 = 0,
+    R1 = 1,
+    R2 = 2,
+    R3 = 3,
+    R4 = 4,
+    R5 = 5,
+    R6 = 6,
+    R7 = 7,
+    R8 = 8,
+    R9 = 9,
+    R10 = 10,
+    R11 = 11,
+    R12 = 12,
+    R13 = 13,
+    R14 = 14,
+    R15 = 15,
+}
+
+/// alias registers
+#[allow(non_upper_case_globals)]
+impl ArmRegs {
+    pub const Sp: ArmRegs = ArmRegs::R13;
+    pub const Lr: ArmRegs = ArmRegs::R14;
+    pub const Pc: ArmRegs = ArmRegs::R15;
+    pub const Sb: ArmRegs = ArmRegs::R9;
+    pub const Sl: ArmRegs = ArmRegs::R10;
+    pub const Fp: ArmRegs = ArmRegs::R11;
+    pub const Ip: ArmRegs = ArmRegs::R12;
+}
+
+#[cfg(feature = "python")]
+impl IntoPy<PyObject> for ArmRegs {
+    fn into_py(self, py: Python) -> PyObject {
+        let n: i32 = self.into();
+        n.into_py(py)
+    }
+}
diff --git a/libafl_qemu/src/lib.rs b/libafl_qemu/src/lib.rs
index 1f479d647a..39e9fd223d 100644
--- a/libafl_qemu/src/lib.rs
+++ b/libafl_qemu/src/lib.rs
@@ -1,6 +1,7 @@
 use std::env;
 
 pub mod amd64;
+pub mod arm;
 pub mod x86;
 
 pub mod elf;
diff --git a/libafl_qemu/src/x86.rs b/libafl_qemu/src/x86.rs
index 62b245a808..024b5c90cd 100644
--- a/libafl_qemu/src/x86.rs
+++ b/libafl_qemu/src/x86.rs
@@ -19,6 +19,13 @@ pub enum X86Regs {
     Eflags = 9,
 }
 
+/// alias registers
+#[allow(non_upper_case_globals)]
+impl X86Regs {
+    pub const Sp: X86Regs = X86Regs::Esp;
+    pub const Pc: X86Regs = X86Regs::Eip;
+}
+
 #[cfg(feature = "python")]
 impl IntoPy<PyObject> for X86Regs {
     fn into_py(self, py: Python) -> PyObject {